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  • Sr. Director, Computer Vision Solutions

    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 103 days ago

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    Description: "compute"Title: "compute"
    +1
    Unspecified Sales From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 4 wksource Resolvable source Verified non-birth-parent leave: 4 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Sr. Director, Computer Vision Solutions Virtual posted: Posted 30+ Days Ago

  • Senior Engineer, Machine Learning

    Analog Devices - US, MA, Wilmington
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 95 days ago

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    Role: semantic matchSource-backed benefits
    Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior Engineer, Machine Learning US, MA, Wilmington posted: Posted 23 Days Ago

  • Sr. Mechanical Engineer, Annapurna Labs, Machine Learning Hardware

    Amazon - Austin, Texas, USA
    Indexed from Amazon Custom Benefit evidence checked Jun 7, 2026 Comp disclosed in posting
    posted 177 days ago

    Why we showed this

    Role: semantic matchSource-backed benefits
    Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Inferred from posting Verified non-birth-parent leave: 6 wk $159K-$215K From the posting source Inferred from posting Adoption assistance Inferred from posting Childcare support Inferred from posting Fertility benefits Inferred from posting Mental health support Equity Inferred from posting 401(k) reported

    Sr. Mechanical Engineer, Annapurna Labs, Machine Learning Hardware Austin, Texas, USA Annapurna Labs (our organization within Amazon) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. As a member of the Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you'll work with thought leaders in multiple technology areas. You'll have high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve your products performance, quality and cost. We're changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today. Key job responsibilities As a Thermal/Mechanical Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge

  • ASIC Physical Design Tools, Flows, Methodologies Manager

    Google - Sunnyvale, CA, USA
    Indexed from Google Custom Benefit evidence checked May 7, 2026 Comp disclosed in posting
    posted 79 days ago

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    Role: semantic matchSource-backed benefits
    Unspecified Design From the posting source - Mid From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource $192K-$279K From the posting source Equity Inferred from posting 401(k) reported

    ASIC Physical Design Tools, Flows, Methodologies Manager Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will manage and lead a team of TFM engineers responsible for the physical design flows that power our Tensor Processing Unit (TPU) products. You will guide your team in developing, deploying, and supporting a register-transfer level (RTL)-to-GDS infrastructure. You will bridge design engineering and electronic design automation (EDA) capabilities, balancing resources and managing priorities across projects, feature requests, and bug resolutions to ensure silicon delivery. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Individual pay is determined by

  • Senior Principal Data and AI Engineer- R&D IT

    NXP Semiconductors - Bangalore
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 103 days ago

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    Role: semantic matchSource-backed benefits
    Unspecified Data From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior Principal Data and AI Engineer- R&D IT Bangalore posted: Posted 30+ Days Ago

  • ASIC Design Verification Technical Lead, TPU

    Google - Sunnyvale, CA, USA
    Indexed from Google Custom Benefit evidence checked May 7, 2026 Comp disclosed in posting
    posted 79 days ago

    Why we showed this

    Role: semantic matchSource-backed benefits
    Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource $192K-$279K From the posting source Equity Inferred from posting 401(k) reported

    ASIC Design Verification Technical Lead, TPU Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits

  • Sr Technical Program Manager - Infrastructure and R&D Projects, AWS Center for Quantum Computing

    Amazon - Pasadena, California, USA
    Indexed from Amazon Custom Benefit evidence checked Jun 7, 2026 Comp disclosed in posting
    posted 165 days ago

    Why we showed this

    Description: "compute"Source-backed benefits
    Unspecified Operations From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Inferred from posting Verified non-birth-parent leave: 6 wk $149K-$201K From the posting source Inferred from posting Adoption assistance Inferred from posting Childcare support Inferred from posting Fertility benefits Inferred from posting Mental health support Equity Inferred from posting 401(k) reported

    Sr Technical Program Manager - Infrastructure and R&D Projects, AWS Center for Quantum Computing Pasadena, California, USA The AWS Center for Quantum Computing is a multi-disciplinary team of scientists, engineers, and technicians, all working to develop quantum computing technology capable of delivering value to customers. We are looking for a senior technical program manager to support infrastructure and R&D projects. This role will tackle a grab bag of high-profile projects that require working across internal teams as well as with external collaborators. This fast paced role will need to leverage in-depth domain knowledge around R&D for quantum computing technologies to anticipate efficient lab operations while also navigating evolving infrastructure needs. You will leverage your experience in managing complex technical programs to make data-informed decisions at a programmatic level. In this role, you will also support the definition of technical project management standards across the Center of Quantum Computing. Additionally, as an experienced project manager, you will have the opportunity to contribute to shaping our general project management practices across the organization. This includes improving our general lifecycle approach for projects, while also increasing our ability to promote visibility of project progress to other teams and senior leadership. Familiarity with system engineering topics that intersect with project management, such as quantitative risk management, reviews, and requirements management is highly desirable. Utility Computing (UC) provides product innovations - from foundational services such as Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue

  • Lead AI Engineer

    Ecolab - IND - Karnataka - Bangalore - EDC
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 72 days ago

    Why we showed this

    Role: semantic matchSource-backed benefits
    Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Lead AI Engineer IND - Karnataka - Bangalore - EDC posted: Posted Today

  • Senior Research Scientist I/II, Computational Biology & Toxicology

    AbbVie Inc. - North Chicago, IL, United States
    Indexed from Smartrecruiters Benefit evidence checked May 7, 2026
    posted 74 days ago

    Why we showed this

    Source-backed benefits
    Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 12 wksource Resolvable source Verified non-birth-parent leave: 12 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior Research Scientist I/II, Computational Biology & Toxicology North Chicago, IL, United States Company Description: About AbbVie AbbVie's mission is to discover and deliver innovative medicines and solutions that solve serious health issues today and address the medical challenges of tomorrow. We strive to have a remarkable impact on people's lives across several key therapeutic areas including immunology, oncology and neuroscience - and products and services in our Allergan Aesthetics portfolio. For more information about AbbVie, please visit us at www.abbvie.com . Follow @abbvie on LinkedIn, Facebook , Instagram , X and YouTube. Job Description: The Computational Toxicology group is dedicated to advancing in-silico approaches that improve the prediction and mechanistic understanding of drug safety across small molecules, biologics, and emerging modalities. This role sits at the intersection of biological science and computational innovation - and that intersection is intentional. We are looking for a scientist with deep domain knowledge in biology who has also developed computational skills to independently design, build, and deploy data-driven solutions. The ideal candidate can stand at the bench conceptually, understand what drives experimental variability, and architect computational solutions that reflect biological reality. The role focuses on integrating diverse data sources - including pharmacology, toxicology, genomics, pathology, chemistry, and clinical datasets - into predictive and interpretable models. You will work directly with research scientists to understand their workflows, co-design solutions, and build tools that make computational capabilities accessible to generalist scientists across Development Sciences. Responsibilities Serve as a scientific translator between wet-lab researchers and computational

  • AMS/RF Board Designer, Quantum AI

    Google - Goleta, CA, USA
    Indexed from Google Custom Benefit evidence checked May 7, 2026 Comp disclosed in posting
    posted 78 days ago

    Why we showed this

    Description: "compute"Source-backed benefits
    Unspecified Design From the posting source - Mid From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource $159K-$231K From the posting source Equity Inferred from posting 401(k) reported

    AMS/RF Board Designer, Quantum AI Goleta, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will be a key team member in the development of quantum control and measurement systems. You will leverage radio frequency (RF), analog, or mixed-signal expertise to implement high-performance board-level designs which are then used to control our quantum computers. You will work with ASIC designers to architect system-level solutions which allow us to improve our system density and performance. You will document your designs and measurement results and present these data to relevant stakeholders. You will support team-members using the equipment you have designed as they integrate it into larger quantum computing systems. The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Support deployment and operations of electronics to Google's fleet of quantum computers.

  • Machine Learning Engineer - 3

    Adobe Inc. - Bangalore
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 103 days ago

    Why we showed this

    Role: semantic matchSource-backed benefits
    Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 16 wksource Resolvable source Verified non-birth-parent leave: 16 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Machine Learning Engineer - 3 Bangalore posted: Posted 30+ Days Ago

  • Silicon Architect, AI Power and Performance

    Google - San Diego, CA, USA
    Indexed from Google Custom Benefit evidence checked May 7, 2026 Comp disclosed in posting
    posted 79 days ago

    Why we showed this

    Role: semantic matchSource-backed benefits
    Unspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource $192K-$279K From the posting source Equity Inferred from posting 401(k) reported

    Silicon Architect, AI Power and Performance San Diego, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. This role offers the opportunity to work on cutting-edge power management technologies for AI/ML workloads that directly impact the battery life and efficiency of Google's flagship Android devices and custom silicon. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead the analysis and implementation of architectural optimizations that span the full stack - from low-level silicon IP to high-level Android frameworks - to maximize AI performance per watt. Influence hardware and software roadmaps for SOC, AI accelerators, and emerging memory technologies to meet future Gemini and GenAI product requirements. Propose and drive the development of proof-of-concept prototypes for next-generation power management frameworks and specialized AI solutions. Act

  • Sr. Full Stack Member of Technical Staff

    Axon Enterprise - Seattle, Washington, United States
    Indexed from Greenhouse Benefit evidence checked Jun 7, 2026 Comp disclosed in posting
    posted 118 days ago

    Why we showed this

    Description: "compute"Role: semantic match
    +1
    Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 10 wksource Inferred from posting Verified non-birth-parent leave: 10 wk $160K-$256K From the posting source Inferred from posting Childcare support Equity Inferred from posting 401(k) reported

    Sr. Full Stack Member of Technical Staff Seattle, Washington, United States Join Axon and be a Force for Good. At Axon, we're on a mission to Protect Life. We're explorers, pursuing society's most critical safety and justice issues with our ecosystem of devices and cloud software. Like our products, we work better together. We connect with candor and care, seeking out diverse perspectives from our customers, communities and each other. Life at Axon is fast-paced, challenging and meaningful. Here, you'll take ownership and drive real change. Constantly grow as you work hard for a mission that matters at a company where you matter. Your Impact We are seeking multiple highly skilled Full-Stack members of Technical Staff (MTS) to join our CoreAI organization, driving end-to-end development of AI systems across Cloud, Edge Devices, Mission Critical and Robotics platforms. This role goes beyond pure research. You will operate across the full stack, from data, models, and infrastructure to system integration and production deployment, to deliver scalable, real-world AI solutions. You will work on cutting-edge applications spanning computer vision, NLU, multimodal AI (MLLMs), and GenAI, enabling intelligent perception, reasoning, and action in mission-critical environments. As a senior technical leader, you will partner closely with research scientists, machine learning engineers, hardware, firmware, and product teams to translate advanced algorithms into robust, production-ready systems that operate reliably at scale. Why This Role You will have the opportunity to own and shape end-to-end AI systems that operate in real-world environments, bridging the gap between cutting-edge research

  • Scientist – Research Computational Biology (ARIA)

    Amgen - India - Hyderabad
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 103 days ago

    Why we showed this

    Source-backed benefits
    Unspecified Data From the posting source - Mid From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Scientist – Research Computational Biology (ARIA) India - Hyderabad posted: Posted 30+ Days Ago

  • Lead AI Engineer

    Ecolab - IND - Karnataka - Bangalore - EDC
    Indexed from Workday Benefit evidence checked Jun 7, 2026
    posted 73 days ago

    Why we showed this

    Role: semantic matchSource-backed benefits
    Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Lead AI Engineer IND - Karnataka - Bangalore - EDC posted: Posted Yesterday

  • Senior Principal Verification Engineer, Digital IP

    NXP Semiconductors - Bangalore
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 72 days ago

    Why we showed this

    Role: semantic matchSource-backed benefits
    Unspecified Data From the posting source - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Senior Principal Verification Engineer, Digital IP Bangalore posted: Posted Today

  • Computer Systems Engineer - Pega Resource

    Leidos - Washington, DC
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 95 days ago

    Why we showed this

    Description: "compute"Title: "compute"
    +1
    Unspecified Engineering From the posting source - Mid From the posting source Resolvable source Verified parental leave: 4 wksource Resolvable source Verified non-birth-parent leave: 4 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Computer Systems Engineer - Pega Resource Washington, DC posted: Posted 23 Days Ago

  • Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration - Annapurna Labs

    Amazon - Austin, Texas, USA
    Indexed from Amazon Custom Benefit evidence checked Jun 7, 2026 Comp disclosed in posting
    posted 237 days ago

    Why we showed this

    Description: "compute"Role: semantic match
    +1
    Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Inferred from posting Verified non-birth-parent leave: 6 wk $159K-$215K From the posting source Inferred from posting Adoption assistance Inferred from posting Childcare support Inferred from posting Fertility benefits Inferred from posting Mental health support Equity Inferred from posting 401(k) reported

    Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration - Annapurna Labs Austin, Texas, USA Utility Computing (UC) AWS Utility Computing (UC) provides product innovations - from foundational services such as Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS's services and features apart in the industry. As a member of the UC organization, you'll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for customers who require specialized security solutions for their cloud services. Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. About AWS Amazon Web Services (AWS) is the world's most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating - that's why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Diverse Experiences AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is

  • Senior Software Engineer, GPU Performance

    Google - Sunnyvale, CA, USA; +3 more
    Indexed from Google Custom Benefit evidence checked May 7, 2026 Comp disclosed in posting
    posted 79 days ago

    Why we showed this

    Role: semantic matchSource-backed benefits
    Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource $174K-$253K From the posting source Equity Inferred from posting 401(k) reported

    Senior Software Engineer, GPU Performance Sunnyvale, CA, USA; +3 more Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. While known for pioneering work with TPUs, GPUs are an equally vital and rapidly expanding frontier within Google's machine learning infrastructure. GPUs are indispensable to Google's ever-evolving landscape for strategic, pragmatic, and performance-driven reasons - ensuring top performance for our ML models, adapting to ML workloads, achieving results, and influencing next-gen GPU architectures via strategic partnerships. In recognition of hardware as a strength, Google's Core ML organization is heavily invested in growing a powerhouse team of GPU experts, and we invite you to be at its vanguard! This is your opportunity to move beyond incremental improvements and architect truly transformative solutions, shaping

  • Senior Photonic Engineer, Machine Learning

    Google - Sunnyvale, CA, USA
    Indexed from Google Custom Benefit evidence checked May 7, 2026 Comp disclosed in posting
    posted 78 days ago

    Why we showed this

    Description: "compute"Role: semantic match
    +1
    Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource $159K-$231K From the posting source Equity Inferred from posting 401(k) reported

    Senior Photonic Engineer, Machine Learning Sunnyvale, CA, USA As a Photonic Engineer for machine learning systems, you will be responsible for creating next generation optical interconnect technologies for Tensor Processing Unit (TPU) systems. You will work with both the optics team and machine learning team to lay out the optical technology roadmaps to scale future generation machine learning systems.Our Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power all of Google's services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of Google users. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Design low-cost and high-speed optical transceivers for data center applications. Develop optical systems and architectures to scale Tensor Processing Unit (TPU) and Graphics Processing Unit (GPU) superpods. Identify, research, and evaluate emerging photonic networking technologies. Explore optical technologies to disaggregate and improve the efficiencies of future computing systems. Minimum qualifications: PhD degree in Electrical Engineering, Computer Engineering, Physics, a related field,

  • End User Computing Equipment Manager

    Fiserv - Hagerstown, Maryland
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 103 days ago

    Why we showed this

    Source-backed benefits
    Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 12 wksource Resolvable source Verified non-birth-parent leave: 2 wksource Salary not disclosed Equity

    End User Computing Equipment Manager Hagerstown, Maryland posted: Posted 30+ Days Ago

  • Lead CPU Design Verification Engineer, Silicon

    Google - Portland, OR, USA; +3 more
    Indexed from Google Custom Benefit evidence checked May 7, 2026 Comp disclosed in posting
    posted 75 days ago

    Why we showed this

    Description: "compute"Role: semantic match
    +1
    Unspecified Engineering From the posting source - Senior From the posting source Resolvable source Verified parental leave: 18 wksource Resolvable source Verified non-birth-parent leave: 18 wksource $192K-$279K From the posting source Equity Inferred from posting 401(k) reported

    Lead CPU Design Verification Engineer, Silicon Portland, OR, USA; +3 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Design verification for future CPU developments. Build functional verification infrastructure, the infrastructure will include unit, multi-unit, core, and subsystem level verification environments. Produce diagnostic code repositories that sufficiently enable production of quality CPU's. Verify and validate performance for both pre-silicon and post-silicon. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog. Experience with processor microarchitecture. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis

  • Sr. Staff Engineer, Computer Vision

    Stryker Corporation - Burnaby, Canada
    Indexed from Workday Benefit evidence checked May 7, 2026
    posted 97 days ago

    Why we showed this

    Description: "compute"Title: "compute"
    +1
    Unspecified Data From the posting source - Senior From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Sr. Staff Engineer, Computer Vision Burnaby, Canada posted: Posted 25 Days Ago

  • Principal Computer Systems Analyst - Windows

    Northrop Grumman - United States-Maryland-Baltimore
    Indexed from Icims Benefit evidence checked Jun 7, 2026
    posted 74 days ago

    Why we showed this

    Description: "compute"Title: "compute"
    +1
    Unspecified Other - Staff Plus From the posting source Resolvable source Verified parental leave: 6 wksource Resolvable source Verified non-birth-parent leave: 6 wksource Salary not disclosed Equity Inferred from posting 401(k) reported

    Principal Computer Systems Analyst - Windows United States-Maryland-Baltimore

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