Intel jobs

ICE Graduate Talent 2 Locations posted: Posted 30+ Days Ago

Packaging Thermal Engineer Taiwan, Hsinchu posted: Posted 10 Days Ago

LLM Inference Performance & Evals Engineer Toronto, Ontario, Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Role Join the inference model team dedicated to bring up the state-of-the-art models, numerically validating and accelerating new model ideas on wafer-scale hardware. You will prototype architectural tweaks, build performance-eval pipelines, and turn hard numbers into changes that land in production. Key Responsibilities - Prototype and benchmark cutting-edge ideas: new attentions, MoE, speculative decoding, and many more innovations as they emerge. - Develop agent-driven automation that designs experiments, schedules runs, triages regressions, and drafts pull-requests. - Work closely with compiler, runtime,

Manufacturing Operator (Contract) Malaysia, Kulim posted: Posted 29 Days Ago

Cluster UI Full Stack, Engineering Lead Bengaluru, Karnataka, India; Toronto, Ontario, Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About the Role In this role, you will be building a world class UI-based large-scale cluster management portal. This portal will act as one stop for all operations and maintenance of cerebras clusters - such as cluster bringup deployment (day0/1/2), job management, health management to name a few. Cerebras AI clusters may have 1000's of Wafer-scale accelerator systems, several 1000's of high-end servers, and several 1000's of networking ports including switches. Responsibilities - Be the primary engineering face and owner

Digital IC Design Engineer Austin, Texas, United States; Fremont, California, United States About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world. Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. Job Description & Responsibilities: Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred. - Micro-architecture design and RTL implementation of: - Low-power digital signal processors - Low-power general-purpose hardware accelerators - Low-power graphics processing units - Low-power radio MAC/PHY - Low-power serial link MAC/PHY - Design and optimization of hardware/software interface with firmware engineers - Application-specific architecture optimization including: - Complex system modeling for energy and performance benchmarks - Workload analysis and modeling - Energy/performance profiling and analysis - Leveraging architecture-level design trade-offs with process technology and workload type - Balancing cost and performance

TA/Chief of Staff for CEG 3 Locations posted: Posted 30+ Days Ago

Physical Design Engineer Malaysia, Penang posted: Posted 22 Days Ago

Compute Server Platform Architect Sunnyvale CA or Toronto Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Role As a Compute / Server Platform Architect on the Cluster Architecture Team, you will own the server-side platform architecture that enables Cerebras CS3-based AI clusters (training and inference) to deliver predictable performance, scalability, and reliability. Our accelerators are network-attached, so the x86 server fleet is a first-class part of the end-to-end system: it runs critical-path runtime functions (for example orchestration, prompt caching, and IO/control services) and must be co-designed with software for token-level latency, throughput, and cost efficiency. You will

Senior Full Chip Physical Design Integration Lead 2 Locations posted: Posted 21 Days Ago

CPU Senior Circuit Design Engineer Malaysia, Penang posted: Posted 23 Days Ago

Sales Operations Analyst Malaysia, Penang posted: Posted 30+ Days Ago

Senior CPU Pre-Si Verification Engineer Mexico, Guadalajara posted: Posted 18 Days Ago

Developer Technology Engineer Virtual US posted: Posted 30+ Days Ago

Senior AI SoC Design Engineer 2 Locations posted: Posted 15 Days Ago

Platform Applications Engineer Mexico, Guadalajara posted: Posted 30+ Days Ago

Construction Engineering Intern 2 Locations posted: Posted 7 Days Ago

Principal Engineer, AI Inference Reliability Remote, California, United States; Sunnyvale CA or Toronto Canada Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. In late 2024, we launched Cerebras Inference, the fastest Generative AI inference service in the world, over 10 times faster than GPU-based hyperscale cloud inference. Since launch, we've scaled to meet the surging demand from AI labs, enterprises, and a thriving developer community. In October 2025, we announced our series G funding, raising $1.1 billion USD to accelerate the expansion of our products and services to meet global AI demand. About the team The Cerebras Inference team's mission

CPU Cache Microarchitect/RTL Engineer Beaverton, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems. As a CPU Cache Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification • Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance • Design

Factory Finance Specialist 2 Locations posted: Posted 30+ Days Ago

Physical Design Engineer Malaysia, Penang posted: Posted 30+ Days Ago

Senior FPGA Engineer, Intelligence Systems Reston, Virginia, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. WHAT IS AIS? Anduril Intelligence Systems (AIS) is focused on positioning Anduril as a lead provider of specialized engineering and products for Intelligence Community (IC) customers. We work within the IC to understand their requirements, shape their concepts of operation, and deliver exquisite capability across their problem set. We aim to develop and deploy critically needed capabilities that address our customers' most pressing national security requirements. ABOUT THE JOB We are looking for a Staff FPGA Engineer to join our rapidly growing team in Reston, Virginia . You will be responsible for rapidly developing, testing, and implementing FPGA designs on Xilinx SoC/FPGA platforms. This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation. WHAT YOU'LL DO - Integrate third-party vendors IP, as necessary. - Participate in entire design life cycle: from

Hardware Health US

Senior Chip Design Engineer Israel, Tel Aviv posted: Posted 9 Days Ago