Lead ASIC Design Verification Engineer (Starshield Satellite Engineering)

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About this role

Lead ASIC Design Verification Engineer (Starshield Satellite Engineering) Hawthorne, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. LEAD ASIC DESIGN VERIFICATION ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and commercial use, Starshield is designed for government use, with an initial focus on earth observation, communications, and hosted payloads. The Lead ASIC Design Verification Engineer will lead a team that supports custom ASICs and FPGAs design for cutting edge satellites systems that deliver unprecedented quantities of data at unheard of speeds to the service-members who defend our Nation and Allies. From initial design through on-orbit operations this person is responsible for leading a phenomenal team of engineers in a collaborative effort to design, manufacture, test and operate chips for satellites that make our Nation safer. RESPONSIBILITIES: - Lead a team responsible for digital ASIC verification at block and system level. - Lead and execute verification test plan, development, and milestones from beginning to end, develop test harnesses and test sequences. - Develop SystemVerilog testbench infrastructure (both UVM and non-UVM) for testing designs, including DSP blocks. - Responsible for overseeing test plan execution, running regressions, code and functional coverage closure. - Contribute to pre-silicon verification, chip bring-up and

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