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Staff Test Engineer (f/m/d)

Renesas Electronics - Graz, , Austria

Posted Jun 10, 2026

Benefits

Parental leave
Not verified
Non-birth-parent leave
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Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Verification
Not verified checked Jun 7, 2026
Salary
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401(k) match
Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)
$111,944 U.S. median for this role
Projected growth (BLS Employment Projections)
+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Data From the posting source
Seniority
Mid From the posting source

Schedule

Shift type
Not verified
Weekend work
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Application

Cover letter
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Assessment
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Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

Staff Test Engineer (f/m/d) Graz, , Austria Company Description: Job Description: We are seeking an experienced Staff Test Engineer to join our Connectivity Test Engineering team. In this role, you will define and lead test strategies for cutting-edge semiconductor products, driving quality, cost efficiency, and manufacturability from early development through mass production. You will collaborate closely with cross-functional teams-including design, verification, and product engineering-to ensure robust test solutions and seamless product industrialization. Key Responsibilities - Define and lead test strategy and planning for new product development - Develop and implement test programs and test hardware solutions - Partner with DfT and design teams to optimize product testability - Lead test execution, including risk management and stakeholder alignment - Perform debug, failure analysis, and root cause investigation - Support engineering sample generation and characterization activities - Drive ATE characterization and reliability testing (read-point validation) - Ensure smooth release to mass production with high yield and quality - Support high-volume manufacturing and continuous test cost optimization Qualifications: Education and experience: - Bachelor's or Master's degree in Electronics Engineering or a related field - Minimum 10 years of experience in test development and Design for Test (DfT) in an R&D environment Technical Expertise: - Strong programming skills in C/C++ and scripting languages - Solid understanding of mixed-signal circuits and test methodologies - Hands-on experience with mixed-signal ATE platforms - Experience in test hardware design and schematic development - Knowledge of signal integrity and power integrity principles - Exposure to RF testing and/or Java

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