Senior Analog Engineer (f/m/d)

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

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• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

Not verified checked Jun 7, 2026

Salary

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401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Data From the posting source

Seniority

Senior From the posting source

Schedule

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Weekend work

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Application

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Assessment

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Deadline

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Where they hire

State eligibility is not yet verified.

About this role

Senior Analog Engineer (f/m/d) Edinburgh, , United Kingdom Company Description: Job Description: Design and verify CMOS analog blocks for custom ASICs to meet performance, area, power and timescale constraints. Blocks include amplifiers, oscillators, LDOs, comparators and reference/biasing circuits. Take technical leadership for sub-systems and drive them from specification to production ramp. Collaborate with project leads to achieve system and design strategy for custom ASICs. Guide layout team to ensure quality of layout of own designs. Produce high quality documentation for designed circuits. Work closely with DFT engineers to ensure alignment to DFT strategy and implementation. Drive silicon debugging and design characterization. Support and participate in lab evaluation for own designs. Work with test and product engineers to support test development and ramp to production. Coach and mentor less experienced team members. Take a proactive approach to driving own development plan, utilizing team members and internal development opportunities. Qualifications: Degree level qualification in Electronics/Microelectronics Engineering or a related discipline is required 5-8 years of relevant analog circuit design experience. Hands-on experience in the design and verification of blocks such as amplifiers, oscillators, LDOs, comparators and reference/biasing circuits. Expertise in the design of filters and PLLs and/or RF circuits such as LNAs and mixers is an advantage. Experience of sub-system and chip-level verification including AMS verification. Strong competence with EDA design tools and the Cadence design environment. Ability to work with minimal instruction - either independently or collaboratively. Ability to make good judgement in selecting methods and techniques for obtaining solutions. Able

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