Principal Digital Engineer

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

Not verified checked Jun 7, 2026

Salary

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401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$111,944 U.S. median for this role

Projected growth (BLS Employment Projections)

+13.7% - Much faster than average

Matched to SOC 15-1252 - Data and ML aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Data From the posting source

Seniority

Staff Plus From the posting source

Schedule

Shift type

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Weekend work

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Application

Cover letter

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Assessment

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Deadline

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Where they hire

State eligibility is not yet verified.

About this role

Principal Digital Engineer Morrisville, North Carolina, United States Company Description: Join a top-notch Power Design Team within Renesas Electronics America's leading power management product line. As a Principal Engineer within one of our most prominent BMS Design Groups, you will spearhead the development of next-generation IC products for fast-paced consumer, industrial, and automotive power markets. At Renesas, you will experience the best of both worlds: A strong financial foundation of a multi-billion dollar global leader paired with the flexibility and velocity of a specialized design organization. Our solutions are at the heart of products developed by the world's major innovators. Join us and drive what's next in power electronics. Job Description: Job Responsibilities Drive Specification & Architecture: Define chip specification requirements and analyze process options to select the best technology for target applications. System-Level Design: Lead digital module design and full system-level simulations. Verification Oversight: Develop and execute comprehensive design verification plans, ensuring total system-level integrity. Physical Implementation: Manage synthesis and P&R constraint generation, including clock tree specifications. Testability & Quality: Oversee scan insertion and pattern generation to ensure rigorous silicon standards. Product Lifecycle Management: Partner with Test, Product, and Application Engineering to develop validation plans and drive products through to final release. Customer & Market Strategy: Engage directly with customers to identify application needs and define total system-level solutions. Technical Consultation: Provide subject matter expertise for marketing initiatives and support customer design-ins through site visits and technical reviews. Qualifications: Expert Technical Skills: Mastery of Verilog coding, Register file design,

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