Global Technology Liaison – Semiconductor R&D and Academic Collaboration

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

• Fertility benefits: Not verified
• Adoption assistance: Not verified
• Surrogacy assistance: Not verified

Mental health support

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Relocation assistance

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Childcare support

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Learning budget

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Verification

Not verified checked Jun 7, 2026

Salary

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401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

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Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Application

Cover letter

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Assessment

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Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Global Technology Liaison – Semiconductor R&D and Academic Collaboration Athens, , Greece Company Description: Job Description: This role is responsible for leading global technology liaison activities with research institutes and academia, with a focus on identifying, shaping, and nurturing mid‑ to long‑term semiconductor technology opportunities aligned with Renesas' strategic direction. The position requires both strong technical credibility and the ability to build trust‑based, long‑term relationships, which are highly valued in Japanese organizations. Key Responsibilities - Working closely with CTO office - Lead technology liaison activities with leading global research institutes and universities across Europian countries. - Identify emerging semiconductor technologies and research trends with a mid‑ to long‑term perspective - Initiate, structure, and support joint research programs and technical collaborations Act as a technical interface between external partners and internal stakeholders (R&D, business units, IP, legal, and strategy teams) - Provide clear technical insights and recommendations to internal teams and management - Support the definition of research themes aligned with Renesas' long‑term technology roadmap - Represent Renesas at international conferences, workshops, and technical forums - Build and maintain a trusted global technology network over time Qualifications: - Solid technical background in semiconductor technologies (e.g., devices, process, circuits, materials, packaging, or systems) - Professional experience in R&D, technology planning, technology strategy, or technical partnership roles - Ability to communicate and collaborate effectively with engineers and researchers at a technical level - Business‑level English proficiency for meetings, discussions, and written communication - Strong coordination skills and the ability to work across organizational

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