Senior ASIC Design Engineer - LPU

Verified benefits

Parental leave

12 weeks source

Non-birth-parent leave

12 weeks

Verified

Yes last checked unknown

Salary

Not disclosed

Market context

Median wage (BLS OEWS)

$66,396 national median

Projected growth (BLS Employment Projections)

+3.5% - Average

Matched to SOC 27-1024 - Design aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Where they hire

State eligibility is not yet verified.

About this role

Senior ASIC Design Engineer - LPU Canada, Remote Senior ASIC Design Engineer - LPU /job/Canada-Remote/Senior-ASIC-Design-Engineer_JR2012984 Canada, Remote Posted 30+ Days Ago

Read the full description at nvidia.wd5.myworkdayjobs.com. FewerJobs shows a short excerpt and links to the source.