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Signal Processing Engineer

Neuralink - Austin, Texas, United States; South San Francisco, California, United States

Posted Apr 30, 2026

Benefits

Parental leave
Not verified
Non-birth-parent leave
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Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Verification
Not verified checked Jun 7, 2026
Salary
$121K-$230K From the posting source checked Jun 20, 2026
401(k) match
Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)
$116,543 U.S. median for this role
Projected growth (BLS Employment Projections)
+9.8% - Much faster than average

51% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Engineering From the posting source checked Jun 20, 2026
Seniority
Mid From the posting source checked Jun 20, 2026

Schedule

Shift type
Not verified
Weekend work
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Company

Equity
Offered From the posting source checked Jun 20, 2026

Application

Cover letter
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Assessment
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Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

Signal Processing Engineer Austin, Texas, United States; South San Francisco, California, United States About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world. Job Summary We are seeking a talented Signal Processing Engineer to design, develop, and optimize advanced digital signal processing (DSP) algorithms for on-chip and embedded implementation. In this role, you will create efficient, hardware-friendly algorithms that run directly on custom SoCs, enabling real-time processing with constraints on power, latency, area, and throughput. You will collaborate closely with the SoC, Firmware, and Machine Learning teams to translate high-level signal processing needs into production-ready solutions. Key Responsibilities - Design and develop signal processing algorithms for sensing neural activity in the cortex (e.g. spike detection), monitoring cortical electrode health, and more. - Design and develop numerical algorithms, such as custom data compression to increase radio throughput. - Develop fixed-point or quantized versions of algorithms optimized for constrained hardware. - Implement and verify algorithms in high-level languages and transition them to hardware-friendly representations. - Perform algorithm-to-architecture mapping: analyze trade-offs between accuracy, latency, power, and resource utilization on the SoCs. - Collaborate with the digital design team to define micro-architectures for custom on-chip processing pipelines, including dataflow, pipelining, and parallelization. Required Qualifications - Education : BS, MS or PhD in Electrical Engineering, Computer Engineering, Signal Processing, or a related field. - Experience : 3+

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