Logic Design Engineer
Intel - India, Bangalore
Posted 5/6/2026
Verified benefits
- Parental leave
- 12 weeks source
- Non-birth-parent leave
- 12 weeks
- Verified
- Yes last checked unknown
- Salary
- Not disclosed
Where they hire
State eligibility is not yet verified.
About this role
Logic Design Engineer India, Bangalore Logic Design Engineer /job/India-Bangalore/Logic-Design-Engineer_JR0283536 India, Bangalore Posted Today
Read the full description at intel.wd1.myworkdayjobs.com. FewerJobs shows a short excerpt and links to the source.
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