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Software Engineer, TPU Compiler Development Infrastructure

Google - Sunnyvale, CA, USA

Posted Jun 5, 2026

Benefits

Parental leave
18 weeks From the posting source checked Jun 20, 2026
Non-birth-parent leave
18 weeks From the posting source checked Jun 20, 2026
Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
Not verified
Relocation assistance
Not verified
Childcare support
Not verified
Learning budget
Not verified
Verification
Source-linked checked May 7, 2026
Salary
$147K-$211K From the posting source checked Jun 20, 2026
401(k) match
Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)
$116,543 U.S. median for this role
Projected growth (BLS Employment Projections)
+9.8% - Much faster than average

54% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Engineering From the posting source checked Jun 20, 2026
Seniority
Mid From the posting source checked Jun 20, 2026

Schedule

Shift type
Not verified
Weekend work
Not verified

Company

Company stage
Public-company From the posting source checked Jun 20, 2026
Equity
Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter
Not verified
Assessment
Not verified
Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

Software Engineer, TPU Compiler Development Infrastructure Sunnyvale, CA, USA Our team develops the Accelerated Linear Algebra (XLA) compiler which enables TPUs, Google's in-house custom designed processor, to accelerate machine learning and other scientific computing workloads for both internal Google customers and external Cloud customers. The XLA TPU team is reaching a critical threshold of complexity at a time when the demand for rapid iteration has never been higher. This role is designed to manage the infrastructure friction that compiler engineers face daily, effectively multiplying output of the entire team. In concrete terms we need to pull down the average team presubmit latency from the current 1.5. hours to 20 min and minimize Changelist (CL) rollback (catch issues early). While this position does not require prior experience with compilers, hardware, or deep ML expertise, bout it does require someone who genuinely enjoys the craft of building great infrastructure unblocking developer productivity. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $147000 - $211000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Reduce CL time to submit for a CL and minimize CL rollback for the whole XLA TPU team. Drive infrastructure improvements that remove friction from the daily development of the XLA TPU Compiler team. Develop tools supporting compiler engineers as they work through stages of new TPU introduction (e.g., testing when hardware is not yet available or very limited). Modernize and simplify build/test

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