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Technical Program Manager – Hardware/Silicon, Principal

d-Matrix - Santa Clara, Santa Clara, Ca, Ca, United States

Posted Dec 10, 2025

Benefits

Parental leave
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Non-birth-parent leave
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Family-building benefits
  • Fertility benefits: Not verified
  • Adoption assistance: Not verified
  • Surrogacy assistance: Not verified
Mental health support
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Relocation assistance
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Childcare support
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Learning budget
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Verification
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Salary
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401(k) match
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Market context

U.S. role benchmark (BLS OEWS)
$61,842 U.S. median for this role
Projected growth (BLS Employment Projections)
+1.9% - Slower

Matched to SOC 11-1021 - Operations aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function
Operations From the posting source checked Jun 20, 2026
Seniority
Principal From the posting source checked Jun 20, 2026

Schedule

Shift type
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Weekend work
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Company

Equity
Offered From the posting source checked Jun 20, 2026

Application

Cover letter
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Assessment
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Deadline
Not stated

Where they hire

State eligibility is not yet verified.

About this role

Technical Program Manager – Hardware/Silicon, Principal Santa Clara, Santa Clara, Ca, Ca, United States At d-Matrix , we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive , and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together , we can help shape the endless possibilities of AI. Location: Hybrid, working onsite at our Santa Clara, Ca headquarters 3-5 days per week. The Role: Principal Technical Program Manager, HW/Silicon We are seeking a Principal Technical Program Manager to drive engineering excellence across the global hardware organization. This role will focus on creating lightweight, scalable processes that enable predictable project delivery in a high-growth startup environment. You will partner with engineering leaders to translate company objectives into actionable software programs, improve planning and execution practices, and foster collaboration across geographies and technical domains. The ideal candidate should be comfortable working in a fast-paced, globally distributed environment and is passionate about delivering high-quality software on time. What you will do: - Lead end-to-end program management across chip development cycle: feature trade-offs between Product, Architecture, and Design teams; chip architecture, RTL design, design verification, emulation, modeling (power, performance), Design for Test (DFT),

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