Staff Software Engineer - Kernels
d-Matrix - Santa Clara, Santa Clara, Ca, Ca, United States
Posted May 15, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Salary
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- 401(k) match
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Schedule
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- Weekend work
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Application
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- Deadline
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Where they hire
State eligibility is not yet verified.
About this role
Staff Software Engineer - Kernels Santa Clara, Santa Clara, Ca, Ca, United States At d-Matrix , we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive , and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together , we can help shape the endless possibilities of AI. Location: Hybrid, working onsite at our Santa Clara, Ca headquarters 3+ days per week. The Role: Staff Software Engineer - Kernels What you will do: The role requires you to be part of the team that helps productize the SW stack for our AI compute engine. As part of the software team, you will be responsible for the development, enhancement, and maintenance of software kernels for next-generation AI hardware. You possess experience building software kernels for HW architectures. You possess a very strong understanding of various hardware architectures and how to map algorithms to the architecture. You understand how to map computational graphs generated by AI frameworks to the underlying architecture. You have had past experience working across all aspects of the full-stack toolchain and understand the nuances of what it takes to optimize and trade off various aspects of hardware-software co-design.
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