Analog Design Engineer Sr Staff
d-Matrix - Santa Clara, Santa Clara, Ca, Ca, United States
Posted Mar 19, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- 401(k) match
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Schedule
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- Weekend work
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Application
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Where they hire
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About this role
Analog Design Engineer Sr Staff Santa Clara, Santa Clara, Ca, Ca, United States At d-Matrix , we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive , and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together , we can help shape the endless possibilities of AI. Location: Hybrid, working onsite at our Santa Clara, Ca headquarters 3-5 days per week. The role: Analog Design Engineer, Senior / Staff /Sr. Staff What You Will Do: Analog-mixed signal integrated circuit design using (but not limited to) common circuit design tools from Cadence and Synopsys. Design state of the art In-Memory-Compute engine for Artificial Intelligence Inference Accelerator and High-Speed Die-2-Die Interface for scale-out. Job scope includes schematic circuit design, system level performance analysis, design test benches for simulations and verifications, guide layout engineers on layout in deep sub-micron process nodes from 4nm and below, and to optimize design and layout to achieve low power design performance over process-voltage-temperature corners and six-sigma Monte-Carlo yield analysis. • Independent minor layout tweaks when necessary. • Work with backend engineers on integration of design/layout. • Provide model of circuit for backend verification. • Participate in
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