Lead Test Engineer

Benefits

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Non-birth-parent leave

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Family-building benefits

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Verification

Not verified last checked Jun 13, 2026

Salary

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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Schedule

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Weekend work

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Application

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About this role

Lead Test Engineer Fremont, CA, United States Job Summary: We are seeking a highly skilled Senior Testing Engineer with extensive hands-on laboratory experience to lead the testing and performance characterization of our in-house developed silicon photonic integrated circuits (PICs). The ideal candidate will take full ownership of the development, setup, and optimization of optical and electrical test platforms-leveraging both existing infrastructure and newly acquired instrumentation. This position will be involved in the R&D characterization of our PICs and support small volume production during NPI phases. A successful candidate will be able to independently characterize PICs using common laboratory equipment such as fibers, lasers, detectors, DC probes, and source-meter units and be able to effectively communicate key results and issues to stakeholders.

Read the full description at hcwp.fa.us2.oraclecloud.com. FewerJobs shows a source-linked preview and links to the original posting.