Sr Mgr Validation Engineering
Rambus INC - San Jose, CA, US
Posted May 1, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
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- Relocation assistance
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- Childcare support
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- Learning budget
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- Verification
- Not verified last checked Jun 13, 2026
- Salary
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- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
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- Weekend work
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Application
- Cover letter
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- Assessment
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- Deadline
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Where they hire
State eligibility is not yet verified.
About this role
Sr Mgr Validation Engineering San Jose, CA, US Overview Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Validation Manager to join our Memory Interface Chip business unit. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. The Validation Manager is a Full-Time position and the candidate will manage and cooperate with the team to validate and characterize the product to deliver high-quality buffer chip products. The candidate is required to have experience with processor-memory interfaces, including DDR topologies and protocols, as well as high-speed signaling, including signal integrity and power integrity concepts. Location(s): Atlanta, GA; San Jose, CA; Responsibilities Partner with internal and external cross-functional teams, across all levels of a corporation, from executives, team managers and individual contributors including development engineers, and procurement experts Own, develop and continuously adapt and improve validation methodologies and technologies to continuously improve design validation coverage and time-to-market Partner with Design, Architecture, Verification, and Operation teams to deliver high-quality buffer chip products Work with external partners in sourcing test equipment, PCB manufacturing and assembly. Manage bench validation team to execute bench validation and characterization of memory buffer chips. Hands-on execution bench validation and characterization, and software development for lab automation. Qualifications Bachelors or M.S. degree in Electrical Engineering with 10+ years of industry experience in which at least a few years with exposure to DDR4/5. Prior experience in simulating high speed memory (DDR4, DDR5)
Read the full description at careers-rambus.icims.com. FewerJobs shows a source-linked preview and links to the original posting.
Apply link verified; last checked Jun 13, 2026.
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