Senior Package Design Engineer

Benefits

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Not verified last checked Jun 13, 2026

Salary

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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About this role

Senior Package Design Engineer San Jose, CA, US; Taipei, UNAVAILABLE, TW Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Senior Package Design Engineer to join our Package Engineering team in San Jose, CA. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. This is a full-time position reporting to the Director of Package Engineering. As a Senior Package Design Engineer, you will be responsible for supporting the design and layout of new products from early concept to tape out, focusing primarily on several elements that enable high-yielding, low defectivity production. The Senior Package Design Engineer will have the opportunity to work with multiple package technologies and outsourced suppliers to ensure manufacturing readiness for the Rambus product portfolio. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Drive early chip-package co-design and development of bump and ball map. Own layout of package types such as FCCSP, FCBGA, FCQFN, WLCSP, QFN. Collaborate with multiple cross-functional teams (Chip Design, SI/PI, Packaging) Analyze cost/performance/reliability trade-offs to complete layout of new products and test chips. Interact with OSAT partners and substrate/leadframe suppliers for design reviews and execution. Continuous improvement of package design workflow and unified package design guidelines.

Read the full description at careers-rambus.icims.com. FewerJobs shows a source-linked preview and links to the original posting.