Senior Principal Hardware Systems Engineer

Benefits

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Non-birth-parent leave

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Family-building benefits

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Mental health support

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Relocation assistance

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Market context

Median wage (BLS OEWS)

$116,543 national median

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

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Weekend work

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Application

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Assessment

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Deadline

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About this role

Senior Principal Hardware Systems Engineer United States, Remote Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview The explosive growth of AI workloads is fundamentally reshaping how server platforms are designed - demanding unprecedented bandwidth, accelerator density, and intelligent connectivity at every layer of the stack. Astera Labs is powering this transformation with purpose-built connectivity solutions that enable the world's most advanced AI and cloud infrastructure, and we need exceptional hardware systems engineers to help architect what comes next. The AI Platform Solutions Group is seeking a Senior Principal Hardware Systems Engineer to lead the architecture and delivery of high-performance compute platforms with deep focus on PCIe subsystem design, GPU/accelerator integration, high-speed Ethernet networking, and system-level platform development. You will own the end-to-end system design from architecture definition through bring-up and validation, working at the critical intersection of compute, networking, storage, and Astera Labs' connectivity portfolio - including our PCIe retimers, switches, and fabric controllers. This role combines hands-on engineering depth with system-level architectural

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