SoC Debug and Automation Engineering Program Manager

Benefits

Parental leave

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Non-birth-parent leave

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Family-building benefits

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Mental health support

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Childcare support

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Learning budget

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Verification

Not verified last checked Jun 13, 2026

Salary

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401(k) match

Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.

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Schedule

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Weekend work

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Application

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Deadline

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Where they hire

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About this role

SoC Debug and Automation Engineering Program Manager Austin, United States of America Apple seeks a SoC Debug and Automation Engineering Program Manager (EPM) within the Silicon Engineering Group (SEG) to drive silicon program schedules, silicon readiness milestones, and cross-functional issue resolution that enable timely delivery of next generation Apple SoCs. You will lead programs spanning debug, bring-up, validation, and production release while championing automation and process efficiency to scale the EPM function and shape future silicon designs through lessons learned. SoC and Silicon Readiness Program Management: - Support driving cross-functional program execution across Design, Verification, Validation, and Software teams - tracking issues, flagging dependencies, and helping keep deliverables on schedule through regular syncs with teams. - Prepare and maintain issue reports, bug tracking summaries, status updates, and readiness dashboards that provide timely visibility into program health for engineering teams and stakeholders. - Assist in tracking Silicon Readiness milestones from tape-out through bring-up and production release, helping surface risks, maintain phase checklists, and contribute to mitigation plans across Design, Validation, and Product Engineering teams. - Identify and automate program management workflows - including issue tracking, status reporting, and milestone monitoring - using Python or Java, with integration into existing internal toolchains. - Apply LLM tools and agentic frameworks (e.g., Claude Code) to streamline PM workflows; stay current on Apple's internal AI capabilities and support teammates in adopting relevant tools and best practices. Minimum Qualifications: SoC/VLSI chip design or post-silicon validation, with familiarity in SoC architecture and associated IPs. Experience leading debug

Read the full description at jobs.apple.com. FewerJobs shows a source-linked preview and links to the original posting.