PMU Design Verification Engineer: Analog & Mixed Signal Engineer
Apple - Austin, United States of America
Posted Apr 17, 2026
Benefits
- Parental leave
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- Non-birth-parent leave
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- Family-building benefits
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- Fertility benefits: Not verified
- Adoption assistance: Not verified
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- Mental health support
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- Childcare support
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- Learning budget
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- Verification
- Not verified last checked Jun 13, 2026
- Salary
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- 401(k) match
- Listed Source: EMPLR_CONTRIB_INCOME_AMT. source Last checked Jun 13, 2026.
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Schedule
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- Weekend work
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Application
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- Deadline
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Where they hire
State eligibility is not yet verified.
About this role
PMU Design Verification Engineer: Analog & Mixed Signal Engineer Austin, United States of America Did you know that Apple is hiring analog & mixed signal verification engineers? We are looking for engineers that are enthusiastic to find bugs! You have the opportunity to work with a creative team to craft test plans and enable production-quality first silicon. As a member of the analog and mixed signal verification team, you will be working with specialists for full-chip verification of the state of the art mixed-signal systems used in Apple's world-leading products! In this role, you will be responsible for ensuring high quality silicon for IC chips and IPs. Daily work involves verification of mixed signal IC designs using a combination of analog circuits and RTL in the same simulation. Responsibilities include all phases of pre-silicon verification from early discussions with architects, reviewing specifications, writing verification plans, running simulations, triaging issues, and reviewing results with the team. • Develop detailed test and coverage plans based on IC specifications. • Completion of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out. • Develop verification methodology suitable for the IP, ensuring scalability and portability. • Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage. • Sign-off mixed signal designs in preparation for tapeout. Minimum Qualifications: BS and a minimum of 3 years of relevant industry experience. Preferred Qualifications: Ability to verify analog/mixed-signal designs in a collaborative team environment. Proficient in hardware descriptive languages: Verilog, System-Verilog, and/or
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