Senior FPGA Verification Engineer

Benefits

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Mental health support

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Learning budget

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Salary

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Market context

Median wage (BLS OEWS)

$116,543 national median

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

57% above the BLS national median for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Schedule

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Weekend work

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Application

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Assessment

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Deadline

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Where they hire

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About this role

Senior FPGA Verification Engineer Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE TEAM The Air Dominance and Strike (AD&S) Electrical Engineering Team develops high-reliability avionics, embedded processing, and power systems for Group 5 air vehicles and missile platforms. The team delivers flight-critical electronics, PCB assemblies, and FPGA-based processing architectures for Anduril's next-generation autonomous air platforms. AD&S Electrical Engineers drive end-to-end development, from system architecture and circuit design to verification, integration, and flight test. Solutions must be scalable, mission-ready, and meet the performance, reliability, and survivability demands of modern air warfare. ABOUT THE JOB We are looking for a Senior/Staff FPGA Verification Engineer to join our rapidly growing team in Costa Mesa, CA. You will lead verification strategy and methodology for FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics, owning UVM-based methodology, coverage-driven verification, and the roadmap for verification tooling across our programs.

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