Sr. ASIC Design Engineer, Blink/Ring ASIC Team

Benefits

Parental leave

6 weeks From the posting source checked Jun 20, 2026

Non-birth-parent leave

6 weeks From the posting source checked Jun 20, 2026

Family-building benefits

• Fertility benefits: Offered From the posting source checked Jun 20, 2026
• Adoption assistance: Offered From the posting source checked Jun 20, 2026
• Surrogacy assistance: Not verified

Mental health support

Offered From the posting source checked Jun 20, 2026

Relocation assistance

Not verified

Childcare support

Offered From the posting source checked Jun 20, 2026

Learning budget

Not verified

Verification

Source-linked checked Jun 7, 2026

Salary

Not verified

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Senior From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Sr. ASIC Design Engineer, Blink/Ring ASIC Team Cambridge, England, GBR Shape the Future of Smart Home Technology Join the innovative team behind Amazon's most beloved Cameras and Doorbells. We're not just building chips-we're creating the silicon brain that powers millions of homes worldwide, making them safer and smarter. Why This Role Matters As a Sr. ASIC Design Engineer on our Blink/Ring ASIC Team, you'll work on cutting-edge System-on-Chip (SoC) designs that directly impact customer experiences. Our vertically integrated environment means you'll see your innovations come to life in products that customers genuinely love-and you'll get there faster with our streamlined time-to-revenue approach. What Makes Us Different Innovation at Every Level: Work with our integrated verification/validation environment that spans from architectural modeling through post-silicon validation. We believe in giving engineers the best tools to do their best work. Customer-Obsessed Engineering: We work backwards from real customer needs to create super-low power, energy-efficient designs featuring the latest advances in AI, video processing, low-power communications, and cutting-edge CMOS fabrication technology. State-of-the-Art Technology: Push the boundaries with highly differentiated silicon that sets industry standards. Key job responsibilities Your Impact: - Architect the Future: Define architecture specifications that translate product vision into technical reality - Lead and Mentor: Create microarchitecture specifications and guide junior engineers in implementation - Drive Quality: Own the end-to-end process from RTL delivery through synthesis, power analysis, and timing closure - Collaborate Across Teams: Partner with verification and validation teams to ensure flawless execution from testplan to production - Innovate Continuously:

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