ML Accelerator Performance Validation Engineer, Post Silicon Validation

Benefits

Parental leave

6 weeks From the posting source checked Jun 20, 2026

Non-birth-parent leave

6 weeks From the posting source checked Jun 20, 2026

Family-building benefits

• Fertility benefits: Offered From the posting source checked Jun 20, 2026
• Adoption assistance: Offered From the posting source checked Jun 20, 2026
• Surrogacy assistance: Not verified

Mental health support

Offered From the posting source checked Jun 20, 2026

Relocation assistance

Not verified

Childcare support

Offered From the posting source checked Jun 20, 2026

Learning budget

Not verified

Verification

Source-linked checked Jun 7, 2026

Salary

$144K-$194K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

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Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

45% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Mid From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

ML Accelerator Performance Validation Engineer, Post Silicon Validation Austin, Texas, USA Annapurna Labs, an AWS organization with development centers in the U.S. and Israel, builds custom silicon and software for AWS customers. Our team combines cloud-scale innovation with world-class expertise across silicon engineering, hardware design, verification, software, and operations to tackle technical challenges that have never been seen before. Join our Post-Silicon Validation team to quantify and qualify the performance of AWS's custom ML training chips against architectural targets. You'll bridge the gap between silicon capabilities and real-world ML workload demands - ensuring our accelerators deliver on latency, throughput, and efficiency promises at cloud scale. You'll work in a fast-paced, startup-like environment alongside some of the brightest minds in the industry on next generation AI/ML hardware that powers AWS's training and inference infrastructure. Your analysis will directly shape architectural decisions for next-generation accelerators and determine when silicon is ready for production deployment. Key job responsibilities Design and execute performance benchmarks spanning micro-architectures to full model training Measure and analyze compute throughput, memory bandwidth, interconnect latency, and more Profile real ML workloads (transformer models, LLMs, vision models) on silicon Identify performance bottlenecks and work with architecture teams on optimization Build automated performance regression dashboards and tracking infrastructure Correlate silicon measurements against RTL simulation and emulation predictions A day in the life Your primary focus is measuring and understanding how our AI chips perform under real workloads. You'll spend mornings digging into benchmark results - figuring out where cycles are being lost

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