Lead ASIC Design Engineer, Amazon Leo
Amazon - Austin, Texas, USA
Posted Mar 27, 2026
Benefits
- Parental leave
- Not verified not verified - source not recorded; timestamp not recorded
- Non-birth-parent leave
- Not verified not verified - source not recorded; timestamp not recorded
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified
- Salary
- Not verified not verified - source not recorded; timestamp not recorded
- 401(k) match
- Not verified
Was this benefit information wrong? Tell us.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Lead ASIC Design Engineer, Amazon Leo Austin, Texas, USA Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities Lead RTL design and development of large subsystems and custom blocks. Integrate IP cores by choosing configuraton and connnectivity options to fit system requirements. Assimilate IP collateral to become the team's expert. Ownership as cognizant designer for integration with software. Partner with verification team to ensure complete test plans and functional coverage. Support the design through all phases: RTL/Gate simulations, emulation and post silicon implementations. In this role you will: · Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets. · Lead the definition, configuration and integration of SoC Subsystems of various types: Ethernet, SERDES, LPDDR5/6X, Arm CPU · Configure and integrate 3rd party IP blocks, develop support logic · Contribute to the SoC floor planning effort · Understand low power design & the impact of DFT on the blocks · Perform initial synthesis, timing analysis, CDC analysis and other back end interface flows · Assist verification team in unit verification including test plan development · Assist with debug
Read the full description at www.amazon.jobs. FewerJobs shows a source-linked preview and links to the original posting.
Apply link not verified; last-live date unavailable.
What verified means
Verified means a displayed claim has a recorded source field, a source URL when available, and a timestamp showing when FewerJobs checked or enriched the evidence.
Related jobs
-
Mechanical Engineering Manager 2 - 16282
Northrop Grumman - United States-Utah-Roy
-
Senior Software Engineer, Simulation and Integration
Axcelis Technologies INC - Beverly, MA
-
Payload AI&T Lead Staff Systems Engineer
Northrop Grumman - United States-Maryland-Linthicum
-
Senior Software Engineer, Equipment Control
Axcelis Technologies INC - Beverly, MA