Lead ASIC Design Engineer, Amazon Leo

Benefits

Parental leave

6 weeks From the posting source checked Jun 20, 2026

Non-birth-parent leave

6 weeks From the posting source checked Jun 20, 2026

Family-building benefits

• Fertility benefits: Offered From the posting source checked Jun 20, 2026
• Adoption assistance: Offered From the posting source checked Jun 20, 2026
• Surrogacy assistance: Offered From the posting source checked Jun 20, 2026

Mental health support

Offered From the posting source checked Jun 20, 2026

Relocation assistance

Not verified

Childcare support

Offered From the posting source checked Jun 20, 2026

Learning budget

Not verified

Verification

Source-linked checked Jun 7, 2026

Salary

$159K-$215K From the posting source checked Jun 20, 2026

401(k) match

Reported from DOL Form 5500 industry filing (not employer-specific)

Was this benefit information wrong? Tell us.

Market context

U.S. role benchmark (BLS OEWS)

$116,543 U.S. median for this role

Projected growth (BLS Employment Projections)

+9.8% - Much faster than average

61% above the BLS role benchmark for software engineering aggregate.

Matched to SOC 15-1252 - Software Engineering aggregate by role bucket.

Source: U.S. Bureau of Labor Statistics, OEWS, May 2024 and Employment Projections, 2024-2034.

Role

Role function

Engineering From the posting source checked Jun 20, 2026

Seniority

Senior From the posting source checked Jun 20, 2026

Schedule

Shift type

Not verified

Weekend work

Not verified

Company

Company stage

Public-company From the posting source checked Jun 20, 2026

Equity

Offered Verified - SEC 10-K source checked Jun 20, 2026

Application

Cover letter

Not verified

Assessment

Not verified

Deadline

Not stated

Where they hire

State eligibility is not yet verified.

About this role

Lead ASIC Design Engineer, Amazon Leo Austin, Texas, USA Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities Lead RTL design and development of large subsystems and custom blocks. Integrate IP cores by choosing configuraton and connnectivity options to fit system requirements. Assimilate IP collateral to become the team's expert. Ownership as cognizant designer for integration with software. Partner with verification team to ensure complete test plans and functional coverage. Support the design through all phases: RTL/Gate simulations, emulation and post silicon implementations. In this role you will: · Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets. · Lead the definition, configuration and integration of SoC Subsystems of various types: Ethernet, SERDES, LPDDR5/6X, Arm CPU · Configure and integrate 3rd party IP blocks, develop support logic · Contribute to the SoC floor planning effort · Understand low power design & the impact of DFT on the blocks · Perform initial synthesis, timing analysis, CDC analysis and other back end interface flows · Assist verification team in unit verification including test plan development · Assist with debug

Read the full description at www.amazon.jobs. FewerJobs shows a preview and links to the original posting.