Senior FPGA Engineer
Akuna Capital - Chicago, IL
Posted May 8, 2026
Benefits
- Parental leave
- Not verified
- Non-birth-parent leave
- Not verified
- Family-building benefits
-
- Fertility benefits: Not verified
- Adoption assistance: Not verified
- Surrogacy assistance: Not verified
- Mental health support
- Not verified
- Relocation assistance
- Not verified
- Childcare support
- Not verified
- Learning budget
- Not verified
- Verification
- Not verified
- Salary
- Not verified
- 401(k) match
- Not verified
Was this benefit information wrong? Tell us.
Schedule
- Shift type
- Not verified
- Weekend work
- Not verified
Application
- Cover letter
- Not verified
- Assessment
- Not verified
- Deadline
- Not stated
Where they hire
State eligibility is not yet verified.
About this role
Senior FPGA Engineer Chicago, IL About Akuna: Akuna Capital is an innovative trading firm with a strong focus on collaboration, cutting-edge technology, data driven solutions, and automation. We specialize in providing liquidity as an options market-maker - meaning we are committed to providing competitive quotes that we are willing to both buy and sell. To do this successfully, we design and implement our own low latency technologies, trading strategies, and mathematical models. Our Founding Partners first conceptualized Akuna in their hometown of Sydney. They opened the firm's first office in 2011 in the heart of the derivatives industry and the options capital of the world - Chicago. Today, Akuna is proud to operate from additional offices in Sydney, Shanghai, London, and Singapore. What you'll do as a Senior FPGA Engineer at Akuna: We are looking for Senior FPGA Engineers to accelerate various portions of our trading platform . Members of the Hardware Development team will work with cutting-edge FPGA technology and high-performance computing architectures - owning projects end-to-end and making Akuna's systems faster and smarter. In this role, you will: - Own projects - driving project progress ion from inception , requirements, architecture, design entry, timing closure and verification - Partner closely with the Low Latenc y , Trading and other teams to foster and develop ideas that improve trading systems' performance and competitiveness - Develop and maintain RTL in Verilog / S ystemVerilog - Write and maintain verification environments - Design optimization for timing closure - Develop and maintain
Read the full description at www.akunacapital.com. FewerJobs shows a source-linked preview and links to the original posting.
Apply link not verified; last-live date unavailable.
What verified means
Verified means a displayed claim has a recorded source field, a source URL when available, and a timestamp showing when FewerJobs checked or enriched the evidence.
Related jobs
-
Hardware System and Board Failure Analysis Technical Lead
Cisco - Milpitas, California, US
-
Sr. Staff System Architect
Northrop Grumman - United States-Illinois-Rolling Meadows
-
Senior Project Manager - Product Implementation
Deluxe CORP - 2 Locations
-
Sr. Staff Product Operations Manager, Product Lifecycle (Remote)
Cisco - Coral Gables, Florida, US