I'm looking for a job. I exported this list from FewerJobs.com - a curated job board.

Please:
1. Rank these jobs by fit for me, given my resume / skills.
2. Highlight the top 5 with a one-sentence rationale each.
3. Flag any concerns, including benefit values without source-backed evidence.
4. Suggest one or two filter changes I could make on FewerJobs to find more good matches.

Filters I applied:
- q: ON Semiconductor
- quality_floor: default
- match_401k_strict: true
- parental_strict: true
- non_birth_strict: true
- pto_strict: true
- include_older: false
- verified_benefits_only: true
- apply_url_verified: false
- page: 1
- per_page: 100
- sort: relevance

Jobs (100 total):

---
TITLE: Staff / Principal Semiconductor Device Engineer (FinFET Technologies)
EMPLOYER: NXP Semiconductors
LOCATION: Hsinchu (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/Staff---Principal-Semiconductor-Device-Engineer--FinFET-Technologies-_R-10063867
EXCERPT: Staff / Principal Semiconductor Device Engineer (FinFET Technologies) Hsinchu posted: Posted 3 Days Ago
---
TITLE: CMP SEMICONDUCTOR EQUIPMENT TECHNICIAN
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Ed Bluestein, Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Ed-Bluestein-Manufacturing/CMP-SEMICONDUCTOR-EQUIPMENT-TECHNICIAN_R-10063018
EXCERPT: CMP SEMICONDUCTOR EQUIPMENT TECHNICIAN Austin (Ed Bluestein, Manufacturing) posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Assembler
EMPLOYER: NXP Semiconductors
LOCATION: Kuala Lumpur (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kuala-Lumpur/Semiconductor-Assembler_R-10057883
EXCERPT: Semiconductor Assembler Kuala Lumpur posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Maintenance Technician – Etch/Metals
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Etch-Metals_R-10062909
EXCERPT: Semiconductor Maintenance Technician – Etch/Metals Chandler (Manufacturing) posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Maintenance Technician – Etch/Metals
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-30
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Etch-Metals_R-10063543-1
EXCERPT: Semiconductor Maintenance Technician – Etch/Metals Chandler (Manufacturing) posted: Posted 13 Days Ago
---
TITLE: CVD PM Machinist - Semiconductor Maintenance
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---EPI_R-10060359
EXCERPT: CVD PM Machinist - Semiconductor Maintenance Chandler (Manufacturing) posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Maintenance Technician – Diffusion/Cleans
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Diffusion-Cleans_R-10062137-1
EXCERPT: Semiconductor Maintenance Technician – Diffusion/Cleans Chandler (Manufacturing) posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Maintenance Technician – Etch PM Machinist
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-22
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Etch-PM-Machinist_R-10063545
EXCERPT: Semiconductor Maintenance Technician – Etch PM Machinist Chandler (Manufacturing) posted: Posted 21 Days Ago
---
TITLE: Semiconductor Maintenance Technician - Photo
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Photo_R-10060144
EXCERPT: Semiconductor Maintenance Technician - Photo Chandler (Manufacturing) posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Maintenance Technician - CMP
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---CMP_R-10063918
EXCERPT: Semiconductor Maintenance Technician - CMP Chandler (Manufacturing) posted: Posted Yesterday
---
TITLE: Semiconductor Maintenance Technician - CVD
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---CVD_R-10063494
EXCERPT: Semiconductor Maintenance Technician - CVD Chandler (Manufacturing) posted: Posted 24 Days Ago
---
TITLE: Semiconductor Maintenance Technician – CMP Rebuild/PM Machinist
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---CMP-Rebuild-PM-Machinist_R-10063128
EXCERPT: Semiconductor Maintenance Technician – CMP Rebuild/PM Machinist Chandler (Manufacturing) posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Maintenance Technician – Machine Shop
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Office/Semiconductor-Maintenance-Technician---Machine-Shop_R-10061682
EXCERPT: Semiconductor Maintenance Technician – Machine Shop Chandler (Office) posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Equipment Engineer
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer_01851347
EXCERPT: Semiconductor Equipment Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 3 Days Ago
---
TITLE: Silicon Reliability Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Shanghai (JingAn) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Shanghai-JingAn/Silicon-Reliability-Engineer_R-10063793-1
EXCERPT: Silicon Reliability Engineer Shanghai (JingAn) posted: Posted Today
---
TITLE: SoC Hardware Architect
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Oakhill, Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/SoC-Hardware-Architect_R-10063821
EXCERPT: SoC Hardware Architect Austin (Oakhill, Office) posted: Posted 7 Days Ago
---
TITLE: Technical Director, DFT
EMPLOYER: NXP Semiconductors
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Technical-Director--DFT_R-10063199
EXCERPT: Technical Director, DFT Bangalore posted: Posted Yesterday
---
TITLE: Principal SOC Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-14
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-SOC-Verification-Engineer_R-10063252
EXCERPT: Principal SOC Verification Engineer Noida posted: Posted 29 Days Ago
---
TITLE: Chip Architect
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Chip-Architect_R-10062865
EXCERPT: Chip Architect Pune posted: Posted 17 Days Ago
---
TITLE: IC SoC Product & Subsystem Architect (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Hamburg (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hamburg/IC-SoC-Product---Subsystem-Architect_R-10063107
EXCERPT: IC SoC Product & Subsystem Architect (f/m/d) Hamburg posted: Posted 30+ Days Ago
---
TITLE: Embedded Systems Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Roznov (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Roznov/Embedded-Systems-Engineer_R-10060346-1
EXCERPT: Embedded Systems Engineer Roznov posted: Posted 30+ Days Ago
---
TITLE: Sr Synthesis and Implementation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Sr-Synthesis-and-Implementation-Engineer_R-10063207
EXCERPT: Sr Synthesis and Implementation Engineer 3 Locations posted: Posted 28 Days Ago
---
TITLE: SOC L3 Analyst
EMPLOYER: NXP Semiconductors
LOCATION: Bucharest (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bucharest/SOC-L3-Analyst_R-10061886-1
EXCERPT: SOC L3 Analyst Bucharest posted: Posted 30+ Days Ago
---
TITLE: Director/Chip Architect
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Director-Chip-Architect_R-10062315
EXCERPT: Director/Chip Architect Pune posted: Posted 30+ Days Ago
---
TITLE: Principal DFT Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Principle-DFT-Engineer_R-10062708-1
EXCERPT: Principal DFT Engineer Pune posted: Posted 30+ Days Ago
---
TITLE: Senior/Lead SoC Emulation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-14
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Lead-SoC--Emulation-Engineer_R-10062762
EXCERPT: Senior/Lead SoC Emulation Engineer Noida posted: Posted 29 Days Ago
---
TITLE: Senior Analog IC Design F/M
EMPLOYER: NXP Semiconductors
LOCATION: Catania (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Senior-Analog-IC-Design-F-M_R-10063803
EXCERPT: Senior Analog IC Design F/M Catania posted: Posted Yesterday
---
TITLE: Senior Engineer - SoC Design Verification
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer---SoC-Design-Verification_R-10062405
EXCERPT: Senior Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago
---
TITLE: ATE Test Hardware Design - Director
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/ATE-Test-Hardware-Design---Director_R-10062616-1
EXCERPT: ATE Test Hardware Design - Director 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Principle Engineer - SoC Design Verification
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Principle-Engineer---SoC-Design-Verification_R-10062408-1
EXCERPT: Principle Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago
---
TITLE: Embedded SW Developer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Roznov/Rust-Embedded-SW-Developer_R-10061883
EXCERPT: Embedded SW Developer 2 Locations posted: Posted 2 Days Ago
---
TITLE: Semiconductor Maintenance Technician – Etch PM Machinist
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Etch-PM-Machinist_R-10062911
EXCERPT: Semiconductor Maintenance Technician – Etch PM Machinist Chandler (Manufacturing) posted: Posted 30+ Days Ago
---
TITLE: CVD PM Machinist - Semiconductor Maintenance Technician
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---CVD_R-10062136
EXCERPT: CVD PM Machinist - Semiconductor Maintenance Technician Chandler (Manufacturing) posted: Posted 30+ Days Ago
---
TITLE: Senior Principle Engineer - SoC Design Verification
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principle-Engineer---SoC-Design-Verification_R-10061929
EXCERPT: Senior Principle Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago
---
TITLE: Candidature Spontanée / Spontaneous Application – NXP Semiconductors France
EMPLOYER: NXP Semiconductors
LOCATION: 5 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Toulouse/General-Job-Application-Candidature-Spontane_R-10014465
EXCERPT: Candidature Spontanée / Spontaneous Application – NXP Semiconductors France 5 Locations posted: Posted 30+ Days Ago
---
TITLE: Senior Engineer - SoC Design Engineering
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer---SoC-Design-Engineering_R-10062288
EXCERPT: Senior Engineer - SoC Design Engineering Pune posted: Posted 30+ Days Ago
---
TITLE: Senior Digital IP Design Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Design-Engineer--f-m-d-_R-10063822
EXCERPT: Senior Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: Semiconductor Maintenance Technician – Diffusion Quartz & PM Machinist
EMPLOYER: NXP Semiconductors
LOCATION: Chandler (Manufacturing) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Diffusion-Quartz---PM-Machinist_R-10063646
EXCERPT: Semiconductor Maintenance Technician – Diffusion Quartz & PM Machinist Chandler (Manufacturing) posted: Posted 17 Days Ago
---
TITLE: technician Area 1
EMPLOYER: NXP Semiconductors
LOCATION: Nijmegen (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-06
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Nijmegen/technician-Area-1_R-10063236-1
EXCERPT: technician Area 1 Nijmegen posted: Posted 6 Days Ago
---
TITLE: Semiconductor Materials Section Manager 2
EMPLOYER: Northrop Grumman
LOCATION: United States-California-Manhattan Beach (unspecified)
SALARY: $161K-$242K
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.northropgrumman.com/careers/job/1340072086975
EXCERPT: Semiconductor Materials Section Manager 2 United States-California-Manhattan Beach RELOCATION ASSISTANCE: No relocation assistance available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. The Semiconductor Materials group of Northrop Grumman Mission Systems (NGMS) is seeking a Semiconductor Materials Section Manager for Advanced Semiconductor Materials Development, reporting to the Department Manager for our Space Park Foundry (SPF). Located in Manhattan Beach, Los Angeles, we design, manufacture, and test semiconductor products for internal and commercial production customers, as well as emerging technology programs. Northrop Grumman's SPF semiconductor foundry is a unique capability supporting a range of production microelectroni
---
TITLE: Systems IC Architect
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-17
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Systems-IC-Architect_R-10063523
EXCERPT: Systems IC Architect 2 Locations posted: Posted 26 Days Ago
---
TITLE: Senior Hardware ASIC Arch/Design Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Hyderabad (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Hardware-ASIC-Arch-Design-Engineer_R-10061529
EXCERPT: Senior Hardware ASIC Arch/Design Engineer Hyderabad posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Assembler
EMPLOYER: The Boeing Company
LOCATION: USA - Sylmar, CA (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 12 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 12 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://boeing.wd1.myworkdayjobs.com/External_Careers/job/USA---Sylmar-CA/Semiconductor-Assembler_00000267573
EXCERPT: Semiconductor Assembler USA - Sylmar, CA posted: Posted 30+ Days Ago
---
TITLE: Sales Representative for Semiconductor Business
EMPLOYER: 3M
LOCATION: JP, OSAKA, VIRTUAL (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://3m.wd1.myworkdayjobs.com/Search/job/JP-OSAKA-VIRTUAL/Sales-Representative-for-Semiconductor-Business_R01164211
EXCERPT: Sales Representative for Semiconductor Business JP, OSAKA, VIRTUAL posted: Posted 30+ Days Ago
---
TITLE: Senior DfT Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Caen (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Caen/Senior-DfT-Engineer_R-10062175
EXCERPT: Senior DfT Engineer Caen posted: Posted 30+ Days Ago
---
TITLE: Mergers & Acquisition, Lead Transaction Principal
EMPLOYER: Teradyne
LOCATION: North Reading, MA (unspecified)
SALARY: $220K-$352K
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://jobs.teradyne.com/Teradyne/job/North-Reading-Mergers-&-Acquisition%2C-Lead-Transaction-Principal-MA/1389582400/
EXCERPT: Mergers & Acquisition, Lead Transaction Principal North Reading, MA ABOUT TERADYNE Teradyne is a global leader in automated test equipment and industrial automation, enabling customers across the semiconductor, electronics, and advanced manufacturing ecosystem to accelerate innovation and deliver high-quality products at scale. Across semiconductor test, system-level and wafer-level test, photonics, and adjacent semiconductor capital equipment, Teradyne operates at the intersection of deep engineering, complex supply chains, and long investment cycles. Strategic M&A plays a critical role in expanding Teradyne's served markets and strengthening long-term technology leadership. OPPORTUNITY OVERVIEW Teradyne is seeking a Lead Transaction Principal to own and execute mergers, acquisitions, divestitures, and strategic technology transactions across its semiconductor and semiconductor capital equipment businesses. This role carries end-to-end accountability for transactions from early assessment through execution, signing, and close, and requires close partnership with engineering, product, operational, and executive leadership. KEY RESPONSIBILITIES Own end-to-end M&A and strategic transactions across semiconductor test, wafer-level test, system-level test, and adjacent semiconductor capital equipment segments. Lead deal strategy, valuation framing, and execution from early evaluation through closing. Lead cross-functional deal teams spanning engineering, product management, operations, finance, legal, tax, HR, and IT. Evaluate target technologies,
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TITLE: Principle Analog Design Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Shanghai (JingAn) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Shanghai-JingAn/Principle-Analog-Design-Engineer_R-10063955
EXCERPT: Principle Analog Design Engineer Shanghai (JingAn) posted: Posted Yesterday
---
TITLE: 3M 기술연구소 테크니션(Technician, Semiconductor lab)
EMPLOYER: 3M
LOCATION: KR, Gyeonggi-do, Hwaseong (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-23
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://3m.wd1.myworkdayjobs.com/Search/job/KR-Gyeonggi-do-Hwaseong/XMLNAME-3M---Technician---Semiconductor-lab-_R01165539
EXCERPT: 3M 기술연구소 테크니션(Technician, Semiconductor lab) KR, Gyeonggi-do, Hwaseong posted: Posted 20 Days Ago
---
TITLE: Internship - MicroLED application engineer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Eindhoven/Internship---MicroLED-application-engineer_R-10062875
EXCERPT: Internship - MicroLED application engineer 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Sr Synthesis and Front-End Implementation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Sr-Synthesis-and-Front-End-Implementation-Engineer_R-10063206
EXCERPT: Sr Synthesis and Front-End Implementation Engineer 3 Locations posted: Posted 28 Days Ago
---
TITLE: Semiconductor Equipment Engineer
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer_01835317
EXCERPT: Semiconductor Equipment Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago
---
TITLE: Senior Wet Etch Equipment Engineer, Raxium
EMPLOYER: Google
LOCATION: Fremont, CA, USA (unspecified)
SALARY: $144K-$209K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckcooGbS6K6Xp3QclKMmcQg6IQ2zEa6i_KRHwZDProXg3EjsACxwdTBzoMGryBawcP7ITZT1KIIOvVTzHn0An9SjgnmXxoFxTMi0Bn7Snc9TSvOft-ByKcOpi8GxdSw%3D%3D_V2&loc=US&title=Senior+Wet+Etch+Equipment+Engineer
EXCERPT: Senior Wet Etch Equipment Engineer, Raxium Fremont, CA, USA The Raxium Facility and Equipment team maintains a broad range of semiconductor and facility equipment and cleanroom infrastructure. Our expertise lies in understanding the relationship between semiconductor processing and its support equipment, enabling us to troubleshoot problems, execute tasks and collaborate on installing, modifying, maintaining and repairing cleanroom and facility support equipment. As a Senior Equipment Engineer, you will support our microLED and AR development. You will focus on expert-level maintenance, support and optimization of our semiconductor wet processing equipment. Supporting advanced wet processing equipment, you will assist with other critical tool sets if needed, including but not limited to automated wet benches, chemical handling, ECP, CMP, SRDs and CDUs. You will support installations, troubleshoot complex issues and perform preventive maintenance to maximize the reliability and performance of our toolsets.Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $144000 - $209000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Support semiconductor equipment
---
TITLE: Director of Engineering – ASIC Design
EMPLOYER: NXP Semiconductors
LOCATION: Hyderabad (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Director-of-Engineering---ASIC---SoC-Architecture---Design_R-10061209
EXCERPT: Director of Engineering – ASIC Design Hyderabad posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Equipment Engineer - 3rd Shift
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---3rd-Shift_01851618
EXCERPT: Semiconductor Equipment Engineer - 3rd Shift US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 3 Days Ago
---
TITLE: Precision Analog Data Converter Design
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-25
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Precision-Analog-Data-Converter-Design_R-10063473
EXCERPT: Precision Analog Data Converter Design 2 Locations posted: Posted 18 Days Ago
---
TITLE: Section Lead - Semiconductor Fab, Test and Inspection
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-29
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Section-Lead---Semiconductor-Fab--Test-and-Inspection_01848054
EXCERPT: Section Lead - Semiconductor Fab, Test and Inspection US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 14 Days Ago
---
TITLE: Senior Principal Engineer - SoC Design Verification
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principle-Engineer---SoC-Design-Verification_R-10062973
EXCERPT: Senior Principal Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago
---
TITLE: Senior Digital IP Verification Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Verification-Engineer--f-m-d-_R-10063820
EXCERPT: Senior Digital IP Verification Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: Semiconductor Equipment Engineer - 4th shift
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---4th-shift_01851612
EXCERPT: Semiconductor Equipment Engineer - 4th shift US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 2 Days Ago
---
TITLE: Digital Engineer for Integrated Circuits (Graduate) (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-27
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Digital-Engineer-for-Integrated-Circuits--Graduate---f-m-d-_R-10063430
EXCERPT: Digital Engineer for Integrated Circuits (Graduate) (f/m/d) Munich posted: Posted 16 Days Ago
---
TITLE: Semiconductor Equipment Engineer - Dielectrics Lead
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---Dielectrics-Lead_01837532
EXCERPT: Semiconductor Equipment Engineer - Dielectrics Lead US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago
---
TITLE: 4th Shift Technical Lead – Semiconductor Fab
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-29
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/XMLNAME-4th-Shift-Technical-Lead---Semiconductor-Fab_01848717
EXCERPT: 4th Shift Technical Lead – Semiconductor Fab US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 14 Days Ago
---
TITLE: Senior Principal Engineer, Analog Validation/Characterization
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Principal-Engineer--Analog-Validation-Characterization_R-10062839
EXCERPT: Senior Principal Engineer, Analog Validation/Characterization Noida posted: Posted 24 Days Ago
---
TITLE: Senior Principal Semiconductor Tech Lead Engineer
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Principal-Semiconductor-Tech-Lead-Engineer_01829265
EXCERPT: Senior Principal Semiconductor Tech Lead Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago
---
TITLE: Principal Digital IP Design Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Principal-Digital-IP-Design-Engineer--f-m-d-_R-10063823
EXCERPT: Principal Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: Senior Section Lead - Semiconductor Fab Test and Inspection
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-29
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Senior-Section-Lead---Semiconductor-Fab-Test-and-Inspection_01848055
EXCERPT: Senior Section Lead - Semiconductor Fab Test and Inspection US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 14 Days Ago
---
TITLE: Senior Principal Semiconductor Equipment & Process Integration Engineer
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-29
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Principal-Semiconductor-Equipment---Process-Integration-Engineer_01848723-1
EXCERPT: Senior Principal Semiconductor Equipment & Process Integration Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 14 Days Ago
---
TITLE: Electronics Hardware Engineer
EMPLOYER: GE Vernova
LOCATION: Niskayuna (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Niskayuna/Electronics-Hardware-Engineer_R5041321-1
EXCERPT: Electronics Hardware Engineer Niskayuna posted: Posted 30+ Days Ago
---
TITLE: Senior Semiconductor Facilities Engineer (Onsite - Andover MA)
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (onsite)
SALARY: Not disclosed
POSTED: 2026-06-08
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Senior-Semiconductor-Facilities-Engineer--Onsite---Andover-MA-_01847675
EXCERPT: Senior Semiconductor Facilities Engineer (Onsite - Andover MA) US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 4 Days Ago
---
TITLE: Senior Hardware Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Hyderabad (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Hardware-Verification-Engineer_R-10062078
EXCERPT: Senior Hardware Verification Engineer Hyderabad posted: Posted 30+ Days Ago
---
TITLE: Raytheon Fulltime 2026 - Semiconductor Foundry Engineer II
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Raytheon-Fulltime-2026---Semiconductor-Foundry-Engineer-II_01837192
EXCERPT: Raytheon Fulltime 2026 - Semiconductor Foundry Engineer II US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 30+ Days Ago
---
TITLE: Raytheon Full Time 2026 - Semiconductor Foundry Engineer I
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-14
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Raytheon-Full-Time-2026---Semiconductor-Foundry-Engineer-I_01837187
EXCERPT: Raytheon Full Time 2026 - Semiconductor Foundry Engineer I US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 29 Days Ago
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TITLE: EMC Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/EMC-Engineer--f-m-d-_R-10061511
EXCERPT: EMC Engineer (f/m/d) Munich posted: Posted 30+ Days Ago
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TITLE: Principal/Sr Principal Engineer Microelectronic Semiconductors
EMPLOYER: Northrop Grumman
LOCATION: United States-California-Manhattan Beach (unspecified)
SALARY: $114K-$171K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-California-Manhattan-Beach/Principal-Sr-Principal-Engineer-Microelectronic-Semiconductors_R10231255
EXCERPT: Principal/Sr Principal Engineer Microelectronic Semiconductors United States-California-Manhattan Beach RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. The Northrop Grumman Microelectronics Center (NGMC) has an opening for a Microelectronics Device Engineer to join our team of qualified, diverse individuals at our Space Park Foundry (SPF) location in Redondo Beach, CA. In the NGMC we design, manufacture, and test semiconductor products for internal and commercial production customers as well as emerging technology programs. The SPF semiconductor foundry has unique capabilities supporting a range of production microelectronics technologies (Gallium Arsenide, Indium Phosphide, and Gallium Nitride). SPF provides leading edge technology development in semiconductor materials, processes, devices, and 3D
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TITLE: Junior Layout Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Catania (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Junior-Layout-Engineer_R-10062969-1
EXCERPT: Junior Layout Engineer Catania posted: Posted 30+ Days Ago
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TITLE: Touch Sensor Hardware Engineer, Consumer Hardware
EMPLOYER: Google
LOCATION: New Taipei, Banqiao District, New Taipei City, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-03
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckRioIquBPIKy6ifFQ-h5Kq8Q0nhQ1TqIC5OCddVY28WZEjsACxwdTLz7lvbeg7obp0AtjJy4KhId6yMIpltz9az38JAJYZCDQcf8OXCMN4yiJOspB61sMOsJgIcGYA%3D%3D_V2&loc=TW&title=Touch+Sensor+Hardware+Engineer
EXCERPT: Touch Sensor Hardware Engineer, Consumer Hardware New Taipei, Banqiao District, New Taipei City, Taiwan Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Lead the development and integration of on-cell touch solutions, focusing on the interaction between touch sensors and Thin Film Encapsulation (TFE) for plastic Organic Light Emitting Diode (OLED). Partner with vendors to optimize Touch IC architecture (Analog Front End (AFE)/Microcontroller Unit (MCU)) and firmware algorithms to ensure high-levels of noise immunity and system performance. Define Engineering Requirements Specifications (ERS) and execute validation plans, including testing during early-stage development (Proto/EVT) and deep-dive failure analysis on complex modes. Manage technical dependencies between display driving and touch sensing to mitigate noise interference and ensure signal integrity in high-proximity architectures. Oversee physical engineering design layouts and manage display/touch vendors to ensure quality and perform root cause diagnosis for system-level issues during high-volume production ramps. Minimum qualifications: Bachelor's degree in Electrical Engineering, Physics, Materials Science, or a related field or equivalent practical experience. 2 years of experience in touch sensor module development, including
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TITLE: Senior Semiconductor Foundry Engineer – Actively Growing Our Engineering Team!
EMPLOYER: Raytheon Technologies
LOCATION: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Semiconductor-Foundry-Engineer---Actively-Growing-Our-Engineering-Team-_01837604
EXCERPT: Senior Semiconductor Foundry Engineer – Actively Growing Our Engineering Team! US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago
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TITLE: Sr. HiTech/Semiconductor Partner Solutions Architect, AMER Partner Industry & Solutions
EMPLOYER: Amazon
LOCATION: Seattle, Washington, USA (unspecified)
SALARY: $154K-$208K
POSTED: 2026-05-15
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10421102/sr-hitech-semiconductor-partner-solutions-architect-amer-partner-industry-solutions
EXCERPT: Sr. HiTech/Semiconductor Partner Solutions Architect, AMER Partner Industry & Solutions Seattle, Washington, USA Amazon Web Services (AWS) is looking for a Senior Partner Solutions Architect (PSA) with domain expertise in the Semiconductor and High-Tech Electronics industry. As a HiTech PSA, you will have the opportunity to deliver on our strategy of accelerating adoption of AWS cloud computing services through our consulting and technology partners and their semiconductor and electronics customers. AWS partners include the largest systems integrators, EDA tool providers, foundries, and innovative technology companies who are using AWS as their cloud platform of choice. This role will focus on working with multiple strategic consulting and technology partners to define and build technical solutions that drive top-of-funnel pipeline creation and deal progression. The ideal candidate will possess deep technical skill in semiconductor design workflows, EDA tool architectures, high-performance computing, storage architectures, and cloud computing, as well as customer-facing and technical sales skills at all levels of a sales organization. The ideal candidate should also have a demonstrated ability to think strategically about business, product, and technical challenges in the semiconductor industry. The ideal candidate is an influencer by nature and must be seen as someone partners and customers are eager to engage with and have a strong hands-on approach. They will be the subject matter expert for the Semiconductor/HiTech industry to become a trusted advisor to sales teams and customers, driving customer outcomes through partners. They will be responsible for accelerating customers' cloud adoption in the semiconductor industry, including chip
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TITLE: Hardware Engineer
EMPLOYER: GE Vernova
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-28
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Wilmington-NC-USA/Hardware-Engineer_R5043091-2
EXCERPT: Hardware Engineer 3 Locations posted: Posted 15 Days Ago
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TITLE: Senior Equipment Engineer, Raxium (Night Shift)
EMPLOYER: Google
LOCATION: Fremont, CA, USA (unspecified)
SALARY: $144K-$209K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckfZfN3CJbqjRr6sDaF4wQWA7zsCi4n9fNxLz35hzS5DuEjsACxwdTC1eWDloxfD3UW1in8gl0dwdhtJ1kdONKHqxz6DDzDXuDNmZype_tSuX3ge_gAD7tdc5dI59mw%3D%3D_V2&loc=US&title=Senior+Equipment+Engineer
EXCERPT: Senior Equipment Engineer, Raxium (Night Shift) Fremont, CA, USA The Raxium Facility and Equipment team maintains a broad range of semiconductor/facility equipment and clean room infrastructure. Our expertise lies in understanding the relationship between semiconductor processing and its support equipment, enabling us to troubleshoot problems, execute tasks, and collaborate on installing, modifying, maintaining, and repairing clean room and facility support equipment. In this role, you will focus on expert-level maintenance, support, and optimization of semiconductor processing equipment, with a specific emphasis on advanced vacuum systems used in Chemical Vapor Deposition (CVD), Inductively Coupled Plasma (ICP), and Reactive Ion Etching (RIE). You will bring a broad understanding of semiconductor manufacturing to support other critical tool sets as needed, including Electrochemical Plating (ECP), Chemical Mechanical Polishing (CMP), lithography, and wet etch. You will leverage your experience to lead installations, troubleshoot complex issues, and execute preventative maintenance programs that maximize the reliability and performance of our tool sets.Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $144000 - $209000 (USD) + 15% bonus target
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TITLE: Field Application Engineer - Microcontrollers
EMPLOYER: NXP Semiconductors
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Field-Application-Engineer---Microcontrollers_R-10063782
EXCERPT: Field Application Engineer - Microcontrollers 3 Locations posted: Posted 7 Days Ago
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TITLE: Semiconductor Design Engineer (Teradyne, Costa Rica)
EMPLOYER: Teradyne
LOCATION: Semiconductor Design Engineer (Teradyne, Costa Rica) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://jobs.teradyne.com/Teradyne/job/Alajuela-Semiconductor-Design-Engineer-%28Teradyne%2C-Costa-Rica%29/1397296700/
EXCERPT: Semiconductor Design Engineer (Teradyne, Costa Rica) Semiconductor Design Engineer (Teradyne, Costa Rica) We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive. Opportunity Overview We're looking for a highly experienced Senior Analog Layout Engineer to join our semiconductor design team. In this role, you will lead the physical layout and verification of complex analog and mixed-signal ASICs in advanced FinFET technologies, helping deliver the next generation of Teradyne's test and automation platforms. You'll collaborate closely with circuit designers, physical design engineers, and cross-functional partners to create high-quality, manufacturable layouts that meet demanding performance, reliability, and schedule targets. Key Responsibilities Lead the layout design and integration of complex analog and mixed-signal ASIC blocks using Cadence Virtuoso. Develop floorplans, placement, routing, and top-le
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TITLE: Senior Semiconductor Wet Chemical Process Engineer, Raxium
EMPLOYER: Google
LOCATION: Fremont, CA, USA (unspecified)
SALARY: $159K-$231K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckVb941A0ABE-RSZI9NncP7n47D5yUYa9doys4mp4UK4UEjsACxwdTFaR5_aYUM0G4Q4yPhiFFTn2uFFAJdXhAv6VPTmDRA12ntlqbHXfS21nJ162FcRlGO0HePOEgg%3D%3D_V2&loc=US&title=Senior+Semiconductor+Wet+Chemical+Process+Engineer
EXCERPT: Senior Semiconductor Wet Chemical Process Engineer, Raxium Fremont, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Develop and sustain new processes associated with semiconductor wet chemical processing, including etch, strip and cleaning processes. Develop systems and methodologies to drive process stability and control for yield improvement. Optimize existing wet processing steps for throughput and defectivity reduction. Start up and qualify new toolsets with emphasis on process transparency and tool matching. Minimum qualifications: Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, a related field, or equivalent practical experience. 4 years of experience with Wet Chemical Process Engineering
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TITLE: Static Timing Analysis Manager, Full Chip, SOC, Implementation
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $192K-$279K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckWgZXCAUWDWOuTokdSZCZxlni5eYRRolsB-LQgdhjR3NEjsACxwdTLarVONs5a2P3Hj8T2PuTMc4sARHe3WNGBd-bK-TSKRWwFEEmn_vymSwJRXgwfgHOO_xA63DKQ%3D%3D_V2&loc=US&title=Static+Timing+Analysis+Manager
EXCERPT: Static Timing Analysis Manager, Full Chip, SOC, Implementation Mountain View, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead and manage functional Static Timing Analysis (STA) team responsible for delivering system-on-chip (SoC) STA. Execute full chip timing sign-off checklist, perform full chip STA, power recovery, timing ECO creation and oversee final timing sign-off for SoC's. Define SoC timing sign-off process corners, derates, uncertainties and their trade-offs. Drive clock tree planning and implementation for SoCs to achieve best energy, performance and area. Collaborate with front-end, Design for Test (DFT) and Computer-aided design (CAD) teams for the design exploration and closure. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical
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TITLE: Working Student (f/m/d) MCU Support
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Working-Student--f-m-d--MCU-Support_R-10063859-1
EXCERPT: Working Student (f/m/d) MCU Support Munich posted: Posted 4 Days Ago
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TITLE: 倉儲作業員
EMPLOYER: NXP Semiconductors
LOCATION: Kaohsiung (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kaohsiung/_R-10061232-1
EXCERPT: 倉儲作業員 Kaohsiung posted: Posted 30+ Days Ago
---
TITLE: 進出口人員
EMPLOYER: NXP Semiconductors
LOCATION: Kaohsiung (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kaohsiung/_R-10062685-1
EXCERPT: 進出口人員 Kaohsiung posted: Posted 24 Days Ago
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TITLE: Working Student (f/m/d) RF Validation and Lab Automation
EMPLOYER: NXP Semiconductors
LOCATION: Hamburg (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-13
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hamburg/Working-Student--f-m-d--RF-Validation-and-Lab-Automation_R-10063331-1
EXCERPT: Working Student (f/m/d) RF Validation and Lab Automation Hamburg posted: Posted 30 Days Ago
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TITLE: PRODUCTION PLANNER
EMPLOYER: NXP Semiconductors
LOCATION: Bangkok (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangkok/PRODUCTION-PLANNER_R-10063439
EXCERPT: PRODUCTION PLANNER Bangkok posted: Posted Today
---
TITLE: Senior Principal SoC Physical Implementation/STA Engineer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Sophia-Antipolis-Valbonne/Senior-Princioal-SoC-Physical-Implementation-STA-Engineer_R-10063109
EXCERPT: Senior Principal SoC Physical Implementation/STA Engineer 2 Locations posted: Posted 30+ Days Ago
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TITLE: Hardware Applications Engineer
EMPLOYER: NXP Semiconductors
LOCATION: San Jose (Holger Way) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/San-Jose-Holger-Way/Hardware-Applications-Engineer_R-10061640
EXCERPT: Hardware Applications Engineer San Jose (Holger Way) posted: Posted 30+ Days Ago
---
TITLE: Technician
EMPLOYER: NXP Semiconductors
LOCATION: Nijmegen (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Nijmegen/Technician_R-10060783-1
EXCERPT: Technician Nijmegen posted: Posted 30+ Days Ago
---
TITLE: Technician
EMPLOYER: NXP Semiconductors
LOCATION: Nijmegen (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-06
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Nijmegen/Technician_R-10063190-1
EXCERPT: Technician Nijmegen posted: Posted 6 Days Ago
---
TITLE: SW Developer - Microcontrollers
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Brno/SW-Developer---Microcontrollers_R-10062692
EXCERPT: SW Developer - Microcontrollers 2 Locations posted: Posted 30+ Days Ago
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TITLE: System Architect USB Power
EMPLOYER: NXP Semiconductors
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-20
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/San-Jose-Rose-Orchard/System-Architect-USB-Power_R-10062596
EXCERPT: System Architect USB Power 3 Locations posted: Posted 23 Days Ago
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TITLE: SW TEST/VALIDATION
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/SW-TEST-VALIDATION_R-10062531
EXCERPT: SW TEST/VALIDATION Pune posted: Posted 30+ Days Ago
---
TITLE: Senior Principal SoC Design Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principal-SoC-Design-Engineer_R-10062451
EXCERPT: Senior Principal SoC Design Engineer Pune posted: Posted 30+ Days Ago
---
TITLE: Network SME
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Lead-Network-and-Connectivity-Engineer_R-10062422
EXCERPT: Network SME Noida posted: Posted 30+ Days Ago
---
TITLE: Field Applications Engineer - Microprocessors
EMPLOYER: NXP Semiconductors
LOCATION: 4 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Field-Applications-Engineer---Microprocessors_R-10063910-1
EXCERPT: Field Applications Engineer - Microprocessors 4 Locations posted: Posted 3 Days Ago
---
TITLE: DOCUMENTATION SPECIALIST
EMPLOYER: NXP Semiconductors
LOCATION: Bangkok (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangkok/DOCUMENTATION-SPECIALIST_R-10062650
EXCERPT: DOCUMENTATION SPECIALIST Bangkok posted: Posted 30+ Days Ago
---

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