I'm looking for a job. I exported this list from FewerJobs.com - a curated job board.

Please:
1. Rank these jobs by fit for me, given my resume / skills.
2. Highlight the top 5 with a one-sentence rationale each.
3. Flag any concerns, including benefit values without source-backed evidence.
4. Suggest one or two filter changes I could make on FewerJobs to find more good matches.

Filters I applied:
- q: EigenLayer
- quality_floor: default
- match_401k_strict: true
- parental_strict: true
- non_birth_strict: true
- pto_strict: true
- include_older: false
- verified_benefits_only: true
- apply_url_verified: false
- page: 1
- per_page: 100
- sort: relevance

Jobs (100 total):

---
TITLE: Stagiaire Implémentation, test et validation d’une fonction de détection de défaut de non-conduction d’un bras de pont (H/F)
EMPLOYER: GE Vernova
LOCATION: Belfort (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Belfort/Stagiaire-Implmentation--test-et-validation-d-une-fonction-de-dtection-de-dfaut-de-non-conduction-d-un-bras-de-pont--H-F-_R5020858-2
EXCERPT: Stagiaire Implémentation, test et validation d’une fonction de détection de défaut de non-conduction d’un bras de pont (H/F) Belfort posted: Posted 30+ Days Ago
---
TITLE: Validation Engineer (Quantifi Photonics, New Zealand)
EMPLOYER: Teradyne
LOCATION: Validation Engineer (Quantifi Photonics, New Zealand) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://jobs.teradyne.com/QuantifiPhotonics/job/Rosedale-Validation-Engineer-%28Quantifi-Photonics%2C-New-Zealand%29-AUK/1395795900/
EXCERPT: Validation Engineer (Quantifi Photonics, New Zealand) Validation Engineer (Quantifi Photonics, New Zealand) Our Purpose TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. Based in Auckland, Quantifi Photonics is proud to be part of the Teradyne family, combining New Zealand's innovative spirit with the resources of a global leader in test, automation, and robotics. We're growing fast, tackling increasingly complex challenges, and are looking for passionate, talented people to help take Quantifi Photonics to the next level. Quantifi Photonics designs and manufactures advanced optical and electronic test instruments that enable engineers to develop and scale up next-generation photonics technologies. Our customers include global tech companies, leading universities, and world-class research institutions in over 25 countries; working across R&D, high-volume manufacturing, defence, aerospace, and academia. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results . Opportunity Overview The Validation Engineer supports New Product Introduction (NPI) programs by executing product validation and verification activities in accordance with established company procedures and engineering standards.
---
TITLE: Principal Digital IP Verification Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Principal-Digital-IP-Verification-Engineer--f-m-d-_R-10063818
EXCERPT: Principal Digital IP Verification Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: (Senior) RF Engineer Test & Validation (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Hamburg (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hamburg/XMLNAME--Senior--RF-Engineer-Test---Validation--f-m-d-_R-10062467
EXCERPT: (Senior) RF Engineer Test & Validation (f/m/d) Hamburg posted: Posted 30+ Days Ago
---
TITLE: Working Student (f/m/d) RF Validation and Lab Automation
EMPLOYER: NXP Semiconductors
LOCATION: Hamburg (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-13
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hamburg/Working-Student--f-m-d--RF-Validation-and-Lab-Automation_R-10063331-1
EXCERPT: Working Student (f/m/d) RF Validation and Lab Automation Hamburg posted: Posted 30 Days Ago
---
TITLE: Senior NVM Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Oakhill, Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Senior-NVM-Validation-Engineer_R-10063714
EXCERPT: Senior NVM Validation Engineer Austin (Oakhill, Office) posted: Posted 3 Days Ago
---
TITLE: HW Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Oakhill, Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-17
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/HW-Validation-Engineer_R-10063521
EXCERPT: HW Validation Engineer Austin (Oakhill, Office) posted: Posted 26 Days Ago
---
TITLE: Distinguished AI/ML Architect (Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-04
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Distinguished-AI-ML-Architect--Cortex-_JR-016522-1
EXCERPT: Distinguished AI/ML Architect (Cortex) Office - Israel - Tel Aviv posted: Posted 8 Days Ago
---
TITLE: Sr./Lead FW Verification and Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Sr-Lead-FW-Verification-and-Validation-Engineer_R-10063023
EXCERPT: Sr./Lead FW Verification and Validation Engineer Bangalore posted: Posted 30+ Days Ago
---
TITLE: Senior Validation Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Hamburg (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hamburg/Senior-Validation-Engineer--f-m-d-_R-10062871
EXCERPT: Senior Validation Engineer (f/m/d) Hamburg posted: Posted 30+ Days Ago
---
TITLE: Senior Angular Frontend Engineer - Identity Security (Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Senior-Angular-Frontend-Engineer---Identity-Security--Cortex-_JR-016569
EXCERPT: Senior Angular Frontend Engineer - Identity Security (Cortex) Office - Israel - Tel Aviv posted: Posted 30+ Days Ago
---
TITLE: Senior UX Designer - Agentic Endpoint Security(Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Senior-UX-Designer--Cortex-_JR-016948
EXCERPT: Senior UX Designer - Agentic Endpoint Security(Cortex) Office - Israel - Tel Aviv posted: Posted 30+ Days Ago
---
TITLE: Senior / Principle Security Research - Agent ML Team (Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Senior---Principle-Security-Research---Agent-ML-Team--Cortex-_JR-017959
EXCERPT: Senior / Principle Security Research - Agent ML Team (Cortex) Office - Israel - Tel Aviv posted: Posted Yesterday
---
TITLE: Optical Thin Film Coating Material Engineer
EMPLOYER: Google
LOCATION: New Taipei, Banqiao District, New Taipei City, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckWNqpyuC3uTG-ymgIVOSCyjyGenMH8MHnwAUb8jX78SYEjsACxwdTODBh6DNdT_hYVtPaUbGanStEnm-6bG6asVSBz-l-_Ek-7AzBiFsidItLVxozIatoa19P96JDQ%3D%3D_V2&loc=TW&title=Optical+Thin+Film+Coating+Material+Engineer
EXCERPT: Optical Thin Film Coating Material Engineer New Taipei, Banqiao District, New Taipei City, Taiwan Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Lead the development of thin optical coating stacks at vendors, ensuring consistent performance and design across multiple suppliers. Manage material DOEs, analyze test results, and select the best materials for applications such as lens covers and display glass. Collaborate with process engineers, FEA, product designers, industrial designers, and reliability teams on material qualification and product-level testing. Solve mission-critical issues related to coatings to ensure high-quality standards for mass production. Minimum qualifications: Bachelor's degree in Materials Science, Mechanical Engineering, or a related technical field, or equivalent practical experience. 5 years of experience in working with optical coatings, Physical Vapor Deposition (PVD), and material integration. Preferred qualifications: Master's degree or PhD in Physics, Optical Sciences, Material Science or related fields. Experience leading cross-functional efforts, influencing program roadmaps via data-driven insights, driving technical initiatives impacting multiple products, and mentoring junior engineers while growing the technical excellence of multidisciplinary teams. Experience working
---
TITLE: IC & System Validation Engineer F/M
EMPLOYER: NXP Semiconductors
LOCATION: Caen (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-21
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Caen/IC---System-Validation-Engineer-F-M_R-10062982-1
EXCERPT: IC & System Validation Engineer F/M Caen posted: Posted 22 Days Ago
---
TITLE: IC Design Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Kanata (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kanata/IC-Design-Verification-Engineer_R-10063903
EXCERPT: IC Design Verification Engineer Kanata posted: Posted 3 Days Ago
---
TITLE: Principal Digital Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-25
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Silicon-Validation-Engineer_R-10063516
EXCERPT: Principal Digital Validation Engineer Pune posted: Posted 18 Days Ago
---
TITLE: Senior Principal Engineer, Analog Validation/Characterization
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Principal-Engineer--Analog-Validation-Characterization_R-10062839
EXCERPT: Senior Principal Engineer, Analog Validation/Characterization Noida posted: Posted 24 Days Ago
---
TITLE: IC Design Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Kanata (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kanata/IC-Design-Verification-Engineer_R-10063904
EXCERPT: IC Design Verification Engineer Kanata posted: Posted 2 Days Ago
---
TITLE: High-Speed Interface Validation Engineer, Post Silicon Validation
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $144K-$194K
POSTED: 2026-05-29
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10434989/high-speed-interface-validation-engineer-post-silicon-validation
EXCERPT: High-Speed Interface Validation Engineer, Post Silicon Validation Austin, Texas, USA Annapurna Labs, an AWS organization with development centers in the U.S. and Israel, builds custom silicon and software for AWS customers. Our team combines cloud-scale innovation with world-class expertise across silicon engineering, hardware design, verification, software, and operations to tackle technical challenges that have never been seen before. Join our Post-Silicon Validation team to validate the critical high-speed interconnects - HBM, PCIe, UCIe, and chip-to-chip links - that enable massive bandwidth and scaling in AWS's next-generation ML accelerators. You'll ensure link integrity, performance, and reliability at the electrical and protocol layers across the full product lifecycle, from first silicon through production deployment in AWS data centers. You'll work in a fast-paced, startup-like environment alongside some of the brightest minds in the industry on next generation, internet-scale technology that directly impacts how customers use Machine Learning acceleration. Your expertise will be instrumental in validating the I/O technologies that enable our custom silicon to scale beyond what was previously possible. Key job responsibilities Validate high-speed interfaces (HBM, PCIe, UCIe, custom SerDes) end-to-end from PHY training through sustained traffic Perform electrical characterization: eye diagrams, jitter analysis, voltage margin, and equalization tuning Execute protocol-level compliance testing and interoperability validation against industry specifications Stress-test links across PVT (Process, Voltage, Temperature) corners and aging conditions Debug link training failures, bit errors, and performance degradation using lab instrumentation and silicon debug features Collaborate with PHY design teams on equalization optimization, margin improvement, and silicon feedback A day
---
TITLE: Senior Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Validation-Engineer_R-10062540
EXCERPT: Senior Validation Engineer Noida posted: Posted 30+ Days Ago
---
TITLE: Senior Principal Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Validation-Engineer_R-10062310
EXCERPT: Senior Principal Validation Engineer Noida posted: Posted 24 Days Ago
---
TITLE: SW TEST/VALIDATION
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/SW-TEST-VALIDATION_R-10062531
EXCERPT: SW TEST/VALIDATION Pune posted: Posted 30+ Days Ago
---
TITLE: Senior / Principal Validation Leader
EMPLOYER: NXP Semiconductors
LOCATION: Toulouse (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Toulouse/Senior---Principal-Validation-Leader_R-10061815-1
EXCERPT: Senior / Principal Validation Leader Toulouse posted: Posted 30+ Days Ago
---
TITLE: Embedded SW Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Brno (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Brno/Embedded-SW-Validation-Engineer_R-10063241
EXCERPT: Embedded SW Validation Engineer Brno posted: Posted 30+ Days Ago
---
TITLE: Junior Layout Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Catania (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Junior-Layout-Engineer_R-10062969-1
EXCERPT: Junior Layout Engineer Catania posted: Posted 30+ Days Ago
---
TITLE: Image Quality Sys Dev Engineer, System Dev Engineer
EMPLOYER: Amazon
LOCATION: Taipei City, TWN (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-20
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10372536/image-quality-sys-dev-engineer-system-dev-engineer
EXCERPT: Image Quality Sys Dev Engineer, System Dev Engineer Taipei City, TWN Shape the future of imaging for millions of Ring cameras worldwide. As a System Development Engineer focused on ISP tuning and Image Quality, you will optimize the imaging pipeline-from raw sensor data to final output-to deliver consistent, high-quality images across diverse real-world conditions. You'll work at the intersection of camera hardware, ISP algorithms, and system validation, improving how users experience Ring devices every day. This role goes beyond parameter tuning-you'll analyze complex image quality challenges, explore trade-offs in computational photography, and contribute to solutions that scale across products. Why this role stands apart: - Technical depth with team impact: Work on ISP tuning and validation that directly affects shipped products used by millions - Innovation at scale: Your tuning work and validation contributions become part of the foundation for future products, multiplying your impact across generations of devices - Leading technology stack: Work with modern ISP architectures and AI-enhanced imaging techniques, including emerging machine learning-based image processing approaches-technologies that are redefining what's possible in compact surveillance cameras - Collaborative excellence: Join Ring's imaging center of excellence where camera architects, firmware engineers, and IQ specialists sit side-by-side, enabling rapid iteration and deep technical discussions In our team, you're not isolated-you're surrounded by experts across optics, sensors, ISP, and AI who can sketch solutions on whiteboards within minutes. The role offers genuine technical contribution: you'll solve difficult image quality challenges, apply engineering best practices, and mentor others while working autonomously on
---
TITLE: Embedded SW Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Brno/Embedded-SW-Validation-Engineer_R-10063783
EXCERPT: Embedded SW Validation Engineer 2 Locations posted: Posted 7 Days Ago
---
TITLE: Senior Embedded SW Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Brno/Senior-Embedded-SW-Validation-Engineer_R-10063784
EXCERPT: Senior Embedded SW Validation Engineer 2 Locations posted: Posted 7 Days Ago
---
TITLE: Internship - MicroLED application engineer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Eindhoven/Internship---MicroLED-application-engineer_R-10062875
EXCERPT: Internship - MicroLED application engineer 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Embedded SW Developer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Roznov/Rust-Embedded-SW-Developer_R-10061883
EXCERPT: Embedded SW Developer 2 Locations posted: Posted 2 Days Ago
---
TITLE: Principal/Senior Engineer Software - Agentic Endpoint Security(Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Principal-Senior-Engineer-Software----Agentic-Endpoint-Security-Cortex-_JR-017617
EXCERPT: Principal/Senior Engineer Software - Agentic Endpoint Security(Cortex) Office - Israel - Tel Aviv posted: Posted Yesterday
---
TITLE: Platform Engineer - Observability
EMPLOYER: Adobe Inc.
LOCATION: Bucharest (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 16 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://adobe.wd5.myworkdayjobs.com/external_experienced/job/Bucharest/Platform-Engineer---Observability_R169504
EXCERPT: Platform Engineer - Observability Bucharest posted: Posted 7 Days Ago
---
TITLE: Sr. Software Development Engineer - Image Quality, RBKS Camera and Imaging
EMPLOYER: Amazon
LOCATION: Tampere, West and Inner Finland, FIN (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-20
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10372538/sr-software-development-engineer-image-quality-rbks-camera-and-imaging
EXCERPT: Sr. Software Development Engineer - Image Quality, RBKS Camera and Imaging Tampere, West and Inner Finland, FIN Shape the future of imaging for millions of Ring cameras worldwide. As a Software Development Engineer focused on ISP tuning and Image Quality, you'll architect solutions that transform raw sensor data into stunning imagery-capturing every critical moment with exceptional clarity, day or night. You'll work at the intersection of cutting-edge camera technology and real-world impact, optimizing ISP pipelines that directly influence how millions of users experience their Ring devices. This isn't just parameter tuning-it's solving complex architectural challenges in computational photography, pushing hardware to its limits, and defining the standards that elevate our entire product portfolio. Why this role stands apart: 1. Technical depth meets strategic influence: Lead team-level initiatives while shaping cross-functional decisions around camera modes and imaging functions that ripple across Ring's product ecosystem 2. Innovation at scale: Your tuning methodologies and validation frameworks become the foundation for future products, multiplying your impact across generations of devices 3. Cutting-edge technology stack: Work with the latest ISP architectures, and AI-enhanced imaging-technologies that are redefining what's possible in compact surveillance cameras 4. Collaborative excellence: Join Ring's imaging center of excellence where camera architects, firmware engineers, and IQ specialists sit side-by- side, enabling rapid iteration and deep technical discussions In our team, you're not isolated-you're surrounded by experts across optics, sensors, ISP, and AI who can sketch solutions on whiteboards within minutes. The role offers genuine technical leadership: you'll decompose complex image quality challenges,
---
TITLE: Lead Silicon Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-25
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Silicon-Validation-Engineer_R-10063514
EXCERPT: Lead Silicon Validation Engineer Pune posted: Posted 18 Days Ago
---
TITLE: IC Design Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Kanata (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kanata/IC-Design-Verification-Engineer_R-10063155
EXCERPT: IC Design Verification Engineer Kanata posted: Posted 7 Days Ago
---
TITLE: EMC Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/EMC-Engineer--f-m-d-_R-10061511
EXCERPT: EMC Engineer (f/m/d) Munich posted: Posted 30+ Days Ago
---
TITLE: Principal Digital IP Design Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Principal-Digital-IP-Design-Engineer--f-m-d-_R-10063823
EXCERPT: Principal Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: Senior Digital IP Verification Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Verification-Engineer--f-m-d-_R-10063820
EXCERPT: Senior Digital IP Verification Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: Principal Layout Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Catania (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Principal-Layout-Engineer_R-10062967
EXCERPT: Principal Layout Engineer Catania posted: Posted 30+ Days Ago
---
TITLE: PhD Internship – AI Processor Architecture for Edge Applications
EMPLOYER: NXP Semiconductors
LOCATION: Hamburg (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-04
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hamburg/PhD-Internship---AI-Processor-Architecture-for-Edge-Applications_R-10060618
EXCERPT: PhD Internship – AI Processor Architecture for Edge Applications Hamburg posted: Posted 8 Days Ago
---
TITLE: Lead BT/BLE RF validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Lead-BT-BLE-RF-validation-Engineer_R-10063919
EXCERPT: Lead BT/BLE RF validation Engineer Pune posted: Posted Yesterday
---
TITLE: Principal Data Engineer (Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Principal-Data-Engineer--Cortex-_JR-016610
EXCERPT: Principal Data Engineer (Cortex) Office - Israel - Tel Aviv posted: Posted 30+ Days Ago
---
TITLE: SYSTEMS VALIDATION
EMPLOYER: NXP Semiconductors
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/SYSTEMS-VALIDATION_R-10062972
EXCERPT: SYSTEMS VALIDATION Bangalore posted: Posted 30+ Days Ago
---
TITLE: Staff Digital Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Staff-Digital-Validation-Engineer_R-10063920
EXCERPT: Staff Digital Validation Engineer Pune posted: Posted Yesterday
---
TITLE: Embedded C++ Software Engineer, Ring
EMPLOYER: Amazon
LOCATION: Cambridge, England, GBR (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3201659/embedded-c-software-engineer-ring
EXCERPT: Embedded C++ Software Engineer, Ring Cambridge, England, GBR As an Embedded Software Engineer, you will be a core member of a software team developing Ring's next generation of camera-centric devices. While experience with embedded systems is valuable, we're looking for engineers passionate about building IoT products who are eager to work close to the hardware. The ideal candidate is responsive, flexible, and thrives in an open collaborative peer environment. You'll obsess over device performance-whether that's battery life, boot time, system latency, or other critical KPIs. You'll add significant new features and integrate with new hardware and software services. Key job responsibilities You will be responsible for managing your personal backlog, prioritising issues, and diving deep into technical issues. A day in the life The ideal candidate: - Enjoys working side-by-side with partners, colleagues, and teams on difficult to solve problems - Is highly effective and thrives in a dynamic environment with multiple, changing priorities - Knows what is important when shipping products to customers and has been through the process from start to finish - Is comfortable with proactive outward communication and technical leadership and never shies away from a challenge About the team The team are responsible for developing and delivering firmware for Rings camera-centric devices - new products, supporting existing devices, and adding new features. We're a large team with sites in Europe and Asia as well as stakeholders in the US. Basic Qualifications: - Experience contributing to the architecture and design (architecture, design patterns, reliability and scaling)
---
TITLE: Computer Vision AI/ML Engineer
EMPLOYER: Leidos
LOCATION: Huntsville, AL (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://leidos.wd5.myworkdayjobs.com/External/job/Huntsville-AL/Computer-Vision-AI-ML-Engineer_R-00177556
EXCERPT: Computer Vision AI/ML Engineer Huntsville, AL posted: Posted 30+ Days Ago
---
TITLE: Principal Engineer - IP Verification
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063833
EXCERPT: Principal Engineer - IP Verification Noida posted: Posted Today
---
TITLE: SoC Embedded SW/Linux Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Oakhill, Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-03
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/SoC-Validation-Engineer_R-10062747
EXCERPT: SoC Embedded SW/Linux Validation Engineer Austin (Oakhill, Office) posted: Posted 9 Days Ago
---
TITLE: Dir / Sr Dir , SW Engineering ( Cortex Cloud)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Sr-Dir--SW-Engineering_JR-010424
EXCERPT: Dir / Sr Dir , SW Engineering ( Cortex Cloud) Office - Israel - Tel Aviv posted: Posted 30+ Days Ago
---
TITLE: Data Architecture – Advisor I
EMPLOYER: Fiserv
LOCATION: Berkeley Heights, New Jersey (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 12 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 2 (not source-backed)
APPLY_URL: https://fiserv.wd5.myworkdayjobs.com/EXT/job/Berkeley-Heights-New-Jersey/Data-Architecture---Advisor-I_R-10395590
EXCERPT: Data Architecture – Advisor I Berkeley Heights, New Jersey posted: Posted Today
---
TITLE: Junior Digital Design Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Catania (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Junior-Digital-Design-Engineer_R-10063126
EXCERPT: Junior Digital Design Engineer Catania posted: Posted 30+ Days Ago
---
TITLE: Sr. Embedded SDE, Ring
EMPLOYER: Amazon
LOCATION: Gdansk, Pomeranian Voivodeship, POL (unspecified)
SALARY: PLN 29K-29K/mo
POSTED: 2026-02-04
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3174147/sr-embedded-sde-ring
EXCERPT: Sr. Embedded SDE, Ring Gdansk, Pomeranian Voivodeship, POL Are you passionate about revolutionizing smart home device development? We're looking for a tech lead to help us transform Ring's firmware development process! We create advanced simulation environments that allow engineers to develop and test firmware without physical hardware constraints - testing thousands of scenarios in the time it traditionally takes to run just one. Our team builds precise software representations of Ring's hardware ecosystem, enabling faster iteration and earlier issue detection. From doorbell cameras to security systems, our simulators are the secret weapon that accelerates Ring's ability to bring innovative products to millions of homes. If you're excited about building sophisticated simulation tools and want to directly impact how IoT products are developed, we want to talk to you! Key job responsibilities - Lead your colleagues to deliver high-quality C and C++ code which will scale with the needs of the business; - Deliver reliable, high-quality technical solutions that delight our customers; - Demonstrate excellent taste in developer experience and tooling design through the SDLC; - Partner with your manager and leadership to influence business strategy and product roadmaps; - Meet with customers to learn and help shape the simulation story; - Set a high bar of technical and operational excellence, and empower your colleagues to continuously meet and raise the bar. As a senior engineer, you are a multiplier to your teammates as much as you are a developer. This role will be a great fit if you have a
---
TITLE: Principal Sensor Engineer
EMPLOYER: Ecolab
LOCATION: USA - Minnesota - Eagan (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-04
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://ecolab.wd1.myworkdayjobs.com/Ecolab_External/job/USA---Minnesota---Eagan/Principal-Sensor-Engineer_R00295883-1
EXCERPT: Principal Sensor Engineer USA - Minnesota - Eagan posted: Posted 8 Days Ago
---
TITLE: Principal Verification Engineer, Digital IP
EMPLOYER: NXP Semiconductors
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Verification-Engineer--Digital-IP_R-10063901
EXCERPT: Principal Verification Engineer, Digital IP Bangalore posted: Posted Today
---
TITLE: Sr. Image Quality Architecture Engineer
EMPLOYER: Samsara
LOCATION: Remote - Taiwan (remote)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 16 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
LEARNING_BUDGET_OFFERED: yes (not source-backed)
APPLY_URL: https://www.samsara.com/company/careers/roles/7767914?gh_jid=7767914
EXCERPT: Sr. Image Quality Architecture Engineer Remote - Taiwan Who we are Samsara (NYSE: IOT) is the pioneer of the Connected Operations™ Cloud, which is a platform that enables organizations that depend on physical operations to harness Internet of Things (IoT) data to develop actionable insights and improve their operations. At Samsara, we are helping improve the safety, efficiency and sustainability of the physical operations that power our global economy. Representing more than 40% of global GDP, these industries are the infrastructure of our planet, including agriculture, construction, field services, transportation, and manufacturing - and we are excited to help digitally transform their operations at scale. Working at Samsara means you'll help define the future of physical operations and be on a team that's shaping an exciting array of product solutions, including Video-Based Safety, Vehicle Telematics, Apps and Driver Workflows, and Equipment Monitoring. As part of a recently public company, you'll have the autonomy and support to make an impact as we build for the long term. About the role We're looking for a Senior Image Quality Architecture engineer to join our team. In the day to day, you will act as the technical founding member. Responsible for the end-to-end imaging strategy, lab infrastructure, and primary ownership of lens/sensor selection, ensuring peak performance in both static and high-vibration environments. We have a tremendous amount of telemetry and access to customers that help guide our design process. You will work directly with our customers to ensure we lead the industry in our
---
TITLE: Quality Engineer (Validation)
EMPLOYER: Abbott Laboratories
LOCATION: Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-22
PARENTAL_LEAVE_WEEKS: 8 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 8 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://abbott.wd5.myworkdayjobs.com/abbottcareers/job/Singapore/Quality-Engineer--Validation-_31149751-1
EXCERPT: Quality Engineer (Validation) Singapore posted: Posted 21 Days Ago
---
TITLE: Lead SoC Validation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Lead-SoC-Validation-Engineer_R-10062870-1
EXCERPT: Lead SoC Validation Engineer Bangalore posted: Posted 30+ Days Ago
---
TITLE: Principal Design Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Principal-Design-Verification-Engineer_R-10061636
EXCERPT: Principal Design Verification Engineer Bangalore posted: Posted 30+ Days Ago
---
TITLE: Dir, Product Management - Cortex Cloud Data Security
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Dir--Product-Management---Cortex-Cloud-Data-Security_JR-016460
EXCERPT: Dir, Product Management - Cortex Cloud Data Security Office - Israel - Tel Aviv posted: Posted 30+ Days Ago
---
TITLE: Embedded SW Developer with Rust - Security
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Brno/Embedded-SW-Developer-with-Rust---Security_R-10062700-1
EXCERPT: Embedded SW Developer with Rust - Security 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Additive Manufacturing Engineer
EMPLOYER: Leidos
LOCATION: Huntsville, AL (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://leidos.wd5.myworkdayjobs.com/External/job/Huntsville-AL/Additive-Manufacturing-Engineer_R-00185304
EXCERPT: Additive Manufacturing Engineer Huntsville, AL posted: Posted Today
---
TITLE: Principal Antenna & RF Sensor Test Chamber Architect & Integrator
EMPLOYER: Raytheon Technologies
LOCATION: US-AZ-TUCSON-M02 ~ 1151 E Hermans Rd ~ BLDG M02 (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-AZ-TUCSON-M02--1151-E-Hermans-Rd--BLDG-M02/Principal-Antenna---RF-Sensor-Test-Chamber-Architect---Integrator_01823916
EXCERPT: Principal Antenna & RF Sensor Test Chamber Architect & Integrator US-AZ-TUCSON-M02 ~ 1151 E Hermans Rd ~ BLDG M02 posted: Posted 30+ Days Ago
---
TITLE: Principal Engineer - AI/ML - Computer Vision
EMPLOYER: Stryker Corporation
LOCATION: Bengaluru, India (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://stryker.wd1.myworkdayjobs.com/StrykerCareers/job/Bengaluru-India/Principal-Engineer---AI-ML---Computer-Vision_R563548
EXCERPT: Principal Engineer - AI/ML - Computer Vision Bengaluru, India posted: Posted 30+ Days Ago
---
TITLE: Principal Design Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Design-Engineer_R-10061782
EXCERPT: Principal Design Engineer Noida posted: Posted 30+ Days Ago
---
TITLE: Safety Architect
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Safety-Architect_R-10062725
EXCERPT: Safety Architect 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Digital IP Principal Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Oakhill, Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Digital-IP-Principal-Verification-Engineer_R-10063878
EXCERPT: Digital IP Principal Verification Engineer Austin (Oakhill, Office) posted: Posted 2 Days Ago
---
TITLE: Principal Engineer - IP Verification
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063216
EXCERPT: Principal Engineer - IP Verification Noida posted: Posted 30+ Days Ago
---
TITLE: Senior Windows Detection Researcher (Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-28
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Senior-Windows-Detection-Researcher--Cortex-_JR-017066
EXCERPT: Senior Windows Detection Researcher (Cortex) Office - Israel - Tel Aviv posted: Posted 15 Days Ago
---
TITLE: Principal Engineer, Power Architecture
EMPLOYER: Analog Devices
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/Principal-Engineer--Power-Systems-Engineering_R263013
EXCERPT: Principal Engineer, Power Architecture 3 Locations posted: Posted Today
---
TITLE: Senior Principal Verification Engineer, Digital IP
EMPLOYER: NXP Semiconductors
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Sr-Principal-Verification-Engineer--Digital-IP_R-10063899
EXCERPT: Senior Principal Verification Engineer, Digital IP Bangalore posted: Posted Today
---
TITLE: Principal Engineer - IP Verification
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-14
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063215
EXCERPT: Principal Engineer - IP Verification Noida posted: Posted 29 Days Ago
---
TITLE: Security Engineer - Focused Services (Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Security-Engineer---Focused-Services--Cortex-_JR-016166
EXCERPT: Security Engineer - Focused Services (Cortex) Office - Israel - Tel Aviv posted: Posted 30+ Days Ago
---
TITLE: Senior Post-Silicon Validation Engineer, Networking
EMPLOYER: Google
LOCATION: Tel Aviv, Israel; +1 more (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2Fckbwn2P2CShq6gVcyOBMg1Uha4jcuL5wGNCXSCbpgTy9iEjsACxwdTFXGzn9IJ49mnP8Ok8LEyJRTvVQNF9Z3CsKPPGt1fo_MQlNrckOcY8c_29gJ68YcmuEowGRcmQ%3D%3D_V2&loc=IL&title=Senior+Post-Silicon+Validation+Engineer
EXCERPT: Senior Post-Silicon Validation Engineer, Networking Tel Aviv, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. We are building a new team to lead the post-silicon validation efforts for our cutting-edge product. We're looking for highly motivated and talented engineers to join us in ensuring the quality and functionality of our next-generation networking silicon. This is a unique opportunity to be part of a foundational team and make a significant impact. As a Silicon Validation Engineer at Google Cloud, you'll play a pivotal role in the validation of Google's custom silicon solutions that power our cloud infrastructure bringing it to the highest quality level. Your expertise in post-silicon validation will be essential in identifying and resolving issues before they impact our customers, ensuring a seamless and high-performance cloud experience. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale
---
TITLE: MEMS Layout Engineer P2
EMPLOYER: Analog Devices
LOCATION: US, MA, Wilmington (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/MEMS-Layout-Engineer-P2_R263058
EXCERPT: MEMS Layout Engineer P2 US, MA, Wilmington posted: Posted Today
---
TITLE: Embedded SW Developer with Rust - Security
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-13
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Brno/Embedded-SW-Developer-with-Rust---Security_R-10063360-1
EXCERPT: Embedded SW Developer with Rust - Security 2 Locations posted: Posted 30 Days Ago
---
TITLE: Applied Scientist, Materials Characterization and Simulations, Amazon Center for Quantum Computing
EMPLOYER: Amazon
LOCATION: Pasadena, California, USA (unspecified)
SALARY: $143K-$193K
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10423332/applied-scientist-materials-characterization-and-simulations-amazon-center-for-quantum-computing
EXCERPT: Applied Scientist, Materials Characterization and Simulations, Amazon Center for Quantum Computing Pasadena, California, USA The Amazon Center for Quantum Computing in Pasadena, CA, is looking to hire an Applied Scientist on the Materials team, focused on understanding and mitigating materials-driven loss mechanisms in superconducting quantum processors. You will join a multi-disciplinary team of theoretical and experimental physicists, materials scientists, and hardware and software engineers working at the forefront of quantum computing. You should have deep expertise in materials characterization and computational modeling of disordered solids, with the ability to connect atomic-scale insights to materials design. Candidates with a track record of original scientific contributions in experimental and computational studies of materials defects will be preferred. We are looking for candidates with strong scientific and engineering principles, resourcefulness and a bias for action, superior problem solving, and excellent communication skills. As an Applied Scientist at CQC, you will be expected to drive materials research from characterization through design recommendations and stay abreast of advances in materials science for superconducting quantum hardware. Key job responsibilities You will combine materials characterization and numerical simulations to investigate how material defects affect qubit performance. This includes implementing multi-technique characterization workflows for thin films and interfaces, providing input on the design of materials with targeted properties, and developing computational tools for simulations of disordered structures. You will provide characterization support for the Fabrication team, investigating materials sources of loss in production-relevant films and processes. You will coordinate with cross-functional teams to translate materials insights into actionable
---
TITLE: Senior Mixed Signal Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Catania (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-04
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Senior-Mixed-Signal-Verification-Engineer_R-10063611
EXCERPT: Senior Mixed Signal Verification Engineer Catania posted: Posted 8 Days Ago
---
TITLE: Principal Digital IP Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Oakhill, Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Principal-Digital-IP-Verification-Engineer_R-10063886
EXCERPT: Principal Digital IP Verification Engineer Austin (Oakhill, Office) posted: Posted 3 Days Ago
---
TITLE: Internship: RF System Validation Engineer (m/f/d)
EMPLOYER: NXP Semiconductors
LOCATION: Gratkorn (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-28
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Gratkorn/Internship--RF-System-Validation-Engineer--m-f-d-_R-10062466
EXCERPT: Internship: RF System Validation Engineer (m/f/d) Gratkorn posted: Posted 15 Days Ago
---
TITLE: Working student (f/m/d) – Packaging Engineering
EMPLOYER: Ecolab
LOCATION: DEU - Nordrhein-Westfalen - Monheim am Rhein (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://ecolab.wd1.myworkdayjobs.com/Ecolab_External/job/DEU---Nordrhein-Westfalen---Monheim-am-Rhein/Working-student--f-m-d----Packaging-Engineering_R00295720-1
EXCERPT: Working student (f/m/d) – Packaging Engineering DEU - Nordrhein-Westfalen - Monheim am Rhein posted: Posted 4 Days Ago
---
TITLE: Embedded Software student - IoT Application Development
EMPLOYER: NXP Semiconductors
LOCATION: Bucharest (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bucharest/Embedded-Software-student---IoT-Application-Development_R-10060344
EXCERPT: Embedded Software student - IoT Application Development Bucharest posted: Posted 30+ Days Ago
---
TITLE: Principal RF Design Engineer
EMPLOYER: Raytheon Technologies
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-MARLBOROUGH-MA2--1001-Boston-Post-Rd--BLDG-2/Principal-RF-Design-Engineer_01837299
EXCERPT: Principal RF Design Engineer 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Anlagenführer Glowing (m/w/*)
EMPLOYER: 3M
LOCATION: DE, Kempten (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-18
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://3m.wd1.myworkdayjobs.com/Search/job/DE-Kempten/Anlagenfhrer-Glowing--m-w---_R01165061-2
EXCERPT: Anlagenführer Glowing (m/w/*) DE, Kempten posted: Posted 25 Days Ago
---
TITLE: Lead Verification and Validation Engineer
EMPLOYER: GE Vernova
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Noida/Lead-Verification-and-Validation-Engineer_R5033410-3
EXCERPT: Lead Verification and Validation Engineer Noida posted: Posted 2 Days Ago
---
TITLE: Validation & Verification Engineer
EMPLOYER: GE Vernova
LOCATION: Pallavaram (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Pallavaram/Validation---Verification-Engineer_R5038032-2
EXCERPT: Validation & Verification Engineer Pallavaram posted: Posted 17 Days Ago
---
TITLE: Unison Project Engineer Sensors and Power Team (E2)
EMPLOYER: GE Aerospace
LOCATION: Queretaro (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://geaerospace.wd5.myworkdayjobs.com/GE_ExternalSite/job/Queretaro/Unison-Project-Engineer-Sensors-and-Power-Team--E2-_R5035956-1
EXCERPT: Unison Project Engineer Sensors and Power Team (E2) Queretaro posted: Posted 2 Days Ago
---
TITLE: Antenna Test Engineer
EMPLOYER: Northrop Grumman
LOCATION: United States-Waynesboro-Virginia; United States-Virginia-Charlottesville (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.northropgrumman.com/careers/job/1340072087918
EXCERPT: Antenna Test Engineer United States-Waynesboro-Virginia; United States-Virginia-Charlottesville
---
TITLE: Senior Digital IP Design Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Design-Engineer--f-m-d-_R-10063822
EXCERPT: Senior Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: Product/Test Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Tianjin (Weiwu) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Tianjin-Weiwu/Product-Test-Engineer_R-10062325
EXCERPT: Product/Test Engineer Tianjin (Weiwu) posted: Posted 30+ Days Ago
---
TITLE: Machine Learning Engineer - Evergreen
EMPLOYER: Adobe Inc.
LOCATION: Bucharest (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 16 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://adobe.wd5.myworkdayjobs.com/external_experienced/job/Bucharest/Machine-Learning-Engineer---Evergreen_R158699-1
EXCERPT: Machine Learning Engineer - Evergreen Bucharest posted: Posted 30+ Days Ago
---
TITLE: Principal Windows Internals Engineer (Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Principal-Engineer--Low-Level-Dev_JR-012406-1
EXCERPT: Principal Windows Internals Engineer (Cortex) Office - Israel - Tel Aviv posted: Posted 30+ Days Ago
---
TITLE: Associate Director, Validation Engineering - South Region(Onsite)
EMPLOYER: Raytheon Technologies
LOCATION: US-FL-JUPITER-EOB ~ 17900 Beeline Hwy ~ BLDG EOB (onsite)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-FL-JUPITER-EOB--17900-Beeline-Hwy--BLDG-EOB/Associate-Director--Validation-Engineering---South-Region-Onsite-_01850514
EXCERPT: Associate Director, Validation Engineering - South Region(Onsite) US-FL-JUPITER-EOB ~ 17900 Beeline Hwy ~ BLDG EOB posted: Posted Today
---
TITLE: Quality Engineer
EMPLOYER: Fiserv
LOCATION: Indianapolis 2307, Indiana (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
PARENTAL_LEAVE_WEEKS: 12 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 2 (not source-backed)
APPLY_URL: https://fiserv.wd5.myworkdayjobs.com/EXT/job/Indianapolis-2307-Indiana/Quality-Engineer_R-10395176
EXCERPT: Quality Engineer Indianapolis 2307, Indiana posted: Posted 11 Days Ago
---
TITLE: NFC Firmware Senior Architect
EMPLOYER: NXP Semiconductors
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/NFC-Firmware-Senior-Architect_R-10063071
EXCERPT: NFC Firmware Senior Architect Bangalore posted: Posted 30+ Days Ago
---
TITLE: Principal/Senior Windows Exploit Researcher (Cortex)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Principal-Researcher_JR-012185-1
EXCERPT: Principal/Senior Windows Exploit Researcher (Cortex) Office - Israel - Tel Aviv posted: Posted 17 Days Ago
---
TITLE: Functional Safety Architect
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Functional-Safety-Architect_R-10063905
EXCERPT: Functional Safety Architect 2 Locations posted: Posted Yesterday
---
TITLE: Silicon Product and Test Engineer
EMPLOYER: Block, Inc.
LOCATION: Toronto, Ontario, Canada (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 16 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: http://block.xyz/careers/jobs/5012353008?gh_jid=5012353008
EXCERPT: Silicon Product and Test Engineer Toronto, Ontario, Canada Proto is accelerating the world's transition to an open economy with products that increase access and independence for everyone. We're building Bitkey, a simple and safe self-custody bitcoin wallet that will put customers in control, as well as hardware and software that will help decentralize bitcoin mining and enable new and innovative use cases for bitcoin mining. We're developing these products in the open - you can read more about them at bitkey.build and mining.build . Within Proto, our Bitcoin Products team delivers the product and go-to-market strategy, software, firmware, and custom silicon needed to make Bitkey and our ambitious mining initiatives a reality. Come build the future of money with us! The Role We are looking for a Product & Test Engineer to drive post-silicon productization of our bitcoin mining ASICs from silicon bring-up through high-volume manufacturing. This role spans silicon characterization, yield optimization, test strategy development, correlation across multiple platforms, and system-level performance optimization. This is a highly cross-functional role working across ASIC Design, ATE, Bench, Systems, Reliability, Foundry, and OSAT partners. The ideal candidate is hands-on, data-driven, comfortable operating in ambiguity, and excited about building and scaling complex hardware products in a fast-moving environment. You Will - Drive post-silicon bring-up, characterization, qualification, and productization activities from first silicon through mass production. - Develop and optimize wafer sort (CP) and final test (FT) screening strategies to improve power, performance, yield, quality, and DPPM. - Develop, debug, and maintain ATE test
---
TITLE: Computer Scientist 2 (C++)
EMPLOYER: Adobe Inc.
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
PARENTAL_LEAVE_WEEKS: 16 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://adobe.wd5.myworkdayjobs.com/external_experienced/job/Noida/Computer-Scientist-2--C---_R167185-1
EXCERPT: Computer Scientist 2 (C++) Noida posted: Posted 4 Days Ago
---
TITLE: Support Enablement and Escalations Engineer (Cortex Platform)
EMPLOYER: CyberArk
LOCATION: Office - Israel - Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://paloaltonetworks.wd5.myworkdayjobs.com/panwexternalcareers/job/Office---Israel---Tel-Aviv/Support-Enablement-and-Escalations-Engineer--Cortex-Platform-_JR-012870
EXCERPT: Support Enablement and Escalations Engineer (Cortex Platform) Office - Israel - Tel Aviv posted: Posted 30+ Days Ago
---

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