I'm looking for a job. I exported this list from FewerJobs.com - a curated job board.

Please:
1. Rank these jobs by fit for me, given my resume / skills.
2. Highlight the top 5 with a one-sentence rationale each.
3. Flag any concerns, including benefit values without source-backed evidence.
4. Suggest one or two filter changes I could make on FewerJobs to find more good matches.

Filters I applied:
- q: Cadence Design Systems, Inc.
- quality_floor: default
- match_401k_strict: true
- parental_strict: true
- non_birth_strict: true
- pto_strict: true
- include_older: false
- verified_benefits_only: true
- apply_url_verified: false
- page: 1
- per_page: 100
- sort: relevance

Jobs (100 total):

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TITLE: Designer, Hardware Outlet
EMPLOYER: Tapestry, Inc.
LOCATION: New York, New York, USA (Corporate Headquarters) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 8 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 8 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://tapestry.wd108.myworkdayjobs.com/Tapestry_Careers/job/New-York-New-York-USA-Corporate-Headquarters/Designer--Hardware-Outlet_JR1924
EXCERPT: Designer, Hardware Outlet New York, New York, USA (Corporate Headquarters) posted: Posted 30+ Days Ago
---
TITLE: Senior Systems Design Engineer
EMPLOYER: Boston Scientific
LOCATION: Arden Hills, MN (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 8 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 8 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.bostonscientific.com/job/Arden-Hills-Senior-Systems-Design-Engineer-MN-55112/1396535200/
EXCERPT: Senior Systems Design Engineer Arden Hills, MN Diversity - Innovation - Caring - Global Collaboration - Winning Spirit - High Performance At Boston Scientific, we'll give you the opportunity to harness all that's within you by working in teams of diverse and high-performing employees, tackling some of the most important health industry challenges. With access to the latest tools, information and training, we'll help you in advancing your skills and career. Here, you'll be supported in progressing - whatever your ambitions. About the Role: As a Systems Design Engineer on our Implantable Systems team, you'll play a crucial role in developing innovative products for the Active Implantable Systems R&D team. Join our experienced design team to collaborate on cutting-edge technologies and engage in a wide range of activities, including: Collaborating with leadership and marketing on product definitions and system architecture. Developing complex electromechanical systems, including embedded systems, sensors, and algorithms, with cross-functional teams of hardware engineers, software engineers, and research scientists. Supporting Regulatory submissions and approvals through delivery of design documentation. Interfacing with Technical Services, Sales, and customers on product design and functionality. Your responsibilities will include: You will be responsible for completing system engineering activities, from early phase development to market release. Your key tasks will include: Executing multiple systems engineering activities
---
TITLE: Hardware Systems Design Engineer, Platforms Infrastructure
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $132K-$190K
POSTED: 2026-06-04
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckRZmtfRvVBjJ-7uhYzx3ufxX0quP83h2AHdpF8am0954EjsACxwdTG7uppRRMOr7lp1iz9xMcPkhZHUn95ROTB4osSDs4q_0XXa-MNkxSXjoHBZ7YHjPXCzZkRO7vA%3D%3D_V2&loc=US&title=Hardware+Systems+Design+Engineer
EXCERPT: Hardware Systems Design Engineer, Platforms Infrastructure Sunnyvale, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Our team designs and builds the hardware, software, and networking technologies that power all of Google's services. As a Hardware Design Engineer, you will design and build the systems that are the heart of a large and powerful computing infrastructure. You will see those systems from concept all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our data centers affecting millions of Google users. As a part of the Board and System Design team, you will work on hardware systems projects to craft solutions for current and future data center deployments. You will work with product teams to ensure that customer goals are met with your systems, ASIC/FPGA, Software, and Verification teams to ensure proper verification of features in your systems, manufacturing teams to ensure that your designs are manufacturable and ready for volume production, and field teams to support systems that are deployed in the data center. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google
---
TITLE: Sr. System Development Engineer, World Wide Design Engineering
EMPLOYER: Amazon
LOCATION: Nashville, Tennessee, USA (unspecified)
SALARY: $144K-$194K
POSTED: 2026-05-07
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10414135/sr-system-development-engineer-world-wide-design-engineering
EXCERPT: Sr. System Development Engineer, World Wide Design Engineering Nashville, Tennessee, USA We are seeking a Sr. Systems Development Engineer to develop transformative systems that will revolutionize facility design and deployment. Our technology portfolio includes computer vision solutions leveraging vision language models, autonomous robotics (ground and aerial), generative data analytics, and agentic workflow automation systems deployed across our global fulfillment network. Key job responsibilities - Identify and implement strategic technical solutions of AI/ML systems, autonomous robotics, and quality automation solutions. - Identify and develop internal tooling to assist with departmental efficiencies. (AI tooling, Data analytics, agentic workflow assistants etc.) - Contribute to product roadmaps and drive cross-functional execution priorities - Identify and analyze tradeoffs between software design alternatives, including impact on performance, schedule, cost, risk, complexity, and scalability - Write status and build reports for cross-functional leadership review - Mentor engineers and share best practices across multi-disciplinary teams - Set the example of what a highly skilled, proactive, creative software developer who is well versed in AI and is constantly looking for more efficient ways to work and pushing the boundaries of innovation looks like. A day in the life - 15% domestic travel - Leverage internal Amazon AI coding agents to rapidly prototype code experiments. - Ability to code in SQL, Python or C/C++ - Innovative design and implementation ideas for our material handling equipment and conveyor systems - Complex system testing, commissioning, verification, and validation - Designing and implementing systems and tools that enable high quality launches of large
---
TITLE: Mechanical Engineer, Cooling System Modular Design
EMPLOYER: Google
LOCATION: Reno, NV, USA; +4 more (unspecified)
SALARY: $144K-$209K
POSTED: 2026-06-04
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckcYcYmiM6_czPsBla74x1YRl6JLAetZxpdGkkIzwT5mOEjoACxwdTLvsBzR98C93a3xjYlAw4SG2Y5f1c7kZhrnmx_HdMZpsY6B49bXK6HlD1LZZxt3kKYmmek1g_V2&loc=US&title=Mechanical+Engineer
EXCERPT: Mechanical Engineer, Cooling System Modular Design Reno, NV, USA; +4 more Our thirst for technology is a part of everything we do. The Data Center Engineering team takes the physical design of our data centers into the future. Our lab mirrors a research and development department -- cutting-edge strategies are born, tested and tested again. Along with a team of great minds, you take on complex topics like how we use power or how to run state-of-the-art, environmentally-friendly facilities. You're a visionary who optimizes for efficiencies and never stops seeking improvements -- even small changes that can make a huge impact. You generate ideas, communicate recommendations to senior-level executives and drive implementation alongside facilities technicians. With your technical expertise, you ensure compliance with codes and standards, develop infrastructure improvements and serve as an expert in your specialty (e.g., cooling, electrical). As a Mechanical Engineer within the Data Center Technology Systems team, you will serve as a technical lead for our global mechanical infrastructure. You will pioneer next-generation cooling systems, innovating custom components and integrating modular design and pre-fabrication strategies to accelerate construction. Collaborating across Planning, Operations, and Execution teams, you will lead new technologies to optimize future products for Google's machine learning fleet. You will leverage advanced software tools to conduct detailed thermal analysis, computational fluid dynamics, and hydraulic modeling of complex air and waterside systems. Your deep understanding of thermodynamics will drive the creation of critical engineering specifications and commissioning plans. A concise communicator, you will deliver actionable recommendations
---
TITLE: Mechanical Engineer, Cooling System Design and Analysis
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA; +7 more (unspecified)
SALARY: $171K-$248K
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckYt5l1ySX9ErV74AommxtN_uWvQkjKKlPGITj0tlsa6lEjsACxwdTCno-1IcyeW5uRxaqpTUWjv_06RQHpW50EaKM-s-6ComaTbN25WU2tPjIf-cVx0jRrXTHdDHdQ%3D%3D_V2&loc=US&title=Mechanical+Engineer
EXCERPT: Mechanical Engineer, Cooling System Design and Analysis Sunnyvale, CA, USA; +7 more Our thirst for technology is a part of everything we do. The Data Center Engineering team takes the physical design of our data centers into the future. Our lab mirrors a research and development department -- cutting-edge strategies are born, tested and tested again. Along with a team of great minds, you take on complex topics like how we use power or how to run state-of-the-art, environmentally-friendly facilities. You're a visionary who optimizes for efficiencies and never stops seeking improvements -- even small changes that can make a huge impact. You generate ideas, communicate recommendations to senior-level executives and drive implementation alongside facilities technicians. With your technical expertise, you ensure compliance with codes and standards, develop infrastructure improvements and serve as an expert in your specialty (e.g., cooling, electrical). The Thermal Systems Engineering team stands at the forefront of accelerating innovation that powers Google's global infrastructure. As a Mechanical Engineer within the Data Center Technology Systems-a multidisciplinary consortium of engineers and architects dedicated to pioneering next-generation data centers-you will assume a pivotal role in the development, analysis, and optimization of the mechanical cooling infrastructure. You will be a technical leader in this space, influencing design standards and equipment selections across our fleet. In this role, you will be tasked with the design of custom data center cooling equipment and the creation of innovative thermal solutions engineered to meet the demands of an ever-evolving market. You will leverage an
---
TITLE: Design Tech MCAD Application Engineer, Design Technologies
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $137K-$186K
POSTED: 2026-06-04
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10440043/design-tech-mcad-application-engineer-design-technologies
EXCERPT: Design Tech MCAD Application Engineer, Design Technologies Redmond, Washington, USA Amazon Lab126 is an inventive research and development company that designs and engineer's high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced devices like Fire tablets, Fire TV, Fire phone, and Amazon Echo. What will you help us create? Work hard. Have fun. Make history. The Role: Amazon Design Technologies is a multi-disciplinary group within Amazon Devices that builds and provides engineering tools and workflows, software systems and integrations, automations, and design services to hardware engineering teams across Amazon. We manage enterprise engineering systems, CAD tools, PDM/PLM systems, High Performance Compute (HPC) environments, and license management/procurement. We are looking for an MCAD Application Engineer with deep expertise in the PTC Creo suite of applications - specifically Creo Parametric, Creo Simulation Live, Creo View, and Windchill - to play a key role in customizing and extending the MCAD applications used at Amazon. Our team is uniquely positioned at the intersection of hardware design and artificial intelligence, pioneering AI-based design review and design generation capabilities that will transform how engineers create next-generation products. This role will be instrumental in developing and evangelizing industry best practices in mechanical product design, driving collaboration with manufacturing partners, and optimizing processes across hardware engineering workflows. You will partner closely with cross-functional teams to ensure design intent is maintained from concept through production. Export Control Requirements: Due to applicable export
---
TITLE: Sr. Design Program Manager, Devices & Services Experience Design
EMPLOYER: Amazon
LOCATION: Seattle, Washington, USA (unspecified)
SALARY: $130K-$175K
POSTED: 2026-06-02
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10437806/sr-design-program-manager-devices-services-experience-design
EXCERPT: Sr. Design Program Manager, Devices & Services Experience Design Seattle, Washington, USA The Devices & Services Experience Design (DxD) team leads user experience and industrial design innovation across Amazon's device portfolio, including Echo, Fire TV, Fire Tablets, Alexa.com, and related mobile apps. Our team works at the intersection of design, product and engineering, creating meaningful hardware and software experiences that enhance customer lives. We believe in storytelling and thinking holistically to craft the "why" behind everything we ship. DxD is seeking a Senior Design Program Manager to lead end-to-end program delivery for customer experiences across a product portfolio. In this role, you will partner with designers, engineers, and product managers to scope, plan, and deliver design programs that ship to millions of customers. You will own the operational health of your programs - building the systems, mechanisms, and rituals that enable design teams to deliver with quality and velocity while directly managing the most complex and highest-visibility programs. The Senior Design Program Manager operates both tactically and strategically. You will independently scope and plan design projects that impact at the program and organizational level - including areas where strategy may not yet be defined. You will influence leaders across partner teams, effectively map resources against program scope and timelines, and make recommendations where resourcing gaps exist. You will drive operational excellence, manage long-term risks and escalations, and strengthen DxD-wide operational practices by identifying what's working, what's not, and driving improvements that make the team more effective. The ideal candidate brings
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TITLE: Hardware System Architect, Pixel Watch
EMPLOYER: Google
LOCATION: Mountain View, CA, USA; +1 more (unspecified)
SALARY: $188K-$275K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckZK3EGJd7ALuHA3Wtaylw1slZabHmkGEUilrYP51nWMaEjoACxwdTHOxmQ1h9dF-Rndz_3xDW3oeTO5OuK5MRaoS84FwNvkjCGdAuFEL-zLdIvZcdfeOF4WhyfV2_V2&loc=US&title=Hardware+System+Architect
EXCERPT: Hardware System Architect, Pixel Watch Mountain View, CA, USA; +1 more The Watch Hardware Engineering team is looking for a System Architect responsible for defining and implementing the hardware architecture for wearable products to enable ambient and edge computing applications. In this role, you will provide thought leadership in architecting the system design and platform architecture for next generation wearable products. The architect will ensure all subsystems work together to meet performance, power, and cost goals for all critical user journeys. This role involves an understanding and analysis of the data processing paths and associated hardware, silicon, and software solutions. You will collaborate cross-functionally both internally and externally with silicon vendors and technology partners. The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $188000 - $275000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Architect the data processing paths and hardware-software interfaces for ambient and edge computing applications on wearable hardware. Define system and component-level specifications for performance, power, and thermals. Support critical user journeys, including on-device AI
---
TITLE: Physical Design Technical Lead, ASIC, TPU
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $192K-$279K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckT4gzCo-QUov3DxOfP5Ddnfb3eFWNrDSH6LVfdhXz_X-EjsACxwdTMVHIDH5CoBPQ7E7MYxL6MMRV3QaOtZ5ZbjMUSkz6yCxqlVbtpNom1Tr0VtyU_HBp6J5h0q8rg%3D%3D_V2&loc=US&title=Physical+Design+Technical+Lead
EXCERPT: Physical Design Technical Lead, ASIC, TPU Sunnyvale, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's Tensor Processing Units (TPUs) are incredibly complex, pushing the boundaries of physical design, power, and performance. In this role, you will provide technical leadership for the physical design of our next-generation AI silicon. Because of the sheer scale of our chips, our physical design leadership is highly dynamic; you will be expected to drive end-to-end execution with a scope that scales from owning highly complex, critical macro-subsystems up to overarching project-wide top-level implementation, depending on project needs. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and
---
TITLE: Tech Lead, SoC Design
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $192K-$279K
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckWXZ1KKa6rTtyRBww19NH16gf62V8rGsRESGtn8Z-5h3EjsACxwdTNwJb-n_p9hdInYz6Jdc6sec-D03xtMFAnSxpbxT_UBIJUIZJJkBUbNYWCW_OLgNjWPqFGimGw%3D%3D_V2&loc=US&title=Tech+Lead
EXCERPT: Tech Lead, SoC Design Mountain View, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead a team of RTL Design engineers performing tasks related to IP development and/or SOC Design. Provide technical leadership to engineers and model best design practices (i.e., micro-architecture specifications, design reviews, code reviews, design methodology, etc.). Participate with architecture and system design teams in architecture definition, die area estimation, power optimization, and performance enhancements. Work closely with the multi-site cross-functional teams: Verification, Design for Test, Physical Design and Software teams to make design decisions and represent project status throughout the development process. Define microarchitecture for a subsystem/SoC top-level. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related
---
TITLE: ECAD Application Development Engineer, Design Technologies
EMPLOYER: Amazon
LOCATION: Sunnyvale, California, USA (unspecified)
SALARY: $123K-$175K
POSTED: 2026-04-23
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10401995/ecad-application-development-engineer-design-technologies
EXCERPT: ECAD Application Development Engineer, Design Technologies Sunnyvale, California, USA Amazon Lab126 is an inventive research and development company that designs and engineer's high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced devices like Fire tablets, Fire TV, Fire phone, and Amazon Echo. What will you help us create? Work hard. Have fun. Make history. The Role: Amazon Design Technologies is a multi-disciplinary group within Amazon Devices that builds and provides engineering tools and workflows, software systems and integrations, automations, and design services to hardware engineering teams across Amazon. We manage enterprise engineering systems, CAD tools, PDM/PLM systems, High Performance Compute (HPC) environments, and license management/procurement. We are looking for an ECAD Application Development Engineer with development expertise in Cadence suite of applications, specifically Cadence OrCAD, Allegro, System Capture and Pulse to play a key role in customizing and extending the ECAD applications used at Amazon. Our team is uniquely positioned at the intersection of hardware design and artificial intelligence, pioneering AI-based design review and design generation capabilities that will transform how engineers create next-generation products. This position will be responsible for leading the functional design, customizations, configurations and support of ECAD applications with a primary focus on building and deploying the systems/solutions that scale. You will have the opportunity to integrate AI/ML technologies into traditional CAD workflows, enabling intelligent automation and design assistance. Core activities will include gathering and defining requirements, designing and
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TITLE: Senior Hardware Systems Engineer, Watches
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $159K-$231K
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckVo-T3YVEIFDG8WLH1yX1a_F7cI71uqT5-9uo5EbjguXEjsACxwdTAaX25PsD0YfFrGOz0UGjbRPh03GzkyezYd-Hf6WxrOm6ACOWHkhPhsbsKjBQNPw4l2odMydcA%3D%3D_V2&loc=US&title=Senior+Hardware+Systems+Engineer
EXCERPT: Senior Hardware Systems Engineer, Watches Mountain View, CA, USA The Pixel Watch Electrical Engineering (EE) team is responsible for the end-to-end hardware development of Google's first-party Watch products. We work with product managers during initial concept and design phases, advocate new technology investigations, and manage the entire hardware lifecycle, from board integration and comprehensive validation to overseeing manufacturing to deliver products with a user experience and state-of-the-art health sensing capabilities. As an Electrical Engineer on the Watch product team, you will be responsible for key design activities throughout the Watch product development phase. This includes focusing on technical design development and optimization, collaborating with cross-functional teams, and working closely with external suppliers and partners for design and manufacturing. You will also work on some hardware related issues Failure Analysis (FA) that feedback from users, EFFA, RMA. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Be responsible for the electrical design integration and the validation of Google's Watch products. Deliver the boards (PCBA or FPCA) by performing all the design tasks including schematic and layout, collaboration with product design, Signal Integrity and Power Integrity (SIPI), power and sub-system teams for the design optimization. Bring up the system, plan the validation, trouble shooting and conduct the measurements. Debug the issue discovered from the factory production, reliability, user trial, RMA, etc. Collaborate with Google
---
TITLE: Staff Hardware Systems Engineer, Watches
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $188K-$275K
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckeY1r0w0ur1-nKsva0IqCwQ6TgXKobHHlCCDazuCcARCEjsACxwdTNtuySJPovn9kzNNj6K9MIPdKMSvRVfd9am24Jp1YwYOFoboCJ3EsyLmVo-c-f9_jAQmSINcwA%3D%3D_V2&loc=US&title=Staff+Hardware+Systems+Engineer
EXCERPT: Staff Hardware Systems Engineer, Watches Mountain View, CA, USA The Pixel Watch Electrical Engineering (EE) team is responsible for the end-to-end hardware development of Google's first-party (1P) Watch products. We work with product managers during initial concept and design phases, guide new technology investigations, and manage the entire hardware lifecycle-from board integration and comprehensive validation to overseeing manufacturing to deliver products with an advanced user experience and health sensing capabilities. We are seeking a highly skilled and visionary Electrical Engineer to lead the hardware integration and electrical architecture for our next-generation hardware. In this role, you will be the technical anchor for form factor integration, strategizing how to partition silicon into compact enclosures while maximizing power efficiency and thermal performance. You will operate at the intersection of electrical, mechanical, and systems engineering, pushing the boundaries of what is physically possible. You will be solving multi-dimensional hardware puzzles, driving architectural convergence across teams, and turning New Technology Introductions (NTIs) into mass-produced reality. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $188000 - $275000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Drive end-to-end electrical architecture for space-constrained devices, leveraging advanced packaging technologies like System in Package (SIP) and rigid-flex to maximize density and minimize Z-height. Act as the technical linchpin, collaborating with mechanical, Radio Frequency (RF), sensors, and display teams to resolve physical layout collisions and foster architectural convergence. Lead data-driven trade-offs balancing
---
TITLE: Senior CAD Engineer, ASIC Development Infrastructure, RTL Design
EMPLOYER: Amazon
LOCATION: Boise, Idaho, USA (unspecified)
SALARY: $159K-$215K
POSTED: 2026-02-23
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3187150/senior-cad-engineer-asic-development-infrastructure-rtl-design
EXCERPT: Senior CAD Engineer, ASIC Development Infrastructure, RTL Design Boise, Idaho, USA Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced innovative devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior Computer Aided Design (CAD) Engineer, you will be part of an advanced ASIC development team that is creating the semiconductor designs which will power millions of new Amazon devices. You will work closely with multi-disciplinary groups including Design, Verification, Physical Design, and Emulation teams to build and maintain a leading-edge ASIC development infrastructure that enables and accelerates their work. Key job responsibilities * Design and maintain ASIC development flows spanning RTL-to-GDSII, including RTL generation, simulation, synthesis, place & route, timing analysis, DRC/LVS, and sign-off * Deploy and configure EDA tools from vendors (Synopsys, Cadence, Mentor/Siemens, etc.) across compute infrastructure * Develop automation and CI/CD/regression to streamline design tasks, reduce manual effort, and improve consistency * Troubleshoot tool issues and work with vendors to resolve bugs, performance bottlenecks, or licensing problems * Work with IT teams to optimize compute and storage strategies to enhance engineering efficiency * Create and maintain documentation for tool usage, flow methodologies, and best practices * Utilization of AI tools to accelerate troubleshooting and monitoring of design flows A day in the life Your day starts
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TITLE: System Integration Lead, Pixel Watch
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $236K-$330K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckdxVgqmA5QVhxJpEE4vAEkBsVAChoU0JsExYzEftLZfgEjsACxwdTLrC852RyCY_toYMbCtdCxcHIreo94mS36uXdIvgRQd7BhDip7Sk22-NXYlauivE5hvkTZkP4g%3D%3D_V2&loc=US&title=System+Integration+Lead
EXCERPT: System Integration Lead, Pixel Watch Mountain View, CA, USA As a member of a fast-paced multi-disciplinary team, you use your creativity and range of engineering experience to explore solutions to a variety of engineering problems. As a mechanical engineer, you participate in the design, analysis, and prototyping of new concepts. You work in a manufacturing and product oriented development environment and collaborate with vendors and outside sources in order to see parts through to manufacture. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $236000 - $330000 (USD) + 25% bonus target + bonus + equity + benefits Learn more about benefits at Google . Identify, integrate, and validate cutting-edge technologies to enhance the next iteration of our products. Collaborate closely with a team of system architects, industrial designers, and product managers, contributing to the early definition of new products and the exploration of emerging technologies. Be able to maximize comfort and fit within an iconic design, all while delivering performance. Ensure seamless integration of these new technologies into the product line, encompassing module and system design, validation, and correlation. Partner with our operations teams during the early stages of system integration to establish and maintain high quality and yield standards. Minimum qualifications: Bachelor's degree in Mechanical Engineering, Product Design, or related field, or equivalent practical experience. 12 years of experience designing mechanical components such as plastic or metal parts, mechanical assemblies, printed circuit boards, or flexes. 12 years of experience using Computer-Aided
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TITLE: Senior Technical Hardware Program Manager, Leo Customer Terminal Industrial Design
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $149K-$201K
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10443920/senior-technical-hardware-program-manager-leo-customer-terminal-industrial-design
EXCERPT: Senior Technical Hardware Program Manager, Leo Customer Terminal Industrial Design Redmond, Washington, USA Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. We are looking for a talented and detail oriented Program Manager to help bring our products to the world. The Technical Hardware Program Manager will be the operational backbone of design and research teams, driving operational excellence, process improvement, and team enablement across design/research functions. You will work closely with cross-functional teams to streamline workflows, optimize how we work, and ensure adherence to best practices. The Technical Hardware Program Manager will work closely with the hardware development and and various partner teams to drive key aspects of product definition, execution, usability testing and distribution of design deliverables. You must be responsive, flexible and able to succeed within an open collaborative peer environment. Working within the Hardware Design team, the Technical Hardware Program Manager will be responsible for coordinating execution of the Leo hardware Product Development Process across multiple hardware design programs. The Technical Hardware Program Manager will work with the PD/EE teams, Product Managers , Creative partner teams (packaging, UX, marketing) to ensure requirements are clear and necessary process steps are planned and deliverables meet target schedules. In addition, you will provide support and coordination within the Industrial Design team to facilitate usability testing, distribution and tracking of prototypes, coordination of meetings, documentation of “lessons learned” during project
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TITLE: ASIC Physical Design Tools, Flows, Methodologies Manager
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $192K-$279K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckdA65qFUzIMVLO_qpz0DNp3VEGiDi--dD76uednIOm7mEjsACxwdTGTK8Ty7-tc9OpPxcMp3gpC2QfV58Ip69SKMasdvH2uZn6ZCXIhkWceu3r0ksfD-cHEB3yQhqA%3D%3D_V2&loc=US&title=ASIC+Physical+Design+Tools
EXCERPT: ASIC Physical Design Tools, Flows, Methodologies Manager Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will manage and lead a team of TFM engineers responsible for the physical design flows that power our Tensor Processing Unit (TPU) products. You will guide your team in developing, deploying, and supporting a register-transfer level (RTL)-to-GDS infrastructure. You will bridge design engineering and electronic design automation (EDA) capabilities, balancing resources and managing priorities across projects, feature requests, and bug resolutions to ensure silicon delivery. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Individual pay is determined by
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TITLE: SOC Top Level Physical Design Engineer, Annapurna Labs
EMPLOYER: Amazon
LOCATION: Cupertino, California, USA (unspecified)
SALARY: $183K-$248K
POSTED: 2026-05-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10416604/soc-top-level-physical-design-engineer-annapurna-labs
EXCERPT: SOC Top Level Physical Design Engineer, Annapurna Labs Cupertino, California, USA Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers). Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities - Drive full chip floorplan, placement, integration, PV signoff and tapeout - Collaborate with FE team to understand RTL and drive physical aspects early in design cycle - Define, execute and optimize next-generation physical verification and integration methodologies using industry-standard EDA tools (FC, Calibre, IC Validator) - Perform DRC (Design Rule Checking), LVS (Layout vs. Schematic), PERC (Programmable Electrical Rule Check) verification - Debug and resolve physical verification issues in collaboration with layout and design teams - Interface with foundries for MT
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TITLE: Sr. Phased Array Architect, Amazon Leo
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $137K-$186K
POSTED: 2025-05-13
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/2981375/sr-phased-array-architect-amazon-leo
EXCERPT: Sr. Phased Array Architect, Amazon Leo Redmond, Washington, USA Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. As a Senior Hardware Engineer, you will be a part of the team of experts working on the development of advanced antenna systems. You will own or contribute to the following: · Design and optimization of different blocks of antennas system · Design the proof of concept systems and prototypes for the next generation of the antennas · Design of RF circuitry in collaboration with RF team · Design of automated test systems, test fixtures and factory test · Bring-up and test campaigns of the active antennas · Lead and review PCB layout Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Basic Qualifications: - BS degree in electrical engineering or computer engineering, or equivalent experience - 7+ years of industrial experience especially board level analog/digital design - 3+ years of experience in high-speed digital design, multi-gigabit SERDES, signal and power integrity - 3+ years of experience in using schematic - 2+ years of experience using lab equipment, including oscilloscopes, logic analyzers, and multi-meters - Experience with Mentor Graphics or Cadence layout tools Preferred Qualifications: - Masters of Science or PhD in
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TITLE: Sr. Hardware Development Engineer, Centralized Electrical Engineer (CEE) - Devices
EMPLOYER: Amazon
LOCATION: Shenzhen, CHN (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10430478/sr-hardware-development-engineer-centralized-electrical-engineer-cee-devices
EXCERPT: Sr. Hardware Development Engineer, Centralized Electrical Engineer (CEE) - Devices Shenzhen, CHN Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced groundbreaking devices like Kindle, Fire tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Sr. Hardware Development Engineer in our team, you will be responsible for supporting product development functions across design, validation and manufacturing. We are looking for candidates who thrive in a fast-paced start-up like environment and want to invent the future. In this role, you will wear many hats working on system design down to quick turn prototypes, manufacturing production processes, design validation and debug. You will work at the integrated circuit and product systems level and drive the quality bar to ensure the products we ship are bug free. To be successful you need to be highly motivated, understand how to solve problems and dive deep while delivering to the highest standards. You will demonstrate a strong working knowledge of product electrical design with expertise in systems integration, the desire to learn from new challenges, and the problem-solving and communication skills to work within a highly interactive and experienced team. Key job responsibilities In this role, you will: - Lead multiple electrical design and validation on multiple products across Amazon device portfolio - Research test/validation technologies and methodologies
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TITLE: Sr. Hardware Development Engineer, Devices
EMPLOYER: Amazon
LOCATION: Shenzhen, CHN (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-04
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3173588/sr-hardware-development-engineer-devices
EXCERPT: Sr. Hardware Development Engineer, Devices Shenzhen, CHN Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced groundbreaking devices like Kindle, Fire tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Sr. Hardware Development Engineer in our team, you will be responsible for supporting product development functions across design, validation and manufacturing. We are looking for candidates who thrive in a fast-paced start-up like environment and want to invent the future. In this role, you will wear many hats working on system design down to quick turn prototypes, manufacturing production processes, design validation and debug. You will work at the integrated circuit and product systems level and drive the quality bar to ensure the products we ship are bug free. To be successful you need to be highly motivated, understand how to solve problems and dive deep while delivering to the highest standards. You will demonstrate a strong working knowledge of product electrical design with expertise in systems integration, the desire to learn from new challenges, and the problem-solving and communication skills to work within a highly interactive and experienced team. Key job responsibilities In this role, you will: * Lead multiple electrical design and validation on multiple products across Amazon device portfolio * Research test/validation technologies and methodologies across factory and lab environment
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TITLE: PCB Layout Engineer, Amazon Leo
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $117K-$160K
POSTED: 2025-11-21
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3130982/pcb-layout-engineer-amazon-leo
EXCERPT: PCB Layout Engineer, Amazon Leo Redmond, Washington, USA Amazon Leo is Amazon's low Earth orbit satellite network. Our mission is to deliver fast, reliable internet connectivity to customers beyond the reach of existing networks. From individual households to schools, hospitals, businesses, and government agencies, Amazon Leo will serve people and organizations operating in locations without reliable connectivity. As a PCB Layout Engineer, you will participate in the definition and implementation of multiple spacecraft subsystems. This individual will contribute in all phases of system design and production. You must bring a combination of PCB design, assembly, test and fabrication knowledge, cross team functional interdependence, and demonstrable design process experience to the position. You will have the opportunity to work with multiple technical teams at Amazon in different locations. You should be comfortable with a high degree of ambiguity and relish the idea of solving problems that haven't been solved at scale before. Along the way, we guarantee that you will learn a lot, have fun and make a positive impact on millions of people. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities Create the physical layout of a PCB from concept to fabrication using Cadence Allegro or Mentor Xpedition in a highly collaborative design environment. Basic Qualifications: - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering,
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TITLE: Solutions Developer, Prototyping and Customer Engineering (PACE)
EMPLOYER: Amazon
LOCATION: Arlington, Virginia, USA (unspecified)
SALARY: $131K-$178K
POSTED: 2026-04-28
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10406021/solutions-developer-prototyping-and-customer-engineering-pace
EXCERPT: Solutions Developer, Prototyping and Customer Engineering (PACE) Arlington, Virginia, USA Job Summary Do you have a builder's mentality where "show me" means more than "tell me"? Are you passionate about technology and AI, understand cloud architectures and platforms, and quick to adopt emerging technologies? Are you adept at working with customers to experiment with innovative approaches and validate technical feasibility? As trusted customer advocates, the Prototyping and Customer Engineering (PACE) team helps customers create early iterations of products and solutions, often exploring new technical grounds. We're seeking experienced technologists who possess a unique balance of technical depth, business acumen, and strong interpersonal skills. Role Overview As a Solutions Developer, you will partner with customers and AWS account and service teams to craft highly scalable, flexible, and resilient solutions that address customer business problems and accelerate AWS adoption. You'll shape and build prototypes across domains including Machine Learning, Agentic Design, Serverless Architecture, and multi-modal Generative AI-with most projects exploring the art of the possible using the latest methods, frameworks, services, and models. You'll work across industry verticals including automotive, energy, healthcare, telecommunications, manufacturing, and media and entertainment. The ability to connect technology with measurable business value is critical-you will help drive revenue growth and strategic outcomes for customers, influencing adoption decisions and accelerating customer success with AWS. Key Expectations Profile: You're a consistently strong contributor on small teams build customer prototypes. You must be hands-on with technical software engineering skills, support direct customer communication, and capable of learning new technologies and
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TITLE: Hardware Development Engineer, Hardware Development, Amazon LEO
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $97K-$160K
POSTED: 2025-09-17
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3086616/hardware-development-engineer-hardware-development-amazon-leo
EXCERPT: Hardware Development Engineer, Hardware Development, Amazon LEO Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. As a Hardware Engineer, you will be a part of the team of experts working on the development of advanced antenna systems. You will own or contribute to the following: · Design and optimization of different blocks of antennas system · Design the proof of concept systems and prototypes for the next generation of the antennas · Design of RF circuitry in collaboration with RF team · Design of automated test systems, test fixtures and factory test · Bring-up and test campaigns of the active antennas · Lead and review PCB layout At Amazon, we hire the best minds in technology to innovate and build on behalf of our customers. As a hardware engineer, you will work alongside Senior Electrical Engineers supporting the design, debug, validation and optimization of the products. You will be involved in projects from concept through production, gaining exposure to the complete design lifecycle. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Basic Qualifications: - MS degree in electrical engineering or computer engineering, or equivalent experience Preferred Qualifications: - PhD in electrical engineering or computer engineering,
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TITLE: Sensor Electrical Engineer, Amazon Robotics
EMPLOYER: Amazon
LOCATION: North Reading, Massachusetts, USA (unspecified)
SALARY: $137K-$186K
POSTED: 2026-05-15
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10421823/sensor-electrical-engineer-amazon-robotics
EXCERPT: Sensor Electrical Engineer, Amazon Robotics North Reading, Massachusetts, USA Amazon is seeking a talented and motivated Sensor Electrical Engineer to work on system design, implementation and release to manufacturing. The ideal candidate will have extensive experience in system design, analog and digital circuit design, possess good communication skills, and have complete ownership of development and productization of a sensor system. The candidate will have strong technical expertise to deliver unsupervised, as well as great leadership skills to work with internal customers and external partners. Key job responsibilities - Oversee an interdisciplinary team to execute product designs from concept to production including design, prototyping, validation, testing and certification. - Develop requirements, functional specifications, DVT plans and test procedures. - Build and facilitate concept prototype systems consisting of a mix of in house and OTS components. - Design, implement and debug embedded systems, analog, and digital circuits. - Facilitate product releases to manufacturing and customer deployments. - Research and advocate for new technologies and projects to help the business. - Oversee characterization of new internally developed or OTS sensors. - Write papers to drive strategic initiatives for Amazon Robotics. - Mentor junior engineers, provide advice and direction to outside projects/other groups. - Participate in program and design reviews. - Ensure program goals are met, working outside of your comfort zone. - Provide structure where there is ambiguity - Present work through papers and presentations at internal conferences. - Oversee development contracts with outside vendors. - Be comfortable communicating clearly and succinctly in
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TITLE: Senior Electrical Engineer, Amazon Industrial Robotics
EMPLOYER: Amazon
LOCATION: North Reading, Massachusetts, USA (unspecified)
SALARY: $137K-$186K
POSTED: 2025-11-18
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3128218/senior-electrical-engineer-amazon-industrial-robotics
EXCERPT: Senior Electrical Engineer, Amazon Industrial Robotics North Reading, Massachusetts, USA Amazon Industrial Robotics is seeking exceptional talent to help develop the next generation of advanced robotics systems that will transform automation at Amazon's scale. We're building revolutionary robotic systems that combine cutting-edge AI, sophisticated control systems, and advanced mechanical design to create adaptable automation solutions capable of working safely alongside humans in dynamic environments. This is a unique opportunity to shape the future of robotics and automation at an unprecedented scale, working with world-class teams pushing the boundaries of what's possible in robotic manipulation, locomotion, and human-robot interaction. Amazon is seeking a talented and motivated Senior Electrical Engineer to work on system design, implementation and release to manufacturing. The ideal candidate will have extensive experience in system design, complex analog and digital circuit design, power electronics, possess good communication skills, own a large component of a system, and lead a team of Electrical Engineers. This candidate must have the ability to work well both independently and in a team setting. Key job responsibilities - Working with an interdisciplinary team to execute product designs from concept to production including design, prototyping, validation, testing and certification - Leading and supporting a technical team on multiple projects in parallel - Coordinate all activities within the engineering discipline for the project. - Ensure coordination with other disciplines is effective for each project. - Thorough understanding of technical principles and concepts in Electrical Engineering - Writing and developing functional specifications, design verification plans and test
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TITLE: Member of Technical Staff - Robotics Electrical Engineer, Frontier AI & Robotics
EMPLOYER: Amazon
LOCATION: San Francisco, California, USA (unspecified)
SALARY: $150K-$300K
POSTED: 2026-05-20
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10426079/member-of-technical-staff-robotics-electrical-engineer-frontier-ai-robotics
EXCERPT: Member of Technical Staff - Robotics Electrical Engineer, Frontier AI & Robotics San Francisco, California, USA We are seeking a hands-on Electrical Engineer to lead the design and integration of electrical systems or subsystems for high-degree-of-freedom robotic platforms. This role involves architecting the robot's power distribution, sensor wiring, and embedded electrical infrastructure. You will be responsible for designing across the full electrical system for advanced robotics platforms including power distribution, sensing, compute, motor controllers, communication infrastructure, battery system and power electronics in close collaboration with mechanical, controls and software engineers. You'll play a key role in ensuring high-performance, reliable operation of complex electromechanical systems under real-world conditions. Key job responsibilities * Electrical system architect / owner for power electronics, actuation, PCBAs, battery, ware harness specs and high speed electrical/communications protocols * Design, develop and integrate power distribution, embedded electronics, motor controllers and safety-critical circuits for complex robotic systems * Own board layout of PCBAs including SoCs, microcontrollers, sensors, power devices, etc. using Cadence OrCAD/Allegro or equivalent tools. Oversee bring-up and validation * Determine appropriate high speed electrical and communication protocols (e.g., CAN, EtherCAT, USB, etc) for reliable and efficient system operation * Specify and design custom power electronics and power distribution boards to meet performance, thermal, and safety requirements * Design and route all cabling and wire harnesses across the robotic platform, considering EMI, signal integrity, serviceability, and integration with mechanical structures * Architect and integrate the robot's battery system, including protection circuitry, battery management, charging systems, and thermal considerations
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TITLE: Signal/Power Integrity Eng, Annapurna Labs
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $136K-$184K
POSTED: 2026-04-09
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10387645/signal-power-integrity-eng-annapurna-labs
EXCERPT: Signal/Power Integrity Eng, Annapurna Labs Austin, Texas, USA Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. We are seeking a SI/PI Engineer (Signal Integrity and Power Integrity) who will play a key role in the definition, design and validation of AWS next generation machine learning ASICs. As a member of our hardware team, you will have a meaningful opportunity to participate in the design and execution of all SI related topics, with the goal of creating and customized platforms that fit within AWS datacenter's world leading technology. Key job responsibilities Our engineers collaborate across diverse teams, projects, and environments to have a firsthand impact on our global customer base. You'll bring a passion for innovation, data, and hardware knowledge. You'll also solve challenging technical problems, often ones not solved before, at every layer of the design. This Signal Integrity Engineering role combines technical expertise with strategic design leadership. The ideal candidate will bring 3+ years of experience in signal and power integrity, with hands-on expertise in simulation tools like Hspice, Cadence, and HFSS. The role involves working with advanced packaging technologies, PCB design, and power delivery systems. Additional experience with die capacitors, SOC power, and 3D/2.5D EMIR simulation tools would be
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TITLE: Power and Signal Integrity Engineer, PhD Graduate
EMPLOYER: Google
LOCATION: Tel Aviv, Israel; +1 more (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-18
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckUPfNhCDd8AhWXHCQE7NDDjkcxy6z5GkNimhETmXc53sEjsAvkGZm19Aj0_Rd70Fgbz1VSkVgg3o1FhuvKlNcCI_bNwMoRrofvQ_cRPhYmUo3VONnd3u0tdbL5mbjA%3D%3D_V2&loc=IL&title=Power+and+Signal+Integrity+Engineer
EXCERPT: Power and Signal Integrity Engineer, PhD Graduate Tel Aviv, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives and set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers. Generate precise electrical
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TITLE: Sr. Manager, Design Program Management, Devices and Services Design Team
EMPLOYER: Amazon
LOCATION: Seattle, Washington, USA (unspecified)
SALARY: $160K-$217K
POSTED: 2026-06-03
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10439314/sr-manager-design-program-management-devices-and-services-design-team
EXCERPT: Sr. Manager, Design Program Management, Devices and Services Design Team Seattle, Washington, USA The Devices & Services Experience Design (DxD) team leads user experience and industrial design innovation across Amazon's device portfolio, including Echo, Fire TV, Fire Tablets, Alexa.com, and related mobile apps. Our team works at the intersection of design, product and engineering, creating meaningful hardware and software experiences that enhance customer lives. We believe in storytelling and thinking holistically to craft the "why" behind everything we ship. DxD is seeking a Sr. Manager of Design Program Management to lead and scale the Design Program Management function across our design organization. This role will own the strategy, operations, and team leadership for a team of Design Program Managers responsible for the scoping, planning, and delivery of design programs for multiple product portfolios. You will define how the function operates - setting the standards, mechanisms, and operating model that enable design teams to deliver customer experiences with quality and velocity. In this role, you will partner closely with Design, Product, and Engineering leadership to ensure design programs are strategically aligned, well-resourced, and delivering measurable impact. You will be responsible for building and developing a high-performing team, driving cross-organizational program excellence, and serving as a key member of the DxD leadership team shaping the future of how design operates within Devices & Services. The ideal candidate brings deep expertise in design program management and design operations, a track record of building and scaling teams, and the ability to influence senior leaders
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TITLE: Senior Electrical Engineer, Amazon Robotics
EMPLOYER: Amazon
LOCATION: North Reading, Massachusetts, USA (unspecified)
SALARY: $137K-$186K
POSTED: 2025-12-23
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3148640/senior-electrical-engineer-amazon-robotics
EXCERPT: Senior Electrical Engineer, Amazon Robotics North Reading, Massachusetts, USA Are you inspired by invention? Is problem solving through teamwork in your DNA? Do you like the idea of seeing how your work impacts the bigger picture? Answer yes to any of these and you'll fit right in here at Amazon Robotics. We are a smart team of doers that work passionately to apply pioneering advances in robotics and software to solve real-world problems that will transform our customers' experiences in ways we can't even imagine yet. We invent new improvements every day. We are Amazon Robotics and we will give you the tools and support you need to invent with us in ways that are rewarding, fulfilling and fun. Amazon Robotics is seeking a talented and motivated Senior Electrical Engineer to work on system design, implementation, and release to manufacturing for the next generation of industrial robotic systems and components. The ideal candidate will have extensive experience in vision sensors, optics, complex analog and digital circuit design, possess strong communication skills, have the ability to own a large component of a system and guide a team of Electrical Engineers. This candidate must have the ability to work well both independently and in team settings. This position reports directly to the Electrical Engineering Manager. Key job responsibilities - Working with an interdisciplinary team to execute product designs from concept to production including design, prototyping, validation, testing and certification - Leading and supporting a technical team on multiple projects in parallel -
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TITLE: Senior Hardware Systems Design Engineer, Platforms Infrastructure
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $159K-$231K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckdN12o2CqiatJ5R2x8Ud7MEyDjq39zyY7sqpnrsS8ZgiEjsACxwdTFL9VkxaVrcEx0nqd2mXwlIoS6J9mZOnU9Gc195kBBfVbGDM9vkGDDYAdThzFkWMMoVWDyBILg%3D%3D_V2&loc=US&title=Senior+Hardware+Systems+Design+Engineer
EXCERPT: Senior Hardware Systems Design Engineer, Platforms Infrastructure Sunnyvale, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Senior Hardware Engineer in the Board and System Design team, you will work on ML/AI hardware systems projects to craft the solutions for current and future data center deployments. You will work with product teams to ensure that their goals are met with your systems. You will work with Application-Specific Integrated Circuit (ASIC), Field Programmable Gate Array (FPGA), Software, and Verification teams to ensure proper verification of features in your systems. You will work with the manufacturing teams to ensure that your designs are manufactured and ready for volume production. You will work with the field teams to support systems that are deployed in the data center. Our Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power all of Google's services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes
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TITLE: HW Dev Engineer - Payload, Hardware Development, Amazon LEO
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $97K-$160K
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10424428/hw-dev-engineer-payload-hardware-development-amazon-leo
EXCERPT: HW Dev Engineer - Payload, Hardware Development, Amazon LEO Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. As a Hardware Engineer, you will be a part of the team of experts working on the development of advanced satellite systems. You will own or contribute to the following: · Design and optimization of different circuitry for satellite systems · Design the proof of concept prototypes for the next generation of satellite hardware · Closely collaborate with radiation, power, mechanical, thermal, RF, software teams · Design of automated test systems, test fixtures, and factory test · Bring-up and qualification test campaigns of satellite hardware · Lead and review PCB layout At Amazon, we hire the best minds in technology to innovate and build on behalf of our customers. As a hardware engineer, you will work alongside Senior Electrical Engineers supporting the design, debug, validation and optimization of the products. You will be involved in projects from concept through production, gaining exposure to the complete design lifecycle. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Basic Qualifications: - 2+ years of hardware design and validation of components, subsystems and systems experience - Bachelor's degree in mechanical engineering, electrical
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TITLE: Senior ASIC Design Infrastructure & Methodologies engineer, MLA-MI - Annapurna Labs
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $159K-$215K
POSTED: 2026-03-27
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10378257/senior-asic-design-infrastructure-methodologies-engineer-mla-mi-annapurna-labs
EXCERPT: Senior ASIC Design Infrastructure & Methodologies engineer, MLA-MI - Annapurna Labs Austin, Texas, USA Our Machine Learning Acceleration (MLA) team designs and develops the SOCs that power today's AI workloads across datacenters worldwide. As an ASIC Design Methodologies and Infrastructure Engineer, you'll play a foundational role in the project by automating design flows and building large-scale solutions that accelerate silicon development and we're just getting started here at Amazon! We're looking for a strong engineer who is passionate about creating design flows and automation flows that enhance both the productivity and quality of our design team. The ideal candidate brings proven expertise in RTL design and front-end methodologies while having good software skills and a drive for improving and automating flows. In this role, you'll collaborate closely with architects, designers, verification engineers, and other cross-functional team members to refine existing design flows and introduce innovative automation solutions that streamline flows and elevate overall design quality. Key job responsibilities Core Responsibilities: - Develop and implement new methodologies and infrastructure to empower design teams to operate efficiently while maintaining high-quality standards. - Enhance and build design flows to boost the overall productivity of design teams. - Collaborate with vendors to evaluate and qualify new design tools and updated tool versions. About the team Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks
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TITLE: HW Dev Engineer-Payload, LEO
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $117K-$160K
POSTED: 2026-04-28
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10406208/hw-dev-engineer-payload-leo
EXCERPT: HW Dev Engineer-Payload, LEO Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. A day in the life: As an Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting phased array antenna systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon LEO's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, and test. The Hardware Engineer will have a complete understanding of how their design changes impact downstream partners such as operations, supply chain, product management, and reliability. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: - Own PCBA development from concept through production - Design and optimize different blocks of electronics sub-systems - Design high-speed digital circuitry in collaboration with various teams - Lead and review schematic capture and PCB layout - Lead PCB vendor engagement for DFM review - Optimize PCB stack-up for performance and cost - Generate test plans/procedures based off high level requirement definition - Complete board bring-up and perform test campaigns for different modules and subsystems - Design of automated test systems, test fixtures,
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TITLE: Associate Technical Designer, Mainline, Handbags/Leathergoods
EMPLOYER: Tapestry, Inc.
LOCATION: New York, New York, USA (Corporate Headquarters) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 8 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 8 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://tapestry.wd108.myworkdayjobs.com/Tapestry_Careers/job/New-York-New-York-USA-Corporate-Headquarters/Associate-Technical-Designer--Mainline_JR1947-1
EXCERPT: Associate Technical Designer, Mainline, Handbags/Leathergoods New York, New York, USA (Corporate Headquarters) posted: Posted 30+ Days Ago
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TITLE: System Architect, Hardware Architecture
EMPLOYER: Amazon
LOCATION: Sunnyvale, California, USA (unspecified)
SALARY: $157K-$213K
POSTED: 2026-05-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10416267/system-architect-hardware-architecture
EXCERPT: System Architect, Hardware Architecture Sunnyvale, California, USA The Amazon Devices team designs high-profile consumer electronics, including the best-selling Amazon Echo, FireTV, Fire Tablets, Kindle, and Astro family of products. We are looking for a motivated individual contributor with a solid hardware or silicon background, great communication skills, and the passion to collaborate with a cross-functional team to drive system architecture across Amazon devices. Key job responsibilities As a System Architect, you will be responsible for defining the system architecture for consumer products such as Echo, FireTV and a range of new concepts not yet announced. You will serve as the lead technical point of contact that the product management and business teams rely on to interpret and clarify the product concept's desired user experience and requirements. You will define system architecture that can meet product requirements and work closely with the business team to understand and clarify requirements and user experience tradeoffs. In the process of architecture definition, you will drive key design decisions such as edge-cloud compute partition, device SoC selection, compute architecture (CPU, DSP, GPU and ML accelerators), and other system component selections (chipsets, memory, storage). You will document the decisions in a system architecture specification document that will provide relevant design guidance for the engineering team. Besides directly defining product architectures, you will track market trends, interface directly with silicon and IP vendors, and define roadmaps for the whole organization on the next generation compute IP and silicon platforms. You will dive deep into silicon design, define
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TITLE: HW Dev Engineer-Payload, Hardware Development
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $117K-$160K
POSTED: 2025-10-22
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3113983/hw-dev-engineer-payload-hardware-development
EXCERPT: HW Dev Engineer-Payload, Hardware Development Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. A day in the life: As an Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting phased array antenna systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon LEO's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, and test. The Hardware Engineer will have a complete understanding of how their design changes impact downstream partners such as operations, supply chain, product management, and reliability. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: - Own PCBA development from concept through production - Design and optimize different blocks of electronics sub-systems - Design high-speed digital circuitry in collaboration with various teams - Lead and review schematic capture and PCB layout - Lead PCB vendor engagement for DFM review - Optimize PCB stack-up for performance and cost - Generate test plans/procedures based off high level requirement definition - Complete board bring-up and perform test campaigns for different modules and subsystems - Design of automated test systems, test
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TITLE: Static Timing Analysis Manager, Full Chip, SOC, Implementation
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $192K-$279K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckWgZXCAUWDWOuTokdSZCZxlni5eYRRolsB-LQgdhjR3NEjsACxwdTLarVONs5a2P3Hj8T2PuTMc4sARHe3WNGBd-bK-TSKRWwFEEmn_vymSwJRXgwfgHOO_xA63DKQ%3D%3D_V2&loc=US&title=Static+Timing+Analysis+Manager
EXCERPT: Static Timing Analysis Manager, Full Chip, SOC, Implementation Mountain View, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $192000 - $279000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead and manage functional Static Timing Analysis (STA) team responsible for delivering system-on-chip (SoC) STA. Execute full chip timing sign-off checklist, perform full chip STA, power recovery, timing ECO creation and oversee final timing sign-off for SoC's. Define SoC timing sign-off process corners, derates, uncertainties and their trade-offs. Drive clock tree planning and implementation for SoCs to achieve best energy, performance and area. Collaborate with front-end, Design for Test (DFT) and Computer-aided design (CAD) teams for the design exploration and closure. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical
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TITLE: HW Dev Engineer - Payload, Amazon Leo Hardware Development
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $117K-$160K
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10424422/hw-dev-engineer-payload-amazon-leo-hardware-development
EXCERPT: HW Dev Engineer - Payload, Amazon Leo Hardware Development Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. As a Hardware Engineer, you will be a part of the team of experts working on the development of advanced satellite systems. You will own or contribute to the following: · Design and optimization of circuitry for satellite systems · Design the proof of concept prototypes for the next generation of satellite hardware · Closely collaborate with radiation, power, mechanical, thermal, RF, software teams · Design of automated test systems, test fixtures, and factory test · Bring-up and qualification test campaigns of satellite hardware · Lead and review PCB layout At Amazon, we hire the best minds in technology to innovate and build on behalf of our customers. As a hardware engineer, you will work alongside Senior Electrical Engineers supporting the design, debug, validation and optimization of the products. You will be involved in projects from concept through production, gaining exposure to the complete design lifecycle. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Basic Qualifications: - Bachelor's degree or above in electrical engineering, computer engineering, or equivalent - 3+ years of industrial experience especially board level analog/digital
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TITLE: Senior Mechanical Design Engineer - Flexible Instruments
EMPLOYER: Intuitive Surgical, Inc.
LOCATION: Sunnyvale, CA, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 8 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 8 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/Intuitive/744000094063806-senior-mechanical-design-engineer-flexible-instruments
EXCERPT: Senior Mechanical Design Engineer - Flexible Instruments Sunnyvale, CA, United States Company Description: At Intuitive, we are united behind our mission: we believe that minimally invasive care is life-enhancing care. Through ingenuity and intelligent technology, we expand the potential of physicians to heal without constraints. As a pioneer and market leader in robotic-assisted surgery, we strive to foster an inclusive and diverse team, committed to making a difference. For more than 25 years, we have worked with hospitals and care teams around the world to help solve some of healthcare's hardest challenges and advance what is possible. Intuitive has been built by the efforts of great people from diverse backgrounds. We believe great ideas can come from anywhere. We strive to foster an inclusive culture built around diversity of thought and mutual respect. We lead with inclusion and empower our team members to do their best work as their most authentic selves. Passionate people who want to make a difference drive our culture. Our team members are grounded in integrity, have a strong capacity to learn, the energy to get things done, and bring diverse, real world experiences to help us think in new ways. We actively invest in our team members to support their long-term growth so they can continue to advance our mission and achieve their highest potential. Join a team committed to taking big leaps forward for a global community of healthcare professionals and their patients. Together, let's advance the world of minimally invasive care. Job Description:
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TITLE: Military DoD SkillBridge Internship - Maintenance Cadence Leader
EMPLOYER: GE Aerospace
LOCATION: Wilmington NC USA (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-28
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://geaerospace.wd5.myworkdayjobs.com/GE_ExternalSite/job/Wilmington-NC-USA/Military-DoD-SkillBridge-Internship---Maintenance-Cadence-Leader_R5035420-1
EXCERPT: Military DoD SkillBridge Internship - Maintenance Cadence Leader Wilmington NC USA posted: Posted 15 Days Ago
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TITLE: Hardware Engineer, Amazon LEO
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $117K-$160K
POSTED: 2026-04-28
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10406205/hardware-engineer-amazon-leo
EXCERPT: Hardware Engineer, Amazon LEO Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Key job responsibilities - Own PCBA development from concept through production - Design and optimize different blocks of electronics sub-systems - Design high-speed digital circuitry in collaboration with various teams - Lead and review schematic capture and PCB layout - Lead PCB vendor engagement for DFM review - Optimize PCB stack-up for performance and cost - Generate test plans/procedures based off high level requirement definition - Complete board bring-up and perform test campaigns for different modules and subsystems - Design of automated test systems, test fixtures, and factory test - Support the transition of the designs to production Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. A day in the life As an Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting phased array antenna systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon LEO's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation,
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TITLE: Design Director, Core Experience
EMPLOYER: Block, Inc.
LOCATION: Bay Area, CA, United States of America (unspecified)
SALARY: $304K-$457K
POSTED: 2025-11-24
PARENTAL_LEAVE_WEEKS: 16 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: http://block.xyz/careers/jobs/4980557008?gh_jid=4980557008
EXCERPT: Design Director, Core Experience Bay Area, CA, United States of America Block is one company built from many blocks, all united by the same purpose of economic empowerment. The blocks that form our foundational teams - People, Finance, Counsel, Hardware, Information Security, Platform Infrastructure Engineering, and more - provide support and guidance at the corporate level. They work across business groups and around the globe, spanning time zones and disciplines to develop inclusive People policies, forecast finances, give legal counsel, safeguard systems, nurture new initiatives, and more. Every challenge creates possibilities, and we need different perspectives to see them all. Bring yours to Block. The Role The Core Experience design team shapes the future of Cash App by defining the fundamental flows, frameworks, and surfaces that tens of millions of customers rely on every day. We are a team that drives the strategic step-changes pushing our product forward. As the Design Lead for Core Experience, you will report to Cam Worboys (Head of Product Design, Cash App and Afterpay) and lead a team of 10+ designers. This is a hybrid player-coach and DRI role: you will set an exceptionally high craft bar while staying hands-on with the most critical work. You will partner with senior leadership across product, engineering, and research to define long-term vision, drive roadmaps, and ship experiences that redefine what a financial product can feel like. You Will - Define and uphold craft excellence for Core Experience - staying close to the details, leading critique, and ensuring
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TITLE: Hardware Systems Architect, eero Hardware Engineering
EMPLOYER: Amazon
LOCATION: San Francisco, California, USA (unspecified)
SALARY: $158K-$214K
POSTED: 2026-05-22
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10428845/hardware-systems-architect-eero-hardware-engineering
EXCERPT: Hardware Systems Architect, eero Hardware Engineering San Francisco, California, USA At eero, our mission is to serve as the central nervous system of the home. While we began by revolutionizing home WiFi, we aim to create comprehensive solutions that serve both wireless and wired connectivity needs for customers and businesses across the globe. Our cross-functional team, spanning hardware, software, and manufacturing, develops advanced Ethernet switching and gateway products, alongside state of the art security features, to complement our award-winning mesh WiFi systems. As an Amazon company, we combine the best of startup culture with the resources and stability of one of the world's leading technology companies. Our team builds products that customers love - from mesh routers to high-performance wired networking devices - and we're looking for you to join us in shaping the future of the connected home. We are seeking an experienced Hardware System Architect to lead the design and development of next-generation hardware products. This role requires deep technical expertise in system architecture, chipset technologies, and wireless integration, combined with strong cross-functional leadership skills to drive strategic product decisions. Key job responsibilities - Define system-level requirements and architecture for next-generation hardware products, evaluating trade-offs in performance, power efficiency, thermal management, and cost - Evaluate and select chipset vendors through technical assessments of capabilities, roadmaps, and competitive positioning - Conduct competitive analysis including product teardowns, performance benchmarking, and market trend identification to inform product strategy - Design product features and system architectures that optimize user experience while meeting
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TITLE: Senior Signal and Power Integrity Engineer, Pixel
EMPLOYER: Google
LOCATION: New Taipei, Banqiao District, New Taipei City, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-03
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckfQS4ckZybU1ECEH9h7J-ssyus5QF_c_A3pA0N9Yv1TAEjsACxwdTL-whO8tsV1Ug6O_yLJkdoW5u4RGMfirZCnfCG27ZZkMayQqVZZytbE189PL7-dkcj1yMkTfuA%3D%3D_V2&loc=TW&title=Senior+Signal+and+Power+Integrity+Engineer
EXCERPT: Senior Signal and Power Integrity Engineer, Pixel New Taipei, Banqiao District, New Taipei City, Taiwan Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Design Google's future products by managing architecture selection, electrical design, and validation, including early product architecture definition and manage Signal Integrity (SI) and Power Integrity (PI) of products and sub-component development. Provide detailed SI/PI rules for cutting-edge PCB and Flex technology and participate in PCB design reviews and drive resolution of SI/PI challenges in collaboration with Design Engineer, PCB Designer, and System teams. Provide simulation and DOEs to support cross-functional teams on SI/PI debugging, root-cause analysis, and solution optimization and work with Engineering/Qualification teams on system bring-up and design validation. Bring Pixel design to mass production by defining ERS, analyzing test data, assisting in software bring-up, and traveling on-site to ensure successful manufacturing and testing. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or related field or equivalent practical experience. 4 years of work experience in Consumer Electronics/embedded system design or electrical systems development. 4 years
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TITLE: Sr HW Dev Engineer - Payload, Amazon Leo Hardware Development
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $137K-$186K
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10424426/sr-hw-dev-engineer-payload-amazon-leo-hardware-development
EXCERPT: Sr HW Dev Engineer - Payload, Amazon Leo Hardware Development Redmond, Washington, USA Amazon Leo is Amazon's low Earth orbit satellite network. Our mission is to deliver fast, reliable internet connectivity to customers beyond the reach of existing networks. From individual households to schools, hospitals, businesses, and government agencies, Amazon Leo will serve people and organizations operating in locations without reliable connectivity. As an Senior Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon Leo's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, and test. The Senior Hardware Engineer will have a complete understanding of how their design changes impact downstream partners such as operations, supply chain, product management, and reliability. They will make daily high-value judgements on tactical vs. strategic decisions in order to achieve system performance targets and maintain schedules despite unexpected challenges. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: -Own PCBA development from concept through production -Design and optimize different blocks of electronics sub-systems -Design high-speed digital and/or RF circuitry in collaboration with various teams -Lead and review schematic capture and PCB layout -Lead PCB vendor engagement for
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TITLE: SoC Hardware Architect
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Oakhill, Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/SoC-Hardware-Architect_R-10063821
EXCERPT: SoC Hardware Architect Austin (Oakhill, Office) posted: Posted 7 Days Ago
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TITLE: Hardware Dev Engineer , Velocity
EMPLOYER: Amazon
LOCATION: Westboro, Wisconsin, USA (unspecified)
SALARY: $97K-$160K
POSTED: 2026-04-16
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10393833/hardware-dev-engineer-velocity
EXCERPT: Hardware Dev Engineer , Velocity Westboro, Wisconsin, USA As a Hardware Development Engineer within the (RDPI) team, you will design, develop, and deliver mechanical components and systems for Amazon's next generation of products. You will work with cross-functional teams to transform concepts into manufacturable designs that meet customer needs and business requirements. Key job responsibilities - Deliver mechanical design projects from concept through production, ensuring designs meet functional requirements, cost targets, and manufacturing constraints - Create 3D CAD models, engineering drawings, and specifications for mechanical components and assemblies - Conduct engineering analyses including tolerance stack-ups, Geometric Dimensioning and Tolerancing (GD&T), and Finite Element Analysis (FEA) - Develop and execute test plans to validate mechanical designs against product requirements - Collaborate with industrial designers, electrical engineers, and manufacturing partners to integrate mechanical designs with other subsystems. - Identify and resolve technical issues during development and production phases - Document design decisions, test results, and engineering changes - Support Design for Manufacturing (DFM) and Design for Assembly (DFA) activities Basic Qualifications: - 4+ years of hardware design and validation of components, subsystems and systems experience - Bachelor's degree in robotics, mechanical/mechatronics engineering, systems engineering or related field Preferred Qualifications: - Knowledge of SolidWorks or similar CAD experience and understanding of best practices for part design, and advanced assemblies - Experience in the design of complex mechanical products and equipment from prototyping to implementation Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or
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TITLE: ASIC II - AMZ9679283
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $136K-$184K
POSTED: 2026-04-06
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10384121/asic-ii-amz9679283
EXCERPT: ASIC II - AMZ9679283 Austin, Texas, USA MULTIPLE POSITIONS AVAILABLE Employer: ANNAPURNA LABS (U.S.) INC. Offered Position: ASIC II Job Location: Austin, Texas Job Number: AMZ9679283 Position Responsibilities: Design and validate signal and power integrity (SI/PI) systems for next generation machine learning ASICs and customized hardware platforms optimized for AWS datacenter environments. Perform both time-domain and frequency-domain simulations using tools such as HSPICE, Cadence Sigrity, HFSS, and Keysight ADS, including 3D/2.5D EMIR analysis. Apply transmission line theory and electromagnetics to develop high-speed interfaces like SerDes and PCIe, resolving complex SI issues across digital systems. Collaborate cross-functionally with silicon, packaging, board design, and validation teams to ensure system-level integrity across PCB, interposers, and advanced SoC power delivery architectures using die-level capacitors (DTC, IPD). Use high-speed lab equipment to validate and correlate simulation results, while debugging prototypes to meet stringent performance requirements. Tackle novel challenges in interconnects and power delivery for large-scale compute environments by proposing innovative, high-impact solutions. Document simulation outcomes, measurement data, and design trade-offs, presenting clear recommendations to both technical and non-technical stakeholders while fostering a culture of continuous learning and engineering excellence Position Requirements: Bachelor's degree or foreign equivalent degree in Electrical or Computer Engineering or related field and two years of experience in the job offered or related occupation. Must have one year of experience in the following skills: (1) using time domain and frequency domain tools: Hspice, Sigrity, HFSS, or Microwave Studio; (2) with PCB, Package, interposers (COWOS) and Silicon Technologies; (3) in Transmission line theory
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TITLE: TPU RTL Design Engineer, Networking, Inter-Chip Interconnects
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $138K-$198K
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckUSKvvD_oVc1L302C62KP4BWNDOBf9W9Ii0uVn5PjykrEjsACxwdTDFsjBMz3oadbd2ROj52wkt8pjqP6DTIWOIScTkWJ8Icwz1CMaOBg96i_LO4TKOMazY7x1AAdw%3D%3D_V2&loc=US&title=TPU+RTL+Design+Engineer
EXCERPT: TPU RTL Design Engineer, Networking, Inter-Chip Interconnects Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. Join the team designing and developing the core components of Google's next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in data centers. As a member of the inter-chip interconnect team, you will play an important role in designing ASIC/SoC hardware for AI and networking accelerators that drive the computational workloads behind Google's most important products. Our hardware accelerators power nearly every product Google offers. Our primary focus is AI acceleration. You will design RTL IP with a focus on chip-to-chip high-speed interconnect subsystems. You will have dynamic, multi-faceted responsibilities in areas such as project definition, RTL design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators. You will have the opportunity to solve challenging technical problems at the forefront of AI hardware, working in a dynamic and collaborative environment. The AI and Infrastructure
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TITLE: Sr. Satellite Payload Hardware Engineer , Amazon Leo
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $137K-$186K
POSTED: 2026-03-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3201623/sr-satellite-payload-hardware-engineer-amazon-leo
EXCERPT: Sr. Satellite Payload Hardware Engineer , Amazon Leo Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: - Own the satellite gateway design from concept through production - Design and optimize different blocks of electronics sub-systems - Design high-speed digital circuitry supporting various SERDES protocols in collaboration with various teams - Lead and review schematic capture and PCB layout - Optimize PCB stack-up for performance and cost - Complete board bring-up and perform test campaigns for different modules and subsystems - Support the transition of the designs to production Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. A day in the life As a Satellite Payload Hardware Engineer, you will lead the design workstream on some of the most innovative, challenging, and exciting gateway systems in industry. You will engage with an experienced team to conceive and design the gateway aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon LEO's various sub-teams and engage third party suppliers to drive product definition, design,
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TITLE: Sr. Mechanical Engineer, Annapurna Labs, Machine Learning Hardware
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $159K-$215K
POSTED: 2026-02-27
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3191937/sr-mechanical-engineer-annapurna-labs-machine-learning-hardware
EXCERPT: Sr. Mechanical Engineer, Annapurna Labs, Machine Learning Hardware Austin, Texas, USA Annapurna Labs (our organization within Amazon) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. As a member of the Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you'll work with thought leaders in multiple technology areas. You'll have high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve your products performance, quality and cost. We're changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today. Key job responsibilities As a Thermal/Mechanical Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge
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TITLE: Technical Lead, Digital Design Subsystems
EMPLOYER: Google
LOCATION: Bengaluru, Karnataka, India (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckZ1Dw_V7b7VaJrZRvVXel89kDBEI4CRSMPzqsfu1MapPEjsACxwdTEq-4HE325AthYSfjypuwD3EPELjETnngljGGFvViQA_LlvdJrYwGpDktjgWaoDgpMBon771uw%3D%3D_V2&loc=IN&title=Technical+Lead
EXCERPT: Technical Lead, Digital Design Subsystems Bengaluru, Karnataka, India Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Lead a team of ASIC RTL engineers on sub-system and activities including: plan tasks, hold code and design reviews, code development of complex features. Interact closely with the Architecture team and develop implementation (microarchitecture and coding) strategies to meet quality, schedule and Power, Performance, and Area (PPA) for sub-system integration. Work closely with the cross-functional team of Verification, Design for Test, Physical Design and Software teams to make design decisions and represent project status throughout the development process. Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. 10 years of experience working on multiple SoCs with silicon success. 3 years of experience in RTL coding using Verilog or Systemverilog language. Experience in design and multi power domains with clocking. Preferred qualifications: Experience in high performance design, multi power domains with complex clocking. Proficient
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TITLE: Mechanical Engineer, Annapurna Labs, Machine Learning Hardware
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $136K-$184K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10440713/mechanical-engineer-annapurna-labs-machine-learning-hardware
EXCERPT: Mechanical Engineer, Annapurna Labs, Machine Learning Hardware Austin, Texas, USA Annapurna Labs (our organization within Amazon) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. As a member of the Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you'll work with thought leaders in multiple technology areas. You'll have high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve your products performance, quality and cost. We're changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today. Key job responsibilities As a Thermal/Mechanical Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data
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TITLE: Sr. Product Designer, Devices Experience Design
EMPLOYER: Amazon
LOCATION: Seattle, Washington, USA (unspecified)
SALARY: $138K-$186K
POSTED: 2026-02-03
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3173021/sr-product-designer-devices-experience-design
EXCERPT: Sr. Product Designer, Devices Experience Design Seattle, Washington, USA The Devices & Services Experience Design (DxD) team leads user experience and industrial design innovation across Amazon's device portfolio, including Echo, Fire TV, Fire Tablets, Alexa.com, and related mobile apps. Our team works at the intersection of design, product and engineering, creating meaningful hardware and software experiences that enhance customer lives. We believe in storytelling and thinking holistically to craft the "why" behind everything we ship. We're seeking a versatile Sr. Product Designer who is passionate about building incredible product experiences for the Echo Family of Devices and customers across the Amazon devices and services portfolio. Our team is composed of multi-disciplinary designers who blend boundaries across UX design, visual, motion, prototyping and industrial design. We innovate end to end on product concepts starting from ideation of scenarios, to refined visual and conversational prototypes, to working with partner teams to execute and integrate seamlessly with devices. We are makers at heart- transforming early concepts into high-fidelity, interactive experiences that leverage device capabilities across vision systems, audio, touch, gesture and natural modes of interaction. Storytelling is integrated into daily work of the design team - communicating strategy to diverse stakeholders, helping others see future possibilities today. We create clarity from ambiguity, solving problems and when there are multiple considerations and tradeoffs to consider. You will be participating in a deeply collaborative team, partnering with cross-functional groups across design disciplines, research, developers and product managers. Your hands-on approach builds trust and elevates the
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TITLE: Mechanical Design Engineer, Data Center Design Engineering
EMPLOYER: Amazon
LOCATION: Seattle, Washington, USA (unspecified)
SALARY: $97K-$160K
POSTED: 2026-05-18
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10423005/mechanical-design-engineer-data-center-design-engineering
EXCERPT: Mechanical Design Engineer, Data Center Design Engineering Seattle, Washington, USA Engineers at Amazon work to design resilient, cost effective mechanical distribution systems. As engineers at Amazon we are responsible for achieving a world class uptime for our customers. We justify and communicate the technical decisions we make to Sr. Management and work hard to drive continuous advancements and improvements with our designs. As an engineer at Amazon you have the ability to drive change and define/design the systems our customers rely on. Amazon offers a fast paced, fun, and exciting work environment. We continue to grow at exponential rates and are looking for individuals that can support our speed to market, enjoy a challenge, and have a desire for professional growth and continuous learning experiences. Amazon's work environment is unique in every aspect and offers an exceptional opportunity for the right candidate. We are looking for engineers with hands on mechanical design experience. If you can design a mechanical system, have an understanding of the critical equipment needs for a data center, and understand the constructability of varying designs you may be a good fit. As we grow we are structuring our team to own more of our engineering in house. Engineers will be responsible for taking designs from concept to the permit and construction document set. You must be capable of defining critical equipment specifications and approving equipment submittals. Engineers will directly support construction and be a part of the process from site selection review through commissioning and ultimately
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TITLE: Mechanical Engineer Annapurna Labs , Annapurna Labs, Artificial Intelligence Hardware
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $136K-$184K
POSTED: 2026-02-17
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3183160/mechanical-engineer-annapurna-labs-annapurna-labs-artificial-intelligence-hardware
EXCERPT: Mechanical Engineer Annapurna Labs , Annapurna Labs, Artificial Intelligence Hardware Austin, Texas, USA Annapurna Labs (our organization within Amazon) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. As a member of the team, you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you'll work with thought leaders in multiple technology areas. You'll have high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve your products performance, quality and cost. We're changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today. Key job responsibilities As a Thermal/Mechanical Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data
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TITLE: Hardware Systems Engineer, Watches
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $132K-$190K
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckWa4XBqJL_hKFGPMVIjN7xxkUdpwcua_3n6P8Ens0VwsEjsACxwdTK5lgitavw1QeWKAw-jJwuR42ITRtB98qPiN09rrQOMOk8_c8vb6RmwBf4MdblvqNPcoVNfg4g%3D%3D_V2&loc=US&title=Hardware+Systems+Engineer
EXCERPT: Hardware Systems Engineer, Watches Mountain View, CA, USA The Pixel Watch Electrical Engineering (EE) team is responsible for the end-to-end hardware development of Google's first-party Watch products. We work with product managers during initial concept and design phases, advocate new technology investigations, and manage the entire hardware lifecycle, from board integration and comprehensive validation to overseeing manufacturing to deliver products with a user experience and state-of-the-art health sensing capabilities. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $132000 - $190000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Work with internal teams to evaluate and select components for next generation products based on product goals and end-user experiences. Design, develop, and review wearable systems and sub-components from concept to mass production. Perform detailed development to bring your design to mass production by setting factory test requirements, assisting in software bring up, traveling on-site to the manufacturer to ensure the design is built and tested successfully. Create system specifications and plan/lead validation of designs. Lead complete functional verification, signal characterization, power modeling/test, and system coexistence testing. Drive resolution of cross-functional issues including those related to architecture (performance, power consumption), production (quality, failure analysis, manufacturing), and development (schematic design and review, PCB layout, and system integration). Work with and manage suppliers/manufacturing partners to establish mutually beneficial relationships for future product designs. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field,
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TITLE: Senior Principal Analog Design Engineer
EMPLOYER: Northrop Grumman
LOCATION: United States-California-Woodland Hills (unspecified)
SALARY: $142K-$213K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
LEARNING_BUDGET_OFFERED: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-California-Woodland-Hills/Senior-Principal-Analog-Design-Engineer_R10218132
EXCERPT: Senior Principal Analog Design Engineer United States-California-Woodland Hills RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! We are looking for you to join our team as an Analog Design Engineer based out of Woodland Hills, CA. As a Analog
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TITLE: Mechanical Engineer, Data Center Design
EMPLOYER: Google
LOCATION: Pryor, OK, USA (unspecified)
SALARY: $144K-$209K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckRzPfFoeazYKYFR8KAH4KDP9c6_q0Lp85UiqZPqWDDwgEjsACxwdTFIGDAfPGltyuTTbVr1kjIQNZFiaE4P4uR5P0HFrSEwIS6KPbmQQSN_w_e8SstbtooJpRCyUCA%3D%3D_V2&loc=US&title=Mechanical+Engineer
EXCERPT: Mechanical Engineer, Data Center Design Pryor, OK, USA Our thirst for technology is a part of everything we do. The Data Center Engineering team takes the physical design of our data centers into the future. Our lab mirrors a research and development department -- cutting-edge strategies are born, tested and tested again. Along with a team of great minds, you take on complex topics like how we use power or how to run class environmentally-friendly facilities. You're a visionary who optimizes for efficiencies and never stops seeking improvements -- even small changes that can make a huge impact. You generate ideas, communicate recommendations to senior-level executives and drive implementation alongside facilities technicians. With your technical expertise, you ensure compliance with codes and standards, develop infrastructure improvements and serve as an expert in your specialty (e.g., cooling, electrical). As Google expands its data center footprint, we are seeking an experienced and highly motivated mechanical engineer to join our growing team. In this role, you will play a key part in the design, implementation, and management of mechanical systems for our data centers. You will collaborate closely with cross-functional teams, including the Engineer of Record (EOR), to ensure our facilities are built to the highest standards of safety, reliability, and efficiency. You will have a passion for mechanical engineering, problem solving, and a desire to contribute to Google's critical infrastructure.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining
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TITLE: Principal/ Sr. Principal Engineering Design
EMPLOYER: Northrop Grumman
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: $96K-$144K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Principal--Sr-Principal-Engineering-Design_R10212344
EXCERPT: Principal/ Sr. Principal Engineering Design United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE TYPE: SAP TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered by providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! Northrop Grumman offers challenging career opportunities in Hardware Engineering within the Mission Systems Sector that play a key role in the mission to
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TITLE: Sr. Principal PWB Design Engineer
EMPLOYER: Northrop Grumman
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: $123K-$185K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Sr-Principal-PWB-Design-Engineer_R10218767
EXCERPT: Sr. Principal PWB Design Engineer United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered by providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! Northrop Grumman offers challenging career opportunities in Hardware Engineering within the Mission Systems Sector that play a key role in the mission to
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TITLE: HW Dev Engineer-Payload, Leo PAA Hardware
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $117K-$160K
POSTED: 2026-03-16
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3205568/hw-dev-engineer-payload-leo-paa-hardware
EXCERPT: HW Dev Engineer-Payload, Leo PAA Hardware Redmond, Washington, USA Amazon LEO is an initiative to increase global broadband access through a constellation of 3,236 satellites in low Earth orbit (LEO). Its mission is to bring fast, affordable broadband to unserved and underserved communities around the world. Amazon LEO will help close the digital divide by delivering fast, affordable broadband to a wide range of customers, including consumers, businesses, government agencies, and other organizations operating in places without reliable connectivity. As an Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting phased array antenna systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon Leo's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, and test. The Hardware Engineer will have a complete understanding of how their design changes impact downstream partners such as operations, supply chain, product management, and reliability. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: Own PCBA development from concept through production Design and optimize different blocks of electronics sub-systems Design high-speed digital and/or RF circuitry in collaboration with various teams Lead and review schematic capture and PCB layout Lead PCB vendor engagement for DFM review Optimize PCB stack-up for
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TITLE: Sr. Embedded SDE, Ring, Alarm & Accessories
EMPLOYER: Amazon
LOCATION: Sunnyvale, California, USA (unspecified)
SALARY: $193K-$262K
POSTED: 2026-05-18
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10423036/sr-embedded-sde-ring-alarm-accessories
EXCERPT: Sr. Embedded SDE, Ring, Alarm & Accessories Sunnyvale, California, USA Ring is working on innovative smart security solution and we are looking for skilled individuals with a strong bias for action and deep technical knowledge to join our core development team. The ideal candidate is passionate about IOT connected device , has a strong proficiency in embedded and systems software, and understands how code runs on hardware. As Senior Software Development Engineer, you will be responsible for defining, building and supporting the system design, architecture, and software for Ring IoT products. As a member of our team, you will be interacting closely with the business and cross-functional engineering teams across different organizations to gather engineering requirements, design and implement new features. You will contribute to all aspects of an agile software & systems development life cycle including design, architecture, development, documentation, testing and operations. You are the engineer that other engineers can count on; you are technical, you attack every problem with enthusiasm. Key job responsibilities • Dive deep and take ownership for critical design issues involving algorithm, hardware/firmware interfaces, IoT interfaces, overall system performance, etc. • Participate in design reviews for complex embedded systems, simulations, algorithms and software development • Influence and partner to develop the technical strategies for overall system designs • Solve problems using the most appropriate combination of hardware, software, systems design, architecture, process, or operations. • Lead reviews of architecture, design, operations, process, or post-incident analysis for your team. Actively participate in reviews of systems
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TITLE: Sr. Physical Design Engineer, Annapurna Labs
EMPLOYER: Amazon
LOCATION: Cupertino, California, USA (unspecified)
SALARY: $183K-$248K
POSTED: 2026-05-01
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10409016/sr-physical-design-engineer-annapurna-labs
EXCERPT: Sr. Physical Design Engineer, Annapurna Labs Cupertino, California, USA Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers). Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities - Work with RTL/logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO/Core subsystem/block physical implementation through synthesis, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off - Develop physical design methodologies - Evaluate 3rd party IP and provide recommendations - Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as
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TITLE: Senior ECAD Library Engineer, Platforms Infrastructure
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $159K-$231K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckSG-NDg0KJSk02xfjzOfco6WOTZjVyb91AI-PDmWHAhkEjsACxwdTB7zz3fX0RW6KfH79SkpJ0TG145sN1fIV_ExzM2MNbT-xaen8P5A5DpLnQZwdUL6hsrY9WAMOw%3D%3D_V2&loc=US&title=Senior+ECAD+Library+Engineer
EXCERPT: Senior ECAD Library Engineer, Platforms Infrastructure Sunnyvale, CA, USA As an ECAD Librarian, you will manage the Digital Network Architecture (DNA) of our hardware, building and organizing the libraries that allow our engineers to design the world's most powerful computing infrastructure. From large Ball Grid Array (BGA) packages to interconnects, you will ensure that every component is built for precision, manufacturability, and global scale. In this role, you will bridge the gap between Electrical Engineering, Printed Circuit Board Layout, and Manufacturing. You will architect a library system that supports seamless routing and hardware lifecycles. Your work ensures that Google's custom-built servers move from concept to high-volume manufacturing, directly impacting the infrastructure that powers services for millions of users. Our Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power all of Google's services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of Google users.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Manage the
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TITLE: Senior Hardware Systems Design Engineer, Board and Systems
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $159K-$231K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckeJqAd3lIDngvujaJ1s9Zg5FzUH3aNoSwFUnu5OibkL3EjsAvkGZm5CeB4pZ_-SCuuq-9yHU5RxQNvE_eBOJGQTeK0c56_dQNCbsLawBMfkzMBkiEI6Ant2PqSCvzQ%3D%3D_V2&loc=US&title=Senior+Hardware+Systems+Design+Engineer
EXCERPT: Senior Hardware Systems Design Engineer, Board and Systems Sunnyvale, CA, USA As a Senior Hardware Engineer, you will work on ML/AI hardware systems projects to craft solutions for current and future data center deployments. You will work with product teams to ensure that goals are met with systems and will work with ASIC/FPGA, software, and verification teams to ensure proper verification of features. You will also work with manufacturing teams to ensure that designs are manufacturable and ready for volume production and with field teams to support systems that are deployed in the data center.The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving team behind Google's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Gather system requirements,
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TITLE: Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $163K-$237K
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckSgalpQhzM5Ichn4Kev0ABmyItMwQYLWnnrpagdWX5eqEjsACxwdTLGpYbkeUqFv9jbOOe4BYIoPkADmjeIPXdAYCjvHAC_KBtAKQe4QJFNsAIk4l4TeYLnCYHwAFQ%3D%3D_V2&loc=US&title=Senior+TPU+RTL+Design+Engineer
EXCERPT: Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects Sunnyvale, CA, USA In this role, you will work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. Join the team designing and developing the core components of Google's next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in data centers. As a member of the inter-chip interconnect team, you will play an important role in designing ASIC/SoC hardware for AI and networking accelerators that drive the computational workloads behind Google's most important products. Our hardware accelerators power nearly every product Google offers. Our primary focus is AI acceleration. You will design RTL IP with a focus on chip-to-chip high-speed interconnect subsystems. You will have dynamic, multi-faceted responsibilities in areas such as project definition, RTL design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators. You will have the opportunity to solve challenging technical problems at the forefront of AI hardware, working in a dynamic and collaborative environment. The AI
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TITLE: FPGA Design Engineer
EMPLOYER: Northrop Grumman
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: $96K-$144K
POSTED: 2026-05-21
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/FPGA-Design-Engineer_R10229359
EXCERPT: FPGA Design Engineer United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: Yes CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. The Multidomain Sensing, Targeting, and Survivability Division (MSTS), located in the Northwest Chicago suburbs, develops operational Electronic Warfare (EW) and targeting systems that provide situational awareness, self-protection, and offensive electronic attack capability to platforms across the spectrum from visible light IR to millimeter wave RF. By joining us, you'll work on projects that help safeguard our nation related to land forces, rotary wing survivability systems, international and U.S. military electronic warfare systems, communications systems, missile warning systems and sensors, infrared counter-measure systems (IRCM), automatic test equipment, modeling and simulation, and situational
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TITLE: Embedded SDE, Ring Device Software & Systems
EMPLOYER: Amazon
LOCATION: North Reading, Massachusetts, USA (unspecified)
SALARY: $144K-$194K
POSTED: 2026-01-29
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3169801/embedded-sde-ring-device-software-systems
EXCERPT: Embedded SDE, Ring Device Software & Systems North Reading, Massachusetts, USA As a Software Development Engineer, you will be responsible for defining, building and supporting the system design, architecture, and software for Ring IoT products. As a member of our team, you will be interacting closely with the business and cross-functional engineering teams across different organizations to gather engineering requirements, design and implement new features. You will contribute to all aspects of an agile software & systems development life cycle including design, architecture, development, documentation, testing and operations. You are the engineer that works with your team on solving the hard problems; you are technical, you attack every problem with enthusiasm. Key job responsibilities • Dive deep and works to help solve critical design issues involving algorithm, develop hardware/firmware interfaces, IoT interfaces, etc • Participate in design reviews for complex embedded systems, simulations, algorithms and software development owned by your team and partner teams • Influences within your team and partner teams to help drive and develop the technical implementation for overall system designs • Identify and implement process improvements which improve your team's agility. This may include improvements to design, automation, development, test or operations. • Define and/or refine system requirements, participate in the development and delivery of Interoperability-related features such as system health monitoring, diagnostics, repair, and other self-healing automation. • Develop embedded software in C/C++ A day in the life Your work is very hands-on and multi-disciplinary. You will be working closely with system engineers and product
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TITLE: Sr Product Designer, Design Systems Foundations
EMPLOYER: Adobe Inc.
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 16 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://adobe.wd5.myworkdayjobs.com/external_experienced/job/San-Francisco/Sr-Product-Designer--Foundations_R168319-1
EXCERPT: Sr Product Designer, Design Systems Foundations 2 Locations posted: Posted 30+ Days Ago
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TITLE: Sr. PLM System Dev Engineer, Tech Enab & Sol (7001)
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $151K-$205K
POSTED: 2026-06-03
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10438603/sr-plm-system-dev-engineer-tech-enab-sol-7001
EXCERPT: Sr. PLM System Dev Engineer, Tech Enab & Sol (7001) Austin, Texas, USA At Amazon, we're working to be the most customer-centric company on earth. To get there, we need exceptionally talented, bright, and driven people. Amazon is one of the most recognizable brand names in the world and we distribute millions of products each year to our loyal customers. The Amazon Robotics team is seeking a System Development Engineer for Teamcenter Product Lifecycle Management (PLM). This role sits at the intersection of enterprise PLM technology and robotics product development, supporting the systems that enable our cross functional teams to design, build, and deliver world-class robotic solutions. You will work with cross-functional teams to implement, configure, and continuously improve Teamcenter PLM to meet evolving business needs. The ideal candidate has a strong technical background with hands-on experience in Siemens Teamcenter PLM and an understanding of integrations with Mechanical and Electrical Computer Aided Design (CAD), Product Quality and Compliance software. This role requires an individual who is customer-centric, able to work in a fast-paced environment, and comfortable operating with an entrepreneurial mindset. You will collaborate with end-users, cross-functional development teams, and third-party vendors in requirements definition, system design and configuration management, application integrations, and continuously drive operational excellence through software development best practices. Key job responsibilities ● Configure, customize, maintain, and troubleshoot Teamcenter PLM application, workflows, and access controls to support Amazon Robotics product development processes ● Translate business requirements into structured, process-aligned solution designs leveraging Teamcenter PLM capabilities across master
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TITLE: Sr. Hardware Engineer - ML Acceleration, Annapurna Labs
EMPLOYER: Amazon
LOCATION: Cupertino, California, USA (unspecified)
SALARY: $143K-$248K
POSTED: 2025-09-18
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3087552/sr-hardware-engineer-ml-acceleration-annapurna-labs
EXCERPT: Sr. Hardware Engineer - ML Acceleration, Annapurna Labs Cupertino, California, USA AWS Utility Computing (UC) provides product innovations - from foundational services such as Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS's services and features apart in the industry. As a member of the UC organization, you'll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for customers who require specialized security solutions for their cloud services. Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. We are seeking a Hardware Design Engineer with role in the definition, design and validation of AWS next generation ML Chips, Cards and server integration. As a senior member of our hardware team, you will have the outstanding and meaningful opportunity to participate in the design and execution of all PCIe and Serdes topics, with the goal of creating and customized platforms that fit within AWS datacenter's world leading technology. As a member of the Machine Learning Acceleration team you'll be responsible for the design and optimization
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TITLE: Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware
EMPLOYER: Amazon
LOCATION: Austin, Texas, USA (unspecified)
SALARY: $159K-$215K
POSTED: 2026-02-27
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3191910/sr-signal-integrity-power-integrity-engineer-annapurna-labs-machine-learning-hardware
EXCERPT: Sr. Signal Integrity / Power Integrity Engineer, Annapurna Labs, Machine Learning Hardware Austin, Texas, USA Annapurna Labs (our organization within AWS) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. We are seeking a Senior SI/PI Engineer (Signal Integrity and Power Integrity) who will play a key role in the definition, design and validation of AWS next generation machine learning ASICs. As a senior member of our hardware team, you will have a meaningful opportunity to participate in the design and execution of all SI related topics, with the goal of creating and customized platforms that fit within AWS datacenter's world leading technology. Candidates will be successful in this role with these skills: - Strong communication and teamwork skills, with the ability to interact effectively with cross-functional teams. - Decisive, yet collaborative, approach, balancing technical constraints with business and manufacturing considerations. - Problem-solving mindset, able to troubleshoot and resolve SI/PI-related challenges efficiently. Key job responsibilities - Perform end-to-end high-speed channel simulations to ensure signal integrity across complex designs. - Conduct SI/PI analysis to optimize PCB layouts, minimizing losses and signal degradation. - Utilize simulation tools such as ADS, MATLAB, Cadence, HFSS, and others to evaluate performance and troubleshoot issues. - Work with PCIe protocols
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TITLE: Chip Design Engineer, Graviton Team
EMPLOYER: Amazon
LOCATION: Tel Aviv-Yafo, TA, ISR (unspecified)
SALARY: Not disclosed
POSTED: 2026-01-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3156914/chip-design-engineer-graviton-team
EXCERPT: Chip Design Engineer, Graviton Team Tel Aviv-Yafo, TA, ISR AWS Utility Computing (UC) provides product innovations - from foundational services such as Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS's services and features apart in the industry. As a member of the UC organization, you'll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services. Annapurna Labs, as part of Amazon Web Services (AWS), is looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture. Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the world's largest cloud provider, in a dynamic, open, and fast-paced environment. AWS provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world. AWS Graviton is a family of processors designed to deliver the best price performance for cloud workloads running in Amazon Elastic Compute Cloud (Amazon EC2), the world's largest leading Cloud vendor. We are looking for talented engineers to join our Chip Design team, working on the Graviton product line. Our chip design team is in charge of defining the product's features and working on their architecture and development. Our team
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TITLE: ASIC Design Verification Engineer, Platforms and Devices
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $138K-$198K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckVR0S2Rce9dHG8Jp3g-S2pA62QoT_vdn1dQ6DcfeusZdEjsAvkGZmyvo8dGjCEXKjfDBGXg5fqMeQDiB5KvPDYduNDhJ2WaPoIC5U0PToU4akypNCC0BvCFeZCGE2w%3D%3D_V2&loc=US&title=ASIC+Design+Verification+Engineer
EXCERPT: ASIC Design Verification Engineer, Platforms and Devices Mountain View, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration As a part of the Google Silicon Platforms team, you will work on verification of the backbone of Google's SOC offerings. You collaborate with hardware architects and design engineers for functional and performance verification of infrastructure IP, interconnects, caches, memory management, and system services. You will also work on developing high performance VIPs for protocols supported by our SOCs and closely collaborate on the deployment of the verification stack across a heterogeneous set of IPs. Our approach to building systems is based on scalability. Your work will include building and verifying a generalized class of system topology abstractions and developing the associated methodologies and tools needed to solve the problem. As an ASIC Design Verification Engineer, you will be part of a research and development team, and your responsibilities will include building verification components, constrained-random testing, system testing, and verification closure. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to
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TITLE: Systems Modeling Mechanical Engineer, Fleet Remediation Engineering
EMPLOYER: Amazon
LOCATION: Seattle, Washington, USA (unspecified)
SALARY: $117K-$160K
POSTED: 2026-04-21
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10397542/systems-modeling-mechanical-engineer-fleet-remediation-engineering
EXCERPT: Systems Modeling Mechanical Engineer, Fleet Remediation Engineering Seattle, Washington, USA AWS Infrastructure Services owns the design, planning, delivery, and operation of all AWS global infrastructure. In other words, we're the people who keep the cloud running. We support all AWS data centers and all of the servers, storage, networking, power, and cooling equipment that ensure our customers have continual access to the innovation they rely on. We work on the most challenging problems, with thousands of variables impacting the supply chain - and we're looking for talented people who want to help. You'll join a diverse team of software, hardware, and network engineers, supply chain specialists, security experts, operations managers, and other vital roles. You'll collaborate with people across AWS to help us deliver the highest standards for safety and security while providing seemingly infinite capacity at the lowest possible cost for our customers. And you'll experience an inclusive culture that welcomes bold ideas and empowers you to own them to completion. As a Systems Modeling Mechanical Engineer, you will bridge the gap between physical infrastructure and virtual simulation. You will be responsible for creating, maintaining, and validating high-fidelity models of our data center cooling systems, using these models to optimize performance, predict failures, and validate innovative product designs (such as advanced liquid cooling or high-density air-handling units) before deployment. If you are passionate about innovative projects at hyper-scale and meet these qualifications, this role is for you! Key job responsibilities • Build and maintain high-fidelity system models of data
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TITLE: Mechanical Engineer, Advanced Analytics
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $171K-$248K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2Fckeq5btdMEOXMPkzjKXnZ-IKGQHKewoZtcH6Gy20zayFkEjsACxwdTFYRArt9OKKHaYleM0052o7ut2pX8ZbmvSR2lFDv1BIHzDEEEsDkMDaJvkL3Anc5LqlIZqm00g%3D%3D_V2&loc=US&title=Mechanical+Engineer
EXCERPT: Mechanical Engineer, Advanced Analytics Sunnyvale, CA, USA Our thirst for technology is a part of everything we do. The Data Center Engineering team takes the physical design of our data centers into the future. Our lab mirrors a research and development department -- cutting-edge strategies are born, tested and tested again. Along with a team of great minds, you take on complex topics like how we use power or how to run state-of-the-art, environmentally-friendly facilities. You're a visionary who optimizes for efficiencies and never stops seeking improvements -- even small changes that can make a huge impact. You generate ideas, communicate recommendations to senior-level executives and drive implementation alongside facilities technicians. With your technical expertise, you ensure compliance with codes and standards, develop infrastructure improvements and serve as an expert in your specialty (e.g., cooling, electrical). The Thermal Systems Engineering team stands at the forefront of accelerating innovation that powers Google's global infrastructure. As a Mechanical Research Engineer on the Data Center Technology Systems (DCTS), a multidisciplinary group of engineers and architects dedicated to designing next-generation data centers, you will play a key role in developing, analyzing, and optimizing the mechanical cooling infrastructure. You will use various analytical tools to reveal important data points in the design process for efficient mechanical systems. You will be an excellent communicator, able to articulate complex ideas concisely across all digital mediums and provide recommendations to cross-functional engineers and architects to enhance our data centers' mechanical systems and accelerate construction. Behind everything our users
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TITLE: Principal/Sr. Principal RF Engineer
EMPLOYER: Northrop Grumman
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: $109K-$163K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Principal-Sr-Principal-RF-Engineer_R10225163
EXCERPT: Principal/Sr. Principal RF Engineer United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: Yes CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! Northrop Grumman Mission Systems develops Operational Electronic Warfare (EW) and targeting systems that provide situational awareness, self-protection, and offensive
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TITLE: Slack Proactive Monitoring Engineer
EMPLOYER: Salesforce
LOCATION: Indiana - Indianapolis; Washington - Seattle; Illinois - Chicago; Georgia - Atlanta (unspecified)
SALARY: $75K-$114K
POSTED: 2026-05-20
PARENTAL_LEAVE_WEEKS: 26 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 12 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers.salesforce.com/en/jobs/jr343368/slack-proactive-monitoring-engineer/
EXCERPT: Slack Proactive Monitoring Engineer Indiana - Indianapolis; Washington - Seattle; Illinois - Chicago; Georgia - Atlanta As a Slack Proactive Monitoring (ProM) Engineer , you will operate at the intersection of platform engineering, site reliability, and strategic customer success. You are a highly technical, customer-centric specialist dedicated to safeguarding the health and performance of Slack's largest and most complex global enterprise deployments (Enterprise Grid). Rather than waiting for customers to report problems, you will continuously monitor Slack workspace metrics, performance thresholds, API integrations, enterprise security events, and custom app behavior. You will proactively detect anomalies, triage system exceptions, and orchestrate rapid mitigation steps-frequently initiating preemptive customer outreach before their internal users even experience a slowdown. Key Responsibilities: Continuously monitor dashboards, alerting systems, and telemetry data (error rates, latency spikes, API failures, deployment anomalies) for early signals of degradation. Triage and correlate alerts from multiple sources (Splunk, internal tools, etc) to identify patterns before customers report issues. Actively monitor Slack platform health dashboards, network latency signals, message delivery queues, and database capacities for high-frequency workspaces. Monitor critical custom automations, Slack Workflow Builder runs, Enterprise Key Management (EKM) operations, and Identity Provider (IDP) authentication syncs. Identify customers potentially affected by degraded service conditions and coordinate proactive outreach with Customer Success and Support teams. Partner with the Incident Management team to escalate signals that meet incident-threshold criteria. Technical Advisory: Partner with Customer Success Managers and Success Architects to deliver annual technical health check reviews, assessing platform metrics, configuration limits, and custom integration health.
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TITLE: Standards and Components Manager 1
EMPLOYER: Northrop Grumman
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: $116K-$173K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Standards-and-Components-Manager-1_R10218216
EXCERPT: Standards and Components Manager 1 United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman offers challenging career opportunities in Hardware Engineering within the Mission Systems Sector that play a key role in the mission to protect our military personnel. The Hardware Engineering organization is dedicated to consistently providing high quality product designs in support of multiple product areas. The Design Data and Product Integrity Engineering (DDPIE) organization provides engineering support services for all programs at the Rolling Meadows campus including Circuit Card Assembly (CCA) Design Layout Technology, Configuration Management, Data Management, Drafting, Standards and Components, Product Follow, and Product Integrity Engineering. Northrop Grumman Mission Systems is
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TITLE: Physical Design Lead, Static Timing Analysis
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $192K-$279K
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckWZVSk_h_8KpIW9EhQPOBirwsSei3JZmw0CUW80Fm2_AEjsACxwdTE6EeZidZlI90JnBdCsAH7pRVwWLXQCulhW6wrBe2cnvl360E3r0voOcMRwjRbGzNYNuay-9xg%3D%3D_V2&loc=US&title=Physical+Design+Lead
EXCERPT: Physical Design Lead, Static Timing Analysis Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will drive Static Timing Analysis (STA) in the physical implementation of Application-specific integrated circuits (ASIC) using advanced technology nodes. You will lead timing margin derivation, constraint development and validation, and timing closure of large, complex high performance compute ASICs. You will develop static timing methodologies, margins, automation scripts, and write documentation. Additionally, you will work with architecture, logic design, and Design for testing (DFT) teams to fully implement cross-functional design requirements. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the
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TITLE: Standards and Components Manager 2
EMPLOYER: Northrop Grumman
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: $140K-$210K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Standards-and-Components-Manager-2_R10218222
EXCERPT: Standards and Components Manager 2 United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman offers challenging career opportunities in Hardware Engineering within the Mission Systems Sector that play a key role in the mission to protect our military personnel. The Hardware Engineering organization is dedicated to consistently providing high quality product designs in support of multiple product areas. The Design Data and Product Integrity Engineering (DDPIE) organization provides engineering support services for all programs at the Rolling Meadows campus including Circuit Card Assembly (CCA) Design Layout Technology, Configuration Management, Data Management, Drafting, Standards and Components, Product Follow, and Product Integrity Engineering. Northrop Grumman Mission Systems is
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TITLE: Digital Design Engineer
EMPLOYER: Northrop Grumman
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: $88K-$131K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Digital-Design-Engineer_R10226708
EXCERPT: Digital Design Engineer United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! Northrop Grumman Corporation is offering a challenging and rewarding career as a Digital Electrical Engineer within the Mission Systems Sector
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TITLE: System Eng, HW Validation, Customer Terminals Hardware Design
EMPLOYER: Amazon
LOCATION: Redmond, Washington, USA (unspecified)
SALARY: $117K-$160K
POSTED: 2026-04-29
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10406975/system-eng-hw-validation-customer-terminals-hardware-design
EXCERPT: System Eng, HW Validation, Customer Terminals Hardware Design Redmond, Washington, USA Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! Key job responsibilities As a System Validation Hardware Engineer, you will be part of a team of experts working on the development of advanced Customer Terminal products. You will be responsible for managing the test and validation of PCBA-level hardware across various programs, reporting validation status and failures, and driving long-term test improvement initiatives. You will own or contribute to the following: - Develop, execute, and maintain PCBA-level test and validation plans across multiple product programs - Perform board bring-up, functional testing, and debug of modules and subsystems - Report and track validation status, test results, and failure analysis across programs - Consolidate test data from multiple sources and programs, and develop clear presentations and reports to communicate validation status, trends, and risks to stakeholders - Drive root cause analysis on hardware failures and collaborate with design teams on corrective actions - Design and improve automated test systems, test fixtures, and factory test solutions - Support flow-down requirement definitions and generate test plans/procedures aligned to product specifications - Identify trends in test data and drive long-term test process and coverage improvement initiatives - Collaborate with cross-functional teams (design, manufacturing, quality) to support the transition of designs to mass production - Evaluate and validate high-speed digital and/or
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TITLE: Principal Electrical Engineer
EMPLOYER: Northrop Grumman
LOCATION: United States-Florida-Apopka (unspecified)
SALARY: $98K-$148K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: no (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Florida-Apopka/Principal-Electrical-Engineer_R10222695
EXCERPT: Principal Electrical Engineer United States-Florida-Apopka RELOCATION ASSISTANCE: No relocation assistance available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: Secret TRAVEL: No Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman has an immediate employment opportunity available for a Principal Electrical Engineer located in Apopka, FL. What You'll Get to Do: We are seeking a self-starting, motivated Principal Electrical Engineer to create new PCBA designs from concept to final certification by utilizing Allegro Design Suite from Cadence. Roles & Responsibilities: Perform schematic capture, PCB layout, component modeling, library control, signal integrity, RF modeling and PSpice simulations. Design analog and digital circuitry, EMC/EMI testing Serve as a technical liaison to PCB / PCBA vendors. Enter and maintain Electrical Engineering data into our MRP system. Basic Qualifications: Bachelor's
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TITLE: Design Technologist, Advertising UX, Design Systems
EMPLOYER: Amazon
LOCATION: Seattle, Washington, USA (unspecified)
SALARY: $132K-$178K
POSTED: 2026-04-30
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10408452/design-technologist-advertising-ux-design-systems
EXCERPT: Design Technologist, Advertising UX, Design Systems Seattle, Washington, USA At Amazon we put our customers first in everything we do - including our advertising programs. We're building solutions that enable brands to connect with their customers-globally and at scale-where they shop, read, watch videos, and share online. The Advertiser User Experience (AUX) team excels at distilling the needs of a diverse user base into experiences that balance efficiency with robust utility. We're looking for a new teammate who is enthusiastic, empathetic, curious, motivated, reliable, and able to work effectively with a diverse team of peers; someone who will help us amplify the positive & inclusive team culture we've been building. The Storm design system team within AUX defines the UX foundations, guidelines and owns the design system that enables teams across Amazon Advertising to design on-brand advertiser experiences efficiently and at scale. We're looking for a Design Technologist (DT) to define and deliver tooling solutions for our design system to support designers and developers worldwide. This individual will help build AI-based ecosystems to rapidly accelerate builders' access to high-quality prototypes, user-centered writing guidelines and research agents to pair product design with customer feedback. This person will create and maintain new web/native-based applications, create services, and launch plugins for design applications (e.g., Figma). These solutions will require connections to 1P and 3P APIs/endpoints, documentation and presentation to help streamline workflow and transitions between designer and developer teams. Key goals of this role include: 1) unlock critical UX resources, democratizing and making
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TITLE: Senior Planner
EMPLOYER: Amazon
LOCATION: North Reading, Massachusetts, USA (unspecified)
SALARY: $115K-$160K
POSTED: 2026-06-08
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10442359/senior-planner
EXCERPT: Senior Planner North Reading, Massachusetts, USA We are seeking a Senior Manufacturing Planner to own the build planning function at our Boston Development Facility, expanding to support factory operations as we scale. This is a high-mix, high-development environment where build campaigns change frequently, BOMs evolve between iterations, and the planner must integrate supply chain availability, operational capacity, and engineering demand into a cohesive, executable build plan. You will be the connective tissue between engineering, supply chain, and operations. This role requires proficiency in planning tools and methodologies, MRP/ERP fluency, advanced scheduling, capacity modeling, and data-driven decision making. You will not just execute plans, you will build the planning system, processes, and cadences from the ground up. If you thrive in ambiguity and have experience navigating NPI build schedules with compressed timelines, this is the role for you. Key job responsibilities Build Planning & Production Scheduling - Own and maintain the Master Production Schedule (MPS) for our facility, detailed production schedules that align engineering demand, material availability, and operational capacity across multiple concurrent build campaigns and product configurations. - Integrate inputs from product engineering (build requirements, BOM changes, ECOs), supply chain (material lead times, supplier commitments), and operations (workforce capacity, equipment availability) into a single source of truth for build execution. - Manage build plan volatility inherent to a development environment, rapidly re-plan when designs change, materials slip, or engineering priorities shift. Provide impact assessments and options to leadership when disruptions occur. - Develop and maintain planning cadences (weekly build reviews,
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TITLE: Staff Signal and Power Integrity Engineer
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $188K-$275K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckdSpUGaw8k7T-0rVgavH5jdNGYgqNqamoQ8QziAvCLiXEjsACxwdTFNV4mFzIv7i0truVQmI76IqLsLphuryLVMd_4TYCZFKZr7v1j8CHApskp1egCi6awWfg7jBlQ%3D%3D_V2&loc=US&title=Staff+Signal+and+Power+Integrity+Engineer
EXCERPT: Staff Signal and Power Integrity Engineer Mountain View, CA, USA Our team serves as the center of excellence for Signal and Power Integrity (SIPI) within the Pixel hardware organization. We drive technical innovation and sign-off methodologies for pixel platform design, supporting multiple concurrent product generations (Pixel 27, 28, and beyond). We own the end-to-end SIPI process, from initial architecture and stackup definition to complex PDN modeling and HSIO validation. By leveraging cutting-edge automation and academic research collaborations, we solve critical hardware challenges to ensure the performance and robustness of Google's flagship devices. As a Staff Signal and Power Integrity Engineer team, you will lead the design and validation of signal and power integrity for our flagship mobile devices. You will define technical sign-off methodologies, drive simulation automation, and collaborate with engineers to push the boundaries of hardware performance and reliability. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $188000 - $275000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead SIPI design, simulation, and validation for next-generation Pixel platforms. Develop and optimize automated simulation flows for Power Delivery Networks (PDN), power trees, and high-speed signal integrity. Perform board-level SIPI feasibility studies, including stackup definition and decoupling capacitor strategies. Execute lab measurements and correlation studies to calibrate simulation models with real-world hardware performance. Collaborate cross-functionally with Architecture, Silicon, and Product Design teams to resolve complex electrical design trade-offs. Minimum qualifications: Bachelor's degree in
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TITLE: Experience Designer Lead Senior - Design Systems
EMPLOYER: The PNC Financial Services Group, Inc.
LOCATION: PA - Pittsburgh (15222) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-02
PARENTAL_LEAVE_WEEKS: 8 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 8 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://pnc.wd5.myworkdayjobs.com/External/job/PA---Pittsburgh-15222/Experience-Designer-Lead-Senior---Design-Systems_R224062-1
EXCERPT: Experience Designer Lead Senior - Design Systems PA - Pittsburgh (15222) posted: Posted 10 Days Ago
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TITLE: Hardware Development Engineer, Ring
EMPLOYER: Amazon
LOCATION: Taipei City, TWN (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3202367/hardware-development-engineer-ring
EXCERPT: Hardware Development Engineer, Ring Taipei City, TWN Ring is looking for a Hardware Development Engineer who will be a part of our global electrical engineering team, playing a critical role in ensuring the highest product quality standards and driving continuous improvement for the products. Development of full devices requires in system level design for SoC platform, Memory, Sensors, Power Architecture, and related peripheral function while integrating with technologies like radar, cameras, WiFi, 4G LTE, etc. You must be responsive, flexible and able to succeed within a fast-paced environment. You are expected to represent as a hardware design and validation owner and dive deep into the difficult problem for the root cause analysis and arrange appropriated solution for it. Key job responsibilities * Hands on for circuit design, review, build and verification * Develop and implement detailed validation plans tailored to specific hardware designs * Collaborate with design and production teams to understand and test against product requirements * Analyze and interpret data from validation tests, offering insights and recommendations * Design document validation processes, findings, and insights in a structured and clear manner * Component specification study and component validation * Oversee and plan the use of validation equipment to guarantee consistent results * Work cross-functionally to troubleshoot and address any hardware issues identified during validation * Second source qualification, cost down design validation and manufacturing efficiencies * Support new product introduction and Sustaining engineering * Develop and contribute in testing automation A day in the life As a member
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TITLE: Systems Engineer - Design and Implementation - FLORIDA
EMPLOYER: Motorola Solutions, Inc.
LOCATION: Florida Remote Work (remote)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 13 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 13 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://motorolasolutions.wd5.myworkdayjobs.com/Careers/job/Florida-Remote-Work/Systems-Engineer---Design-and-Implementation---FLORIDA_R65580
EXCERPT: Systems Engineer - Design and Implementation - FLORIDA Florida Remote Work posted: Posted Today
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TITLE: Systems Design/Architecture Engineering
EMPLOYER: Analog Devices
LOCATION: US, MA, Wilmington (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/Systems-Design-Architecture-Engineering_R262324
EXCERPT: Systems Design/Architecture Engineering US, MA, Wilmington posted: Posted Today
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TITLE: Systems Design & Implementation Engineer (Rosario)
EMPLOYER: Motorola Solutions, Inc.
LOCATION: Argentina Offsite (ZAR99) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-03
PARENTAL_LEAVE_WEEKS: 13 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 13 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://motorolasolutions.wd5.myworkdayjobs.com/Careers/job/Argentina-Offsite-ZAR99/Systems-Design---Implementation-Engineer_R64003
EXCERPT: Systems Design & Implementation Engineer (Rosario) Argentina Offsite (ZAR99) posted: Posted 9 Days Ago
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TITLE: Sr. Hardware Development Engineer, Mechanical/Thermal/Robotics, AWS Hardware Engineering
EMPLOYER: Amazon
LOCATION: Cupertino, California, USA (unspecified)
SALARY: $257K-$257K
POSTED: 2025-10-07
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3102767/sr-hardware-development-engineer-mechanical-thermal-robotics-aws-hardware-engineering
EXCERPT: Sr. Hardware Development Engineer, Mechanical/Thermal/Robotics, AWS Hardware Engineering Cupertino, California, USA Amazon Web Services (AWS) Hardware Engineering is a leading-edge product development team that creates enterprise compute and storage server designs for our innovative web service and e-commerce technology platforms. Our designs are industry-leading in terms of performance, frugality, and operational excellence, and are critical to the success of the AWS business and the hundreds of thousands of customers who use utility computing today. We are seeking experienced Thermal/Mechanical Engineers to build the next generation of our cloud platforms. Our success depends on our truly innovative server infrastructure; we're handling massive scale and rapid integration of emergent technologies. What you will do: As a member of the Hardware Engineering Mechanical/Thermal/Robotics (MTR) Engineering team you'll be responsible for the design of our server platforms. You'll provide leadership in the application of new cooling and mechanical technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, challenging position, and you'll work with thought leaders in multiple technology areas. You'll have relentlessly high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve your products performance, quality and cost. You'll need to understand when a change in technology enables a completely different way of approaching server design. We're changing an industry, and we want team members who are ready for this challenge and want to reach beyond what is possible today. Why it matters: AWS Global
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TITLE: Sr. Marketing Ops Manager, CMHK Marketing Strategy and Ops
EMPLOYER: Amazon
LOCATION: Beijing, CHN (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-21
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10426764/sr-marketing-ops-manager-cmhk-marketing-strategy-and-ops
EXCERPT: Sr. Marketing Ops Manager, CMHK Marketing Strategy and Ops Beijing, CHN As Sr. Marketing Ops Manager on the CMHK Marketing Strategy & Ops team, you will design the management systems, planning governance, and data-driven frameworks that power AWS's CMHK marketing engine across China and Hong Kong. Build the operational backbone for CMHK marketing organization: from market/competitive intelligence to planning SOPs to execution monitoring Translate market insights into planning inputs, establish tiered review governance, and diagnose business problems with data before they escalate Work at the intersection of strategy and execution - you won't just build dashboards, you'll drive the decisions they inform Leverage systems thinking to optimize cross-team collaboration Key job responsibilities - Own the end-to-end marketing operations strategy for CMHK marketing organization: from insight gathering, to planning governance design, to execution monitoring and continuous improvement - Translate market insights into actionable inputs that guide marketing planning priorities and resource allocation decisions - Design and implement a tiered marketing planning review SOP - define review criteria, approval gates by planning level to ensure quality and consistency - Architect the organization's management infrastructure: operational cadence (XXR), tracking systems, centralized dashboards, and governance models for planning & execution - Drive cross-team workflow optimization across marketing sub-teams - map workflows, identify friction points, and implement standardized collaboration frameworks - Leverage data analytics to diagnose business performance issues, identify root causes, lead cross-functional teams to develop solutions, and monitor execution against defined success metrics - Establish early warning mechanisms and continuous improvement loops -
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TITLE: Principal/Sr. Principal Digital Design Engineer
EMPLOYER: Northrop Grumman
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: $109K-$163K
POSTED: 2026-05-24
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
RELOCATION_ASSISTANCE: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Principal-Sr-Principal-Digital-Design-Engineer_R10229855
EXCERPT: Principal/Sr. Principal Digital Design Engineer United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: Yes CLEARANCE TYPE: SAP TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! The Multidomain Sensing, Targeting, and Survivability Division (MSTS), located in the Northwest Chicago suburbs, develops operational Electronic Warfare
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TITLE: RTL Design and Integration Engineer
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $116K-$166K
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckR4BUKQ53z5jfRBgUqfjLXTgKNoxP5AC_sxqJ9Xg5mIeEjsACxwdTAxmgCiiIE8mdrkpFNTul_qHOIjieOf6Rkms9RO_EmQdcXX9AAG_o3AIt4_JqOMn78cIlYYD1w%3D%3D_V2&loc=US&title=RTL+Design+and+Integration+Engineer
EXCERPT: RTL Design and Integration Engineer Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. Join the team designing and developing the On-Chip Network of Google's next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in datacenters. You will be responsible for the microarchitecture, design, implementation, and integration of key digital logic blocks within the TPU. This role requires close collaboration with cross-functional teams, including Verification, Physical Design, Validation, and Firmware, to deliver cutting-edge hardware. You will own critical design deliverables, help with integration efforts, and contribute to the continuous improvement of our design methodologies and flows. As an RTL Design Engineer on the TPU team, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design, computer architecture, and RTL coding to create innovative and efficient hardware solutions. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and
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