I'm looking for a job. I exported this list from FewerJobs.com - a curated job board.

Please:
1. Rank these jobs by fit for me, given my resume / skills.
2. Highlight the top 5 with a one-sentence rationale each.
3. Flag any concerns, including benefit values without source-backed evidence.
4. Suggest one or two filter changes I could make on FewerJobs to find more good matches.

Filters I applied:
- q: Lattice Semiconductor
- quality_floor: default
- match_401k_strict: true
- parental_strict: true
- non_birth_strict: true
- pto_strict: true
- include_older: false
- apply_url_verified: false
- page: 3
- per_page: 100
- sort: relevance

Jobs (100 total):

---
TITLE: Solutions Architect - Semiconductor Simulation
EMPLOYER: NVIDIA Corporation
LOCATION: Korea, Seoul (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-24
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Korea-Seoul/Solutions-Architect---Semiconductor-Simulation_JR2010144
EXCERPT: Solutions Architect - Semiconductor Simulation Korea, Seoul posted: Posted 19 Days Ago
---
TITLE: Senior SoC Integration Engineer
EMPLOYER: Micron Technology, Inc.
LOCATION: Taipei - MTT office, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Taipei---MTT-office-Taiwan/Senior-SoC-Integration-Engineer_JR89682-1
EXCERPT: Senior SoC Integration Engineer Taipei - MTT office, Taiwan posted: Posted 30+ Days Ago
---
TITLE: Production Site Supervisor - Semiconductor Manufacturing
EMPLOYER: Semtech Corp
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://semtech.wd1.myworkdayjobs.com/SemtechCareers/job/USA---Colorado-Springs---Elkton/Production-Site-Supervisor_REQ3404
EXCERPT: Production Site Supervisor - Semiconductor Manufacturing 2 Locations posted: Posted Yesterday
---
TITLE: Photonic Material Engineer
EMPLOYER: Coherent Corp.
LOCATION: Budd Lake, NJ, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-06
K401_MATCH: yes (not source-backed)
APPLY_URL: https://hcwp.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/requisitions/job/2010741
EXCERPT: Photonic Material Engineer Budd Lake, NJ, United States Job Summary:
---
TITLE: Semiconductor Process Engineer
EMPLOYER: Teledyne Technologies
LOCATION: US - Camarillo, CA (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
K401_MATCH: yes (not source-backed)
APPLY_URL: https://flir.wd1.myworkdayjobs.com/flircareers/job/US---Camarillo-CA/Semiconductor-Process-Engineer_REQ34736
EXCERPT: Semiconductor Process Engineer US - Camarillo, CA posted: Posted 17 Days Ago
---
TITLE: Senior Engineer - SoC Design Verification
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer---SoC-Design-Verification_R-10062405
EXCERPT: Senior Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago
---
TITLE: Sr Synthesis and Implementation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Sr-Synthesis-and-Implementation-Engineer_R-10063207
EXCERPT: Sr Synthesis and Implementation Engineer 3 Locations posted: Posted 28 Days Ago
---
TITLE: Qubit Control IC Designer
EMPLOYER: Intel
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-03
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Qubit-Control-IC-Designer_JR0281067
EXCERPT: Qubit Control IC Designer 2 Locations posted: Posted 9 Days Ago
---
TITLE: Import/Export Specialist (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Import-Export-Specialist--m-f-d----for-semiconductor-industry_R2617998
EXCERPT: Import/Export Specialist (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Semiconductor Web & Technical Documentation Writer (Location：Tokyo)
EMPLOYER: Infineon Technologies
LOCATION: Tokyo (Japan) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://infineon.eightfold.ai/careers/job/563808970288562
EXCERPT: Semiconductor Web & Technical Documentation Writer (Location：Tokyo) Tokyo (Japan)
---
TITLE: NAND Cell Device Senior/Principle Engineer
EMPLOYER: Micron Technology, Inc.
LOCATION: Fab 10N/X, Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Fab-10NX-Singapore/NAND-Cell-Device-Senior-Principle-Engineer_JR98458-1
EXCERPT: NAND Cell Device Senior/Principle Engineer Fab 10N/X, Singapore posted: Posted 30+ Days Ago
---
TITLE: Materials Engineer, Quantum AI
EMPLOYER: Google
LOCATION: Santa Barbara, CA, USA (unspecified)
SALARY: $159K-$231K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckQ-6Dz5ASwMiu580clhgcr2Kd3icn4ZjWb7Pc0oqUdunEjsACxwdTDYTe56JpJRDwKrlWQU39LMjJ27KvhT4r_QUwf2roAtBqWsHcwMPY0hpfOpx6rsfrukpWnWp4g%3D%3D_V2&loc=US&title=Materials+Engineer
EXCERPT: Materials Engineer, Quantum AI Santa Barbara, CA, USA In this role, you will accelerate our investigations into new materials, associated fabrication processes, and testing procedures. You will be responsible for developing and troubleshooting new and existing processes for the fabrication of wiring, interconnects, and packaging components that are critical for building our next generation of quantum computers. You will collaborate with other researchers and engineers on the Quantum Artificial Intelligence team to develop new materials, use and expand our current capabilities, and identify processes and equipment to take us in new directions of higher performance materials for more densely-integrated superconducting quantum computing systems. You will work directly with research scientists and other hardware engineers to develop materials to enhance our superconducting hardware stack including packaging, input/output, and associated filtering. You will drive hardware implementation and testing efforts to validate these materials in the lab by building and analyzing materials using performance focused experiments.The full potential of quantum computing will be unlocked with a large-scale computer capable of complex, error-corrected computations. Google Quantum AI's mission is to build this computer and unlock solutions to classically intractable problems. Our roadmap is focused on advancing the capabilities of quantum computing and enabling meaningful applications. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Research and develop new materials for use in wiring, interconnects and packaging
---
TITLE: New Product Program Manager- Semiconductor Materials
EMPLOYER: Entegris
LOCATION: Aurora, IL (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://entegris.wd1.myworkdayjobs.com/EntegrisCareers/job/Aurora-IL/New-Product-Program-Manager--Semiconductor-Materials_REQ-12359
EXCERPT: New Product Program Manager- Semiconductor Materials Aurora, IL posted: Posted Yesterday
---
TITLE: Distribution Sales - IoT
EMPLOYER: NXP Semiconductors
LOCATION: Seoul (Jung-gu) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Seoul-Jung-gu/Distribution-Sales---IoT_R-10061507
EXCERPT: Distribution Sales - IoT Seoul (Jung-gu) posted: Posted 3 Days Ago
---
TITLE: Senior Physicist (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Senior-Physicist--m-f-d----for-semiconductor-industry_R2612258
EXCERPT: Senior Physicist (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Director/Chip Architect
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Director-Chip-Architect_R-10062315
EXCERPT: Director/Chip Architect Pune posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Foundry Demand Business Strategist
EMPLOYER: Intel
LOCATION: Taiwan, Taipei (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Taiwan-Taipei/Semiconductor-Foundry-Demand-Business-Strategist_JR0280880
EXCERPT: Semiconductor Foundry Demand Business Strategist Taiwan, Taipei posted: Posted 30+ Days Ago
---
TITLE: Principal Systems/Mechanical Design Engineer, Semiconductor
EMPLOYER: Jabil
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Remote---USA/Principal-Systems-Mechanical-Design-Engineer_J2444904
EXCERPT: Principal Systems/Mechanical Design Engineer, Semiconductor 2 Locations posted: Posted 4 Days Ago
---
TITLE: Senior Engineer - SoC Design Engineering
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer---SoC-Design-Engineering_R-10062288
EXCERPT: Senior Engineer - SoC Design Engineering Pune posted: Posted 30+ Days Ago
---
TITLE: Sales Representative for Semiconductor Business
EMPLOYER: 3M
LOCATION: JP, OSAKA, VIRTUAL (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://3m.wd1.myworkdayjobs.com/Search/job/JP-OSAKA-VIRTUAL/Sales-Representative-for-Semiconductor-Business_R01164211
EXCERPT: Sales Representative for Semiconductor Business JP, OSAKA, VIRTUAL posted: Posted 30+ Days Ago
---
TITLE: IC SoC Product & Subsystem Architect (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Hamburg (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hamburg/IC-SoC-Product---Subsystem-Architect_R-10063107
EXCERPT: IC SoC Product & Subsystem Architect (f/m/d) Hamburg posted: Posted 30+ Days Ago
---
TITLE: Staff Engineer, Semiconductor FAE for Analog (Location：Tokyo)
EMPLOYER: Infineon Technologies
LOCATION: Tokyo (Japan) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://infineon.eightfold.ai/careers/job/563808970234993
EXCERPT: Staff Engineer, Semiconductor FAE for Analog (Location：Tokyo) Tokyo (Japan)
---
TITLE: Senior Pre-Silicon Verification Engineer
EMPLOYER: Intel
LOCATION: Canada, Toronto (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Canada-Toronto/Senior-Pre-Silicon-Verification-Engineer_JR0279327-1
EXCERPT: Senior Pre-Silicon Verification Engineer Canada, Toronto posted: Posted 30+ Days Ago
---
TITLE: Customer Service Representative (Semiconductor)
EMPLOYER: Qnity Electronics
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-21
APPLY_URL: https://qnity.wd503.myworkdayjobs.com/Jobs/job/Marlborough-Massachusetts/Customer-Service-Representative--Semiconductor-_251291W
EXCERPT: Customer Service Representative (Semiconductor) 2 Locations posted: Posted 22 Days Ago
---
TITLE: Staff or Senior Staff Recruiter (Experienced in Semiconductor Industry)
EMPLOYER: Renesas Electronics
LOCATION: Shanghai, , China (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/RenesasElectronics/744000120307917-staff-or-senior-staff-recruiter-experienced-in-semiconductor-industry-
EXCERPT: Staff or Senior Staff Recruiter (Experienced in Semiconductor Industry) Shanghai, , China Company Description: Job Description: We are seeking a Senior Recruiter with strong semiconductor industry expertise, particularly within Integrated Device Manufacturer (IDM) environments. The role leads the full end-to-end recruitment lifecycle while ensuring an exceptional experience for candidates and hiring managers, supported by high standards of data accuracy and process excellence. The ideal candidate is a hands-on technical recruiter with deep experience managing complex semiconductor requisitions and operating effectively in a fast-paced, global environment. Key Responsibilities End-to-End Technical Recruitment Lead the full recruitment cycle from requisition intake to offer acceptance. Develop tailored sourcing strategies for hard-to-fill semiconductor roles across design, manufacturing, test, packaging, and operations. Sourcing & Screening Leverage multiple sourcing channels, semiconductor talent communities, niche platforms, referrals, and proactive market mapping. Build longlists and shortlists of qualified semiconductor professionals by applying role-specific technical filters across semiconductor HW & SW R&D IC design, fabrication, equipment engineering, process engineering, test development, and related fields. Candidate & Stakeholder Management Provide high-quality CV presentations and candidate summaries to hiring managers. Advise hiring teams on market conditions, candidate availability, competitive intelligence, and recruitment timelines. Ensure consistent communication and outstanding experiences for candidates throughout the process. Operation & System Excellence Manage all recruitment status updates in ATS, ensuring transparency and accuracy. Partner closely with cross-functional teams including HRBPs, HR Operations, and Business Leaders for compliance and smooth Process flows. Industry Expertise Demonstrate strong familiarity with semiconductor roles across the IDM value chain, including: Advanced
---
TITLE: technician Area 1
EMPLOYER: NXP Semiconductors
LOCATION: Nijmegen (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-06
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Nijmegen/technician-Area-1_R-10063236-1
EXCERPT: technician Area 1 Nijmegen posted: Posted 6 Days Ago
---
TITLE: Engineering Manager, Platform
EMPLOYER: Lattice
LOCATION: Remote - US (remote)
SALARY: $188K-$234K
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://lattice.com/job?gh_jid=8581368002
EXCERPT: Engineering Manager, Platform Remote - US Lattice's Engineering team continuously works to improve our product, our systems, and our craft. We embrace modern technologies, invest in engineering excellence, and prioritize building maintainable, reliable, and scalable solutions. We work closely across engineering, product, and design to deliver exceptional experiences for our customers while fostering a culture of ownership, collaboration, and continuous learning. About the Role We're looking for an Engineering Manager to lead a team within our Platform Engineering organization. Our mission is to empower engineers who take ownership, seek accountability, and care deeply about delivering reliable and performant experiences to end users. We do this by providing a cohesive platform of intuitive tools, proven patterns, and seamless infrastructure that make the responsible path the easiest one. As an Engineering Manager, you'll lead a team responsible for building and evolving foundational capabilities that enable engineers across Lattice to deliver high-quality products efficiently, reliably, and at scale. You'll partner closely with engineers, product leaders, and stakeholders throughout the organization to improve engineering effectiveness, strengthen operational excellence, and support long-term platform investments. This is an opportunity to have broad impact across the engineering organization while helping build a culture that values ownership, accountability, and customer-centric thinking. What You Will Do Lead, coach, and develop a team of software engineers, supporting their growth and helping them do the best work of their careers. Foster a healthy, inclusive, and high-performing engineering culture aligned with Lattice's values. Partner with engineering and cross-functional stakeholders to identify and
---
TITLE: Electrical Engineer, Senior
EMPLOYER: Zebra Technologies
LOCATION: Taipei, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
K401_MATCH: yes (not source-backed)
APPLY_URL: https://zebra.wd501.myworkdayjobs.com/Zebra_careers/job/Taipei-Taiwan/Electrical-Engineer--Senior_110977
EXCERPT: Electrical Engineer, Senior Taipei, Taiwan posted: Posted 17 Days Ago
---
TITLE: Senior Mask Layout Engineer
EMPLOYER: Ionq Inc
LOCATION: Bothell, Washington, United States; Boulder, Colorado, United States; College Park, Maryland, United States (unspecified)
SALARY: $127K-$166K
POSTED: 2026-01-27
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/ionq/jobs/5783050004
EXCERPT: Senior Mask Layout Engineer Bothell, Washington, United States; Boulder, Colorado, United States; College Park, Maryland, United States About IonQ: IonQ, Inc . [NYSE: IONQ] is the world's leading quantum platform and merchant supplier - delivering integrated quantum solutions across computing, networking, sensing, and security. IonQ's newest generation of quantum computers, the IonQ Tempo, is the latest in a line of cutting-edge systems that have been helping customers and partners including Amazon Web Services, and AstraZeneca achieve 20x performance results and accelerate innovation in drug discovery, materials science, financial modeling, logistics, cybersecurity, and defense. In 2025, the company achieved 99.99% two-qubit gate fidelity, setting a world record in quantum computing performance . Headquartered in College Park, Maryland, IonQ has operations in California, Colorado, Massachusetts, Tennessee, Washington, Italy, South Korea, Sweden, Switzerland, Canada, and the United Kingdom. Our quantum computing services are available through all major cloud providers, while we also meet the needs of networking and sensing customers across land, sea, air, and space. IonQ is making quantum platforms more accessible and impactful than ever before. We are looking for a Senior Mask Layout Engineer on the Fab Tapeout and Validation Team. As a Senior Mask Layout Engineer, you'll be part of a cross-functional team whose mission is to lead IonQ on its journey to build the world's best quantum computers to solve the world's most complex problems. In this role, you will be the owner of full-reticle tapeouts for use in trapped-ion quantum computers, which could include both photonic and
---
TITLE: Developer Experience Engineer
EMPLOYER: Anduril
LOCATION: Seattle, Washington, United States (unspecified)
SALARY: $129K-$171K
POSTED: 2026-06-03
APPLY_URL: https://boards.greenhouse.io/andurilindustries/jobs/5153901007?gh_jid=5153901007
EXCERPT: Developer Experience Engineer Seattle, Washington, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE TEAM The Lattice SDK team is at the forefront of building Anduril's developer ecosystem. Since our public launch, we've attracted numerous potential partners ranging from innovative startups to defense giants and military organizations worldwide. Our team serves as the critical bridge between Anduril's cutting-edge defense technology and the broader developer community. We're creating a thriving ecosystem where partners can seamlessly integrate their applications, hardware, and data services with Lattice, demonstrating the platform's exceptional interoperability while expanding its capabilities. By fostering these partnerships, we're not just building software-we're revolutionizing how defense technology collaborates across platforms to deliver real impact in the field. ABOUT THE JOB We are looking for a Developer Experience Engineer to join our rapidly growing team in Seattle, WA or Costa Mesa, CA. In this role, you will serve as the
---
TITLE: Application Engineer for Power Conversion
EMPLOYER: ON Semiconductor
LOCATION: Bucheon-si, Gyeonggi-do, Korea, Republic of (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2504913
EXCERPT: Application Engineer for Power Conversion Bucheon-si, Gyeonggi-do, Korea, Republic of Application Engineer for Power Conversion
---
TITLE: Equipment Engineer (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Equipment-Engineer--m-f-d----for-semiconductor-industry_R2517891
EXCERPT: Equipment Engineer (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: SCE Product Engineer (Staff / Senior)
EMPLOYER: NXP Semiconductors
LOCATION: Kuala Lumpur (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kuala-Lumpur/SCE-Product-Engineer--Staff---Senior-_R-10061257-1
EXCERPT: SCE Product Engineer (Staff / Senior) Kuala Lumpur posted: Posted 30+ Days Ago
---
TITLE: Application Engineer (m/f/d) - semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Feldkirchen,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/FeldkirchenDEU/Application-Engineer--m-f-d----semiconductor-industry_R2620334
EXCERPT: Application Engineer (m/f/d) - semiconductor industry Feldkirchen,DEU posted: Posted 12 Days Ago
---
TITLE: Senior PCB Layout Designer, Intelligence Systems
EMPLOYER: Anduril
LOCATION: Reston, Virginia, United States (unspecified)
SALARY: $146K-$194K
POSTED: 2026-02-10
APPLY_URL: https://boards.greenhouse.io/andurilindustries/jobs/5042141007?gh_jid=5042141007
EXCERPT: Senior PCB Layout Designer, Intelligence Systems Reston, Virginia, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE TEAM Anduril Intelligence Systems (AIS) is focused on positioning Anduril as a lead provider of specialized engineering and products for Intelligence Community (IC) customers. We work within the IC to understand their requirements, shape their concepts of operation, and deliver exquisite capability across their problem set. We aim to develop and deploy critically needed capabilities that address our customers' most pressing national security requirements. ABOUT THE JOB We are looking for a Senior PCB Layout Designer to join our rapidly growing team in Reston, Virginia. In this role, you will be responsible for Full Cycle PCB design including collecting requirements, schematic design, component selection, supervision or completion of layout, bring-up, test, debug and integration with the system. WHAT YOU'LL DO - Work directly with engineers to produce printed circuit board
---
TITLE: Research Scientist, Materials Synthesis
EMPLOYER: Periodic Labs
LOCATION: Menlo Park, California, United States (unspecified)
SALARY: $160K-$220K
POSTED: 2026-03-30
APPLY_URL: https://jobs.ashbyhq.com/periodic-labs/dfd4f94a-7b94-4877-96d2-9a91c0f0780a
EXCERPT: Research Scientist, Materials Synthesis Menlo Park, California, United States About Periodic Labs The most important scientific discoveries of our time won't happen in a traditional lab. We're an AI and physical sciences company building state-of-the-art models to accelerate breakthroughs across materials, energy, and beyond. Backed by world-class investors and growing rapidly, we operate at the pace the frontier requires. Our team brings deep expertise, genuine ownership, and an insatiable drive to push the boundaries of what's scientifically possible. About the Role Join a world-class team of scientists and engineers pushing the boundaries of materials research in a groundbreaking lab where AI and automation unlock discoveries at unprecedented speed and scale. As a Research Scientist within the Periodic Labs experimental effort, you bring computational predictions into reality through solid state materials chemistry. In this role, you will both develop new materials synthesis approaches and be part of the team developing autonomous discovery loops. What You'll Do - Develop strategies to synthesize novel solid state materials - Reveal and control the atomic structure of these materials through advanced characterization - Collaborate with the AI team in the development of predictive tools and analysis techniques grounded in chemistry and materials science - Collaborate with the engineering team to design and test new automated laboratory hardware for synthesis and characterization You Will Thrive in This Role If You Have - PhD in chemistry, physics, or materials science, with 5+ years of hands-on experience - Proficiency with a diverse range of synthesis methods within solid
---
TITLE: Staff Analog Layout Engineer
EMPLOYER: Infineon Technologies
LOCATION: Penang (Malaysia) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://infineon.eightfold.ai/careers/job/563808970710850
EXCERPT: Staff Analog Layout Engineer Penang (Malaysia)
---
TITLE: Industrial Engineer (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Industrial-Engineer--m-f-d----for-semiconductor-industry_R2517890
EXCERPT: Industrial Engineer (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 30+ Days Ago
---
TITLE: Senior Staff Engineer Analog Layout
EMPLOYER: Infineon Technologies
LOCATION: Penang (Malaysia) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://infineon.eightfold.ai/careers/job/563808969876556
EXCERPT: Senior Staff Engineer Analog Layout Penang (Malaysia)
---
TITLE: Electrical Engineer (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Feldkirchen,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/FeldkirchenDEU/Electrical-Engineer--m-f-d----for-semiconductor-industry_R2616658
EXCERPT: Electrical Engineer (m/f/d) - for semiconductor industry Feldkirchen,DEU posted: Posted 12 Days Ago
---
TITLE: Semiconductor Safety Engineer
EMPLOYER: NVIDIA Corporation
LOCATION: US, CA, Santa Clara (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Semiconductor-Safety-Engineer_JR2014716
EXCERPT: Semiconductor Safety Engineer US, CA, Santa Clara posted: Posted 30+ Days Ago
---
TITLE: Customer Application Engineer
EMPLOYER: ON Semiconductor
LOCATION: Taipei City, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-02
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505576
EXCERPT: Customer Application Engineer Taipei City, Taiwan Customer Application Engineer
---
TITLE: Module Engineer
EMPLOYER: Intel
LOCATION: Malaysia, Penang (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Malaysia-Penang/Module-Engineer_JR0283930
EXCERPT: Module Engineer Malaysia, Penang posted: Posted 28 Days Ago
---
TITLE: Director of Engineering – ASIC Design
EMPLOYER: NXP Semiconductors
LOCATION: Hyderabad (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Director-of-Engineering---ASIC---SoC-Architecture---Design_R-10061209
EXCERPT: Director of Engineering – ASIC Design Hyderabad posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Process Engineer
EMPLOYER: Micron Technology, Inc.
LOCATION: Boise, ID - Main Site (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-27
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Semiconductor-Process-Engineer_JR102748
EXCERPT: Semiconductor Process Engineer Boise, ID - Main Site posted: Posted 16 Days Ago
---
TITLE: Industrial Engineer
EMPLOYER: ON Semiconductor
LOCATION: Hopewell Junction, NY, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505688
EXCERPT: Industrial Engineer Hopewell Junction, NY, United States Industrial Engineer
---
TITLE: Senior SoC Chiplet Architect
EMPLOYER: Intel
LOCATION: 6 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/Senior-SoC-Chiplet-Architect_JR0284564
EXCERPT: Senior SoC Chiplet Architect 6 Locations posted: Posted 2 Days Ago
---
TITLE: Mechanical Design Engineer – Semiconductor Packaging
EMPLOYER: Intel
LOCATION: US, Arizona, Phoenix (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-27
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-Arizona-Phoenix/Mechanical-Design-Engineer---Semiconductor-Packaging_JR0284244
EXCERPT: Mechanical Design Engineer – Semiconductor Packaging US, Arizona, Phoenix posted: Posted 16 Days Ago
---
TITLE: Analog IC Design Engineer, High-Speed
EMPLOYER: Lightmatter
LOCATION: Toronto, ON (unspecified)
SALARY: CAD 135K-180K
POSTED: 2025-03-24
K401_MATCH: yes (not source-backed)
APPLY_URL: https://boards.greenhouse.io/lightmatter/jobs/4418733008?gh_jid=4418733008
EXCERPT: Analog IC Design Engineer, High-Speed Toronto, ON Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world's first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! About this Role Join a cutting-edge team at the forefront of silicon photonics and high-speed transceiver design! As a member of the analog team, you'll collaborate with our architects and engineers to develop innovative high speed analog transceiver solutions for next-generation optical and wireline communication systems. * We are currently hiring for multiple levels for this role. Your level and compensation will be determined by your experience, education, and location. Responsibilities - Support micro-architecture development with chip architects by conducting feasibility studies - Collaborate with members of our design engineering teams (system, digital, analog, photonics) to define electrical requirements - Design analog/mixed-signal blocks with a focus on transceivers and broadband circuits interfacing with silicon photonics elements - Document design simulations and
---
TITLE: Senior Semiconductor Design Engineer
EMPLOYER: Micron Technology, Inc.
LOCATION: San Jose, CA (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/San-Jose-CA/Senior-Semiconductor-Design-Engineer_JR99394
EXCERPT: Senior Semiconductor Design Engineer San Jose, CA posted: Posted 30+ Days Ago
---
TITLE: Application Engineer B-Line
EMPLOYER: Eaton Corporation
LOCATION: Seoul, KOR, 100-744 (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://eaton.eightfold.ai/careers/job/687236718199
EXCERPT: Application Engineer B-Line Seoul, KOR, 100-744
---
TITLE: Senior Semiconductor Key Account Manager
EMPLOYER: Illinois Tool Works
LOCATION: Fremont - 94539 (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://itw.wd5.myworkdayjobs.com/External/job/Fremont---94539/Senior-Semiconductor-Key-Account-Manager_JR6599
EXCERPT: Senior Semiconductor Key Account Manager Fremont - 94539 posted: Posted 30+ Days Ago
---
TITLE: Process Integration Device Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Shanghai (JingAn) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Shanghai-JingAn/Process-Integration-Device-Engineer_R-10063267
EXCERPT: Process Integration Device Engineer Shanghai (JingAn) posted: Posted 24 Days Ago
---
TITLE: Semiconductor Process Engineer
EMPLOYER: Micron Technology, Inc.
LOCATION: Boise, ID - Main Site (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Semiconductor-Process-Engineer_JR99269
EXCERPT: Semiconductor Process Engineer Boise, ID - Main Site posted: Posted 30+ Days Ago
---
TITLE: Senior Hardware Engineer
EMPLOYER: Magna International Inc.
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://magna.wd3.myworkdayjobs.com/Magna/job/Timisoara-RO/Senior-Hardware-Engineer_R00239579
EXCERPT: Senior Hardware Engineer 2 Locations posted: Posted Today
---
TITLE: Technical Support Engineer - Semiconductor Metrology
EMPLOYER: KLA Corporation
LOCATION: Boise, ID (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
K401_MATCH: yes (not source-backed)
APPLY_URL: https://kla.wd1.myworkdayjobs.com/Search/job/Boise-ID/Technical-Support-Engineer---Semiconductor-Metrology_2636407
EXCERPT: Technical Support Engineer - Semiconductor Metrology Boise, ID posted: Posted 7 Days Ago
---
TITLE: Semiconductor Foundry Demand Senior Business Strategist
EMPLOYER: Intel
LOCATION: Taiwan, Taipei (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Taiwan-Taipei/Semiconductor-Foundry-Demand-Senior-Business-Strategist_JR0280879
EXCERPT: Semiconductor Foundry Demand Senior Business Strategist Taiwan, Taipei posted: Posted 30+ Days Ago
---
TITLE: Senior Principal Engineer - SoC Design Verification
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principle-Engineer---SoC-Design-Verification_R-10062973
EXCERPT: Senior Principal Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago
---
TITLE: Senior DfT Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Caen (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Caen/Senior-DfT-Engineer_R-10062175
EXCERPT: Senior DfT Engineer Caen posted: Posted 30+ Days Ago
---
TITLE: Technician Area 2
EMPLOYER: NXP Semiconductors
LOCATION: Nijmegen (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-06
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Nijmegen/Technician-Area-2_R-10063172-1
EXCERPT: Technician Area 2 Nijmegen posted: Posted 6 Days Ago
---
TITLE: Regional Sector Head- Semiconductor and Cloud, Asia Pacific | Industrial Projects
EMPLOYER: Deutsche Post
LOCATION: Singapore, Central, Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-22
K401_MATCH: yes (not source-backed)
APPLY_URL: https://dpdhlgroup.avature.net/jobs/ApplicationMethods?jobId=354796&source=careers.dhl.com
EXCERPT: Regional Sector Head- Semiconductor and Cloud, Asia Pacific | Industrial Projects Singapore, Central, Singapore Role Title: Regional Sector Head- Semiconductor and Cloud, Asia Pacific | Industrial Projects . Location: Asia-Pacific . DHL Industrial Projects: DHL Industrial Projects (IP) is part of DHL Global ...
---
TITLE: Industrial Trainee - Silicon-on-Insulator
EMPLOYER: Infineon Technologies
LOCATION: Kulim (Malaysia) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://infineon.eightfold.ai/careers/job/563808970765556
EXCERPT: Industrial Trainee - Silicon-on-Insulator Kulim (Malaysia)
---
TITLE: Field Application Engineer - Semiconductor
EMPLOYER: Semtech Corp
LOCATION: USA - San Jose, CA (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
K401_MATCH: yes (not source-backed)
APPLY_URL: https://semtech.wd1.myworkdayjobs.com/SemtechCareers/job/USA---San-Jose-CA/Field-Application-Engineer_REQ3375-1
EXCERPT: Field Application Engineer - Semiconductor USA - San Jose, CA posted: Posted 3 Days Ago
---
TITLE: Lithography Equipment Engineer
EMPLOYER: STMicroelectronics
LOCATION: Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://stmicroelectronics.eightfold.ai/careers/job/563637171855312
EXCERPT: Lithography Equipment Engineer Singapore
---
TITLE: Contamination Control Engineer (m/w/d) for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Process-Engineer---cleaning-processes--m-w-d--for-semiconductor-industry_R2519166
EXCERPT: Contamination Control Engineer (m/w/d) for semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Senior Technical Marketing Engineer - EDA and Semiconductor
EMPLOYER: NVIDIA Corporation
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Technical-Marketing-Engineer---EDA-and-Semiconductor_JR2016782-1
EXCERPT: Senior Technical Marketing Engineer - EDA and Semiconductor 2 Locations posted: Posted 24 Days Ago
---
TITLE: Buyer
EMPLOYER: ON Semiconductor
LOCATION: Shanghai, Shanghai, China (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-28
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505601
EXCERPT: Buyer Shanghai, Shanghai, China Buyer
---
TITLE: Senior Technical Recruiter - Semiconductor Manufacturing
EMPLOYER: Semtech Corp
LOCATION: USA - Alhambra, CA (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://semtech.wd1.myworkdayjobs.com/SemtechCareers/job/USA---Alhambra-CA/Senior-Technical-Recruiter---Semiconductor-Manufacturing_REQ3402
EXCERPT: Senior Technical Recruiter - Semiconductor Manufacturing USA - Alhambra, CA posted: Posted 2 Days Ago
---
TITLE: Quantum Assembly Engineer
EMPLOYER: GlobalFoundries
LOCATION: Essex Junction (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalfoundries.wd1.myworkdayjobs.com/External/job/Essex-Junction/Quantum-Assembly-Engineer_JR-2602345
EXCERPT: Quantum Assembly Engineer Essex Junction posted: Posted 24 Days Ago
---
TITLE: Technical Project Manager (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Feldkirchen,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/FeldkirchenDEU/Technical-Project-Manager--m-f-d----for-semiconductor-industry_R2614311
EXCERPT: Technical Project Manager (m/f/d) - for semiconductor industry Feldkirchen,DEU posted: Posted 12 Days Ago
---
TITLE: 2026 Campus - System Application Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Tianjin (Weiwu) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Tianjin-Weiwu/XMLNAME-2026-Campus---System-Application-Engineer_R-10061125
EXCERPT: 2026 Campus - System Application Engineer Tianjin (Weiwu) posted: Posted 30+ Days Ago
---
TITLE: Supplier Account Manager Semiconductor Parts Cleaning
EMPLOYER: Applied Materials
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-03
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/Santa-ClaraCA/Supplier-Account-Manager-Cleaning_R2620508
EXCERPT: Supplier Account Manager Semiconductor Parts Cleaning 2 Locations posted: Posted 9 Days Ago
---
TITLE: Intel Foundry Lithography Module Engineer
EMPLOYER: Intel
LOCATION: US, Oregon, Hillsboro (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Intel-Foundry-Lithography-Module-Engineer_JR0284287
EXCERPT: Intel Foundry Lithography Module Engineer US, Oregon, Hillsboro posted: Posted 17 Days Ago
---
TITLE: Senior PCB Designer
EMPLOYER: Ionq Inc
LOCATION: Pleasanton, California, United States (unspecified)
SALARY: $142K-$186K
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/ionq/jobs/6009600004
EXCERPT: Senior PCB Designer Pleasanton, California, United States About IonQ: IonQ, Inc . [NYSE: IONQ] is the world's leading quantum platform and merchant supplier - delivering integrated quantum solutions across computing, networking, sensing, and security. IonQ's newest generation of quantum computers, the IonQ Tempo, is the latest in a line of cutting-edge systems that have been helping customers and partners including Amazon Web Services, and AstraZeneca achieve 20x performance results and accelerate innovation in drug discovery, materials science, financial modeling, logistics, cybersecurity, and defense. In 2025, the company achieved 99.99% two-qubit gate fidelity, setting a world record in quantum computing performance . Headquartered in College Park, Maryland, IonQ has operations in California, Colorado, Massachusetts, Tennessee, Washington, Italy, South Korea, Sweden, Switzerland, Canada, and the United Kingdom. Our quantum computing services are available through all major cloud providers, while we also meet the needs of networking and sensing customers across land, sea, air, and space. IonQ is making quantum platforms more accessible and impactful than ever before. About Vector Atomic Vector Atomic, an IonQ company, is building quantum technology to transform navigation, timing, geophysical exploration, and telecommunications. Our team of engineers, scientists, software developers, and operations professionals works together to solve complex challenges and turn bold ideas into real-world solutions. We value collaboration, curiosity, and diverse perspectives, and we give every team member the opportunity to make an immediate impact while growing their skills. If you're excited to work on breakthrough technology in a fast-paced, hands-on environment, we'd love to hear from
---
TITLE: Semiconductor FAB Equipment Engineer - Qnity Electronics
EMPLOYER: Qnity Electronics
LOCATION: Marlborough, Massachusetts (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-13
APPLY_URL: https://qnity.wd503.myworkdayjobs.com/Jobs/job/Marlborough-Massachusetts/Semiconductor-FAB-Equipment-Engineer---Qnity-Electronics_251075W
EXCERPT: Semiconductor FAB Equipment Engineer - Qnity Electronics Marlborough, Massachusetts posted: Posted 30 Days Ago
---
TITLE: Engineer- DRAM, Advanced DRAM and EM Device/Cell Technology
EMPLOYER: Micron Technology, Inc.
LOCATION: Boise, ID - Main Site (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Engineer--DRAM-DEVICE---CELL-TECHNOLOGY_JR90433
EXCERPT: Engineer- DRAM, Advanced DRAM and EM Device/Cell Technology Boise, ID - Main Site posted: Posted 28 Days Ago
---
TITLE: Supplier Quality Engineer (m/f/d) - semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Supplier-Quality-Engineer--m-f-d----semiconductor-industry_R2616596
EXCERPT: Supplier Quality Engineer (m/f/d) - semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Senior/Lead SoC Emulation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-14
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Lead-SoC--Emulation-Engineer_R-10062762
EXCERPT: Senior/Lead SoC Emulation Engineer Noida posted: Posted 29 Days Ago
---
TITLE: Device Engineer
EMPLOYER: Intel
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-13
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-Arizona-Phoenix/Device-Engineer_JR0283845
EXCERPT: Device Engineer 3 Locations posted: Posted 30 Days Ago
---
TITLE: Manufacturing Quality Engineer (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Manufacturing-Quality-Engineer--m-f-d----for-semiconductor-industry_R2610421
EXCERPT: Manufacturing Quality Engineer (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 30+ Days Ago
---
TITLE: Analog IC Layout Engineer
EMPLOYER: Neuralink
LOCATION: Fremont, California, United States (unspecified)
SALARY: $83K-$139K
POSTED: 2026-04-28
K401_MATCH: yes (not source-backed)
APPLY_URL: https://boards.greenhouse.io/neuralink/jobs/7718856003?gh_jid=7718856003
EXCERPT: Analog IC Layout Engineer Fremont, California, United States About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world. Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. Job Description and Responsibilities: We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer, your responsibilities will include: - Crafting state-of-the-art layouts for mixed-signal and analog circuits - Amplifiers - Filters - Switched capacitor circuits - Oscillators - Data converters - Power management circuits - Reviewing layout floorplans and analyzing high-fidelity circuits with circuit engineers - Physical verification of custom IC mask layouts (LVS,
---
TITLE: Sr. Applications Manager
EMPLOYER: Ametek
LOCATION: Work Location (Country) United States | Remote/Onsite Onsite (remote)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.ametek.com/job/Peabody-Sr_-Applications-Manager-MA-01960/1382822800/
EXCERPT: Sr. Applications Manager Work Location (Country) United States | Remote/Onsite Onsite The Senior Applications Manager plays a critical role in expanding our semiconductor business across the United States. This role partners closely with semiconductor OEMs and end users to solve complex application challenges through technically sound, high‑value solutions. As a trusted technical and commercial advisor, the Senior Applications Manager drives growth by translating customer requirements into differentiated solutions while leading a team of Applications Engineers, managing key accounts and contributing to strategic semiconductor opportunities. Responsibilities Manage and mentor a team of Applications Engineers, aligning technical execution, customer support, and resource deployment to drive successful application outcomes. Serve as the primary point of contact for assigned semiconductor OEM and end‑user accounts, building strong, long‑term relationships. Drive revenue growth with direct ownership of a multi-million dollar territory and contribute to a broader semiconductor opportunity pipeline. Manage large semiconductor OEM accounts, supporting executive alignment, design‑in activities, and preferred supplier positioning. Identify and develop new customers, applications, and growth opportunities within the U.S. semiconductor end‑user market. Support complex, high‑priority opportunities by partnering with sales teams and leadership on strategy and execution. Engage directly with customers to understand application needs, performance expectations, and system‑level
---
TITLE: Mergers & Acquisition, Lead Transaction Principal
EMPLOYER: Teradyne
LOCATION: North Reading, MA (unspecified)
SALARY: $220K-$352K
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://jobs.teradyne.com/Teradyne/job/North-Reading-Mergers-&-Acquisition%2C-Lead-Transaction-Principal-MA/1389582400/
EXCERPT: Mergers & Acquisition, Lead Transaction Principal North Reading, MA ABOUT TERADYNE Teradyne is a global leader in automated test equipment and industrial automation, enabling customers across the semiconductor, electronics, and advanced manufacturing ecosystem to accelerate innovation and deliver high-quality products at scale. Across semiconductor test, system-level and wafer-level test, photonics, and adjacent semiconductor capital equipment, Teradyne operates at the intersection of deep engineering, complex supply chains, and long investment cycles. Strategic M&A plays a critical role in expanding Teradyne's served markets and strengthening long-term technology leadership. OPPORTUNITY OVERVIEW Teradyne is seeking a Lead Transaction Principal to own and execute mergers, acquisitions, divestitures, and strategic technology transactions across its semiconductor and semiconductor capital equipment businesses. This role carries end-to-end accountability for transactions from early assessment through execution, signing, and close, and requires close partnership with engineering, product, operational, and executive leadership. KEY RESPONSIBILITIES Own end-to-end M&A and strategic transactions across semiconductor test, wafer-level test, system-level test, and adjacent semiconductor capital equipment segments. Lead deal strategy, valuation framing, and execution from early evaluation through closing. Lead cross-functional deal teams spanning engineering, product management, operations, finance, legal, tax, HR, and IT. Evaluate target technologies,
---
TITLE: Senior Silicon Photonics TD Reliability Engineer
EMPLOYER: Intel
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-New-Mexico-Albuquerque/Senior-Silicon-Photonics-TD-Reliability-Engineer_JR0284419
EXCERPT: Senior Silicon Photonics TD Reliability Engineer 3 Locations posted: Posted 7 Days Ago
---
TITLE: Senior Hardware Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Hyderabad (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Hardware-Verification-Engineer_R-10062078
EXCERPT: Senior Hardware Verification Engineer Hyderabad posted: Posted 30+ Days Ago
---
TITLE: Materials science intern
EMPLOYER: PatSnap
LOCATION: Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-04-30
APPLY_URL: https://jobs.lever.co/patsnap/5a0dde57-d0f3-4e62-92f0-f6f60aceec5a
EXCERPT: Materials science intern Singapore We are seeking a detail-oriented candidate to structure and curate semiconductor process knowledge. You will translate complex technical content into standardised insights and collaborate cross-functionally to enhance data quality. We are seeking a detail-oriented candidate to structure and curate semiconductor process knowledge. You will translate complex technical content into standardised insights and collaborate cross-functionally to enhance data quality. Key Responsibilities: - Distill and author standardized Process Skills from annotated data and patent texts, covering process objectives, flow steps, key parameters, control points, common defects, alternative solutions, and evolution paths. - Participate in building a Semiconductor Process Knowledge Graph, mapping relationships among processes, materials, equipment, devices, and performance metrics. - Assist in designing process retrieval and recommendation logic; optimize knowledge presentation formats (e.g., process cards, flowcharts, decision trees, comparison matrices). - Work closely with product managers and algorithm teams to define knowledge-base schemas, quality standards, and update mechanisms. - Track cutting-edge semiconductor process trends (e.g., Advanced Packaging, GAA transistors, novel memory devices, power semiconductors) and continuously enrich knowledge content. Requirements： - Currently enrolled in a Bachelor's degree or higher in Materials Science and Engineering (or a related field such as Electrical or Chemical Engineering), with a solid understanding of semiconductor materials and processes. - Excellent technical writing and knowledge distillation skills; adept at abstracting complex process logic into clear, reusable, structured entries. - Familiar with full semiconductor flows (FEOL/BEOL) or a specific segment (logic, memory, advanced packaging, compound semiconductors). - Rigorous logical thinking; basic understanding of information
---
TITLE: Senior Principal Foundry Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Singapore/Senior-Principal-Foundry-Engineer_R-10062691
EXCERPT: Senior Principal Foundry Engineer Singapore posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Process Engineer - Photo
EMPLOYER: Micron Technology, Inc.
LOCATION: New York - Remote (B) (remote)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
HIRE_STATES: NY
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/New-York---Remote-B/Semiconductor-Process-Engineer---Photo_JR99797-1
EXCERPT: Semiconductor Process Engineer - Photo New York - Remote (B) posted: Posted 30+ Days Ago
---
TITLE: Investment Banking Vice President - Semiconductor
EMPLOYER: Citigroup Inc.
LOCATION: SAN FRANCISCO, California, United States of America (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://citi.eightfold.ai/careers/job/859033985888
EXCERPT: Investment Banking Vice President - Semiconductor SAN FRANCISCO, California, United States of America
---
TITLE: Engineer - NAND Cell Reliability
EMPLOYER: Micron Technology, Inc.
LOCATION: Fab 10N/X, Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Fab-10NX-Singapore/Engineer---NAND-Cell-Reliability_JR100264
EXCERPT: Engineer - NAND Cell Reliability Fab 10N/X, Singapore posted: Posted 4 Days Ago
---
TITLE: Senior Technology Transactions Attorney – Semiconductor Industry
EMPLOYER: GlobalFoundries
LOCATION: OFFSITE - USA - Texas (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-02
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalfoundries.wd1.myworkdayjobs.com/External/job/OFFSITE---USA---Texas/Senior-Technology-Transactions-Attorney---Semiconductor-Industry_JR-2600979
EXCERPT: Senior Technology Transactions Attorney – Semiconductor Industry OFFSITE - USA - Texas posted: Posted 10 Days Ago
---
TITLE: Engineer - Metals Adv DRAM
EMPLOYER: Micron Technology, Inc.
LOCATION: Boise, ID - Main Site (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Engineer---Metals-Adv-DRAM_JR101850
EXCERPT: Engineer - Metals Adv DRAM Boise, ID - Main Site posted: Posted 24 Days Ago
---
TITLE: Subject Matter Expert – Cleanliness (m/f/d) for the semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Subject-Matter-Expert---Cleanliness--m-f-d--for-the-semiconductor-industry_R2614006
EXCERPT: Subject Matter Expert – Cleanliness (m/f/d) for the semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Senior Full Stack Engineer
EMPLOYER: ON Semiconductor
LOCATION: Bangalore, Karnataka, India (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-02
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505595
EXCERPT: Senior Full Stack Engineer Bangalore, Karnataka, India Senior Full Stack Engineer
---
TITLE: Internship - MicroLED application engineer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Eindhoven/Internship---MicroLED-application-engineer_R-10062875
EXCERPT: Internship - MicroLED application engineer 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Equipment Maintenance Technician
EMPLOYER: Micron Technology, Inc.
LOCATION: Manassas, VA - Fab 6 (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Manassas-VA----Fab-6/Semiconductor-Equipment-Maintenance-Technician_JR89925
EXCERPT: Semiconductor Equipment Maintenance Technician Manassas, VA - Fab 6 posted: Posted 30+ Days Ago
---
TITLE: Poly Etch Process Engineer
EMPLOYER: STMicroelectronics
LOCATION: Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://stmicroelectronics.eightfold.ai/careers/job/563637171700117
EXCERPT: Poly Etch Process Engineer Singapore
---
TITLE: Semiconductor Advanced Technology Principal Architect
EMPLOYER: Fluor Corporation
LOCATION: Greenville, US-SC, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers.fluor.com/careers/job/1099552464305
EXCERPT: Semiconductor Advanced Technology Principal Architect Greenville, US-SC, United States
---
TITLE: Senior Engineer - Semiconductor Fab Manufacturing / Automation Engineer
EMPLOYER: GlobalFoundries
LOCATION: Essex Junction (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-04
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalfoundries.wd1.myworkdayjobs.com/External/job/Essex-Junction/Senior-Engineer---Semiconductor-Fab-Manufacturing---Automation-Engineer_JR-2602164
EXCERPT: Senior Engineer - Semiconductor Fab Manufacturing / Automation Engineer Essex Junction posted: Posted 8 Days Ago
---
TITLE: Senior Principal SoC Design Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principal-SoC-Design-Engineer_R-10062451
EXCERPT: Senior Principal SoC Design Engineer Pune posted: Posted 30+ Days Ago
---

[PASTE YOUR RESUME OR SKILLS HERE]