I'm looking for a job. I exported this list from FewerJobs.com - a curated job board.

Please:
1. Rank these jobs by fit for me, given my resume / skills.
2. Highlight the top 5 with a one-sentence rationale each.
3. Flag any concerns, including benefit values without source-backed evidence.
4. Suggest one or two filter changes I could make on FewerJobs to find more good matches.

Filters I applied:
- q: Socket
- quality_floor: default
- match_401k_strict: true
- parental_strict: true
- non_birth_strict: true
- pto_strict: true
- include_older: false
- apply_url_verified: false
- page: 2
- per_page: 100
- sort: relevance

Jobs (100 total):

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TITLE: SoC Failure Analysis Engineering Program Manager
EMPLOYER: Apple
LOCATION: Austin, United States of America (unspecified)
SALARY: $172K-$306K
POSTED: 2026-05-19
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200663926/soc-failure-analysis-engineering-program-manager?team=HRDWR
EXCERPT: SoC Failure Analysis Engineering Program Manager Austin, United States of America Apple's Engineering Program Management (EPM) team is seeking a seasoned Senior Engineering Program Manager to join and drive the SoC Failure Analysis (FA) efforts. In this role, you will be the driving force behind the operational excellence and program execution of FA across Apple's silicon lifecycle. You will own process definition, sample and logistics flow, cross-site coordination, and institutional knowledge capture - while actively partnering with technical leads on debug engagements to move issues from failure signature to resolution with speed and rigor. Serving as the critical link between high-level system failures and IP/circuit-level voltage and performance limitations, you will coordinate efforts across design, validation, and Apple FA labs, directly supporting the engineers building the chips at the core of future Apple products loved by millions of customers. Drive Technical Debug: Actively participate in bench-level functional debug on silicon validation boards and sockets, driving programs from failure signature through root-cause identification, and coordinate advanced EFA techniques (Sample Prep, EMMI, LVP, DLS, Nano-Probing, FIB) to isolate faults across analog, mixed-signal, and digital ICs. Establish Processes and Workflows: Define, document, and continuously improve FA intake, triage, prioritization, escalation, and closure workflows across Austin and Cupertino labs, and lead initiatives that measurably reduce turnaround time and increase FA throughput. Orchestrate Cross-Functional Execution: Partner closely with Design, Product Engineering, DFT, Reliability, Validation, and Foundry teams to drive measurable improvements in performance and yield, aligned to product launch milestones, while serving as the connective
---
TITLE: Sr Hardware Engineer
EMPLOYER: DexCom
LOCATION: San Diego, California (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://dexcom.wd1.myworkdayjobs.com/Dexcom/job/San-Diego-California/Sr-Hardware-Engineer_JR118234
EXCERPT: Sr Hardware Engineer San Diego, California posted: Posted Yesterday
---
TITLE: Software Engineer - Systems (DFT Initiative)
EMPLOYER: Apple
LOCATION: Cupertino, United States of America (unspecified)
SALARY: $147K-$272K
POSTED: 2026-02-19
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200647331/software-engineer-systems-dft-initiative?team=HRDWR
EXCERPT: Software Engineer - Systems (DFT Initiative) Cupertino, United States of America Are you interested in working on tools and software that directly enable hardware validation? Our Hardware Test Engineering team is evolving our Design for Test (DFT) methodology, and we're building the software infrastructure to support it effectively. This is an opportunity to develop software tools that control and automate hardware testing. You'll work on designing & building maintainable software that directly interfaces with test hardware and equipment. This isn't high-level application software-it's hands-on software engineering focused on creating tools that manage the actual execution of hardware tests. If you enjoy hands-on software development with clear real-world impact, and you're interested in the intersection of software and hardware testing, this role offers meaningful work with tangible results. Developing software components that manage testing workflows, test scheduling, result tracking, and data analysis Writing clean, maintainable code using solid design principles and best practices Working with data models that represent test configurations, results, and metadata, ensuring correctness and reasonable performance Building or integrating APIs that connect DFT systems with other engineering tools Creating scripts and configuration interfaces using Lua that allow test engineers to define and modify test scenarios Collaborating with hardware engineers and test specialists to understand requirements and implement effective solutions Contributing to code reviews and sharing knowledge with team members Minimum Qualifications: BS EE or CS 7+ years experience Understanding of software design principles including design patterns, separation of concerns, and writing maintainable code Proficiency in C++ for systems-level
---
TITLE: Network Architect
EMPLOYER: DXC Technology
LOCATION: CHL - RM - SANTIAGO (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://dxctechnology.wd1.myworkdayjobs.com/DXCJobs/job/CHL---RM---SANTIAGO/Solution-Architect_51578227
EXCERPT: Network Architect CHL - RM - SANTIAGO posted: Posted Yesterday
---
TITLE: Test Maintenance Technician
EMPLOYER: Renesas Electronics
LOCATION: Kulim, , Malaysia (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/RenesasElectronics/744000130902654-test-maintenance-technician
EXCERPT: Test Maintenance Technician Kulim, , Malaysia Company Description: Job Description: We are seeking fresh/experienced Test Maintenance Technician to support and sustain Final Test (FT) operations in a high-volume semiconductor manufacturing environment. This role focuses on maintaining stable test performance, supporting equipment and hardware, and ensuring consistent product quality and manufacturing efficiency. Key Responsibilities Perform daily, monthly, 3/6 monthly preventative maintenance (PM) on ATE testers, handlers, and contactors. Clean and replace consumable parts like contactor pins, sockets, and indexers. Perform routine calibration of the test system's instruments (voltage sources, digital pins, parametric measurement units). Troubleshoot hardware issues related to the test cell, including mechanical, electrical, and thermal problems Support Test Engineers in correlating failures and gathering data for root cause analysis. Work closely with Engineers to implement process improvements and resolve yield issues Participate in failure analysis and root cause investigations Prepare and maintain test-related documentation and reports Qualifications: Diploma in Electronic Engineering/ Mechatronic Engineering Strong understanding of electronics, mechanical. Proficiency with ATE platforms (e.g., UltraFLEX, V93K, T2000) and Class/Tape Handler (eg: EPSON handler, JHT, Vitrox) is a major plus. Familiarity with handler/prober mechanics and thermal control systems. Excellent data analysis and problem-solving skills, with a keen eye for patterns. High level of initiative to troubleshoot complex hardware/software systems. Rigorous attention to detail and procedure. Ability to work independently and as part of a team in a fast-paced production environment. Experience supporting high-volume, high-mix manufacturing environments Added advantage with ability to read and interpret datasheets, test limits, and schematics Additional Information:
---
TITLE: Principal Hardware Engineer
EMPLOYER: Broadcom
LOCATION: Ottawa March Road (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-22
APPLY_URL: https://broadcom.wd1.myworkdayjobs.com/External_Career/job/Ottawa-March-Road/Principal-Hardware-Engineer_R024071-1
EXCERPT: Principal Hardware Engineer Ottawa March Road posted: Posted 21 Days Ago
---
TITLE: Full Stack Engineer - GO/Java
EMPLOYER: Comcast Corporation
LOCATION: TX - Plano, 7900 Windrose Avenue 8th Floor (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-21
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://comcast.wd5.myworkdayjobs.com/Comcast_Careers/job/TX---Plano-7900-Windrose-Avenue-8th-Floor/Full-Stack-Engineer---GO-Java_R437437
EXCERPT: Full Stack Engineer - GO/Java TX - Plano, 7900 Windrose Avenue 8th Floor posted: Posted 22 Days Ago
---
TITLE: Silicon Validation Technician
EMPLOYER: Arrow Financial CORP
LOCATION: Nepean (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
LEARNING_BUDGET_OFFERED: yes (not source-backed)
APPLY_URL: https://arrow.wd1.myworkdayjobs.com/AC/job/Nepean/Silicon-Validation-Technician_R244014
EXCERPT: Silicon Validation Technician Nepean Position: Silicon Validation Technician Job Description: What You'll Be Doing: An evening/night/weekend test technician will perform standard testing on equipment and analyze the results. Work hours for this role will begin as 9am-5pm for the first two weeks during training and subsequently be shifted to an evening/night schedule starting anywhere from 2pm to midnight /midnight to 8AM. Role Overview The Silicon Validation role supports silicon characterization and validation activities by operating test equipment, collecting data, assisting engineers, and maintaining lab hardware. This position is hands on and requires strong technical troubleshooting skills and the ability to work independently during off shift and rotating shift hours. Job Responsibilities Operate ATE systems (e.g., Teradyne J750) and Evaluation Boards to support data collection. Build, assemble, and inventory board kits for characterization and validation activities. Assist engineers with data analysis and preparation of internal/external characterization reports. Perform hardware modifications on boards, sockets, and fixtures as directed by test engineers (e.g., soldering, rework). Support lab operations including shipping/receiving of silicon samples, boards, and test hardware. Conduct majority of second and third shift data collection (afternoons, evenings, or nights). Maintain lab equipment, ensure proper documentation, and follow ESD/lab safety practices. What We Are Looking For: Key Qualifications College diploma or equivalent technical credential with 4+ years of related industry experience. Strong debugging, rework, and soldering skills (including fine pitch components). Ability to work independently with minimal supervision, especially during off shift operations. Hands on experience with PCB design concepts, schematic reading, and
---
TITLE: Wi-Fi / Bluetooth Architect
EMPLOYER: Aptiv
LOCATION: Chennai, India (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://aptiv.wd5.myworkdayjobs.com/APTIV_CAREERS/job/Chennai-India/Wi-Fi---Bluetooth-Architect_J000688524
EXCERPT: Wi-Fi / Bluetooth Architect Chennai, India posted: Posted 30+ Days Ago
---
TITLE: CNO Developer 3
EMPLOYER: T-Rex Solutions
LOCATION: Hanover, Maryland (onsite)
SALARY: $200K-$250K
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
LEARNING_BUDGET_OFFERED: yes (not source-backed)
APPLY_URL: https://www.trexsolutionsllc.com/current-opportunities-at-trex/?gh_jid=8471596002
EXCERPT: CNO Developer 3 Hanover, Maryland T-Rex is looking for a talented CNO Developer 3 to work on a program in the Hanover, Maryland area in support of the Intelligence Community. Responsibilities: This Position Is An Onsite Role Responsibilities include, but are not limited to: Leads the designing, developing, documenting, testing, debugging and maintenance of hardware or software based CNO capabilities. Ensure effective communication coordination and transparency with leadership and customers. Responsible for ensuring software standards meet network and security requirements. A SME that supervises and mentors subordinate project and ICON Innovation Collaborative (IIC) staff. Minimum Qualifications: Bachelor's Degree and 12+yrs experience OR High School and 16+ yrs experience OR Associates and 14+ yrs OR experience OR Master's and 10+ yrs experience OR PhD and 8+ yrs experience. Proficiency in Python and C/C++ programming. Proficiency in low-level internals in one or more technology areas (e.g., Windows, Unix, Mobile, Network devices). Proficiency with networking (TCP/IP) and socket level programming. Preferred Qualifications: CNO capability development experience. Software Analysis/Reverse Engineering experience. Understanding of assembly programming concepts. Unit Test experience. Experience using Atlassian products (JIRA, Confluence, Crucible). Relevant industry standard certifications such as Certified Entry-Level Python Programmer (PCEP) or C++ Certified Professional Programmer Certification (CPP). Experience with CI/CD pipeline/DevSecOps development. Clearance Requirements: Active TS/SCI security clearance with current polygraph is required. Physical Requirements: Must be able to be in a stationary position more than 50% of the time. Must be able to communicate, converse, and exchange information with peers and senior personnel. Constantly operates a
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TITLE: Senior Principal Hardware System Architect
EMPLOYER: Astera Labs
LOCATION: United States, Remote (remote)
SALARY: Not disclosed
POSTED: 2026-05-19
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/asteralabs/jobs/4692577005
EXCERPT: Senior Principal Hardware System Architect United States, Remote Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview The AI infrastructure landscape is evolving at breakneck speed, and Astera Labs is at the center of it - delivering the intelligent connectivity solutions that enable the most demanding AI and cloud workloads on the planet. As server platforms grow increasingly complex with multi-socket architectures, accelerator-dense configurations, and high-speed interconnect fabrics, the need for world-class hardware architects who can define and deliver these systems end-to-end has never been more critical. The AI Platform Solutions Group is seeking a Senior Principal Hardware / System Architect to lead the architecture, design, and development of next-generation x86 and accelerator-based server platforms. You will own system-level architecture decisions spanning compute, memory, storage, and interconnect subsystems - driving hardware platform development from concept through bring-up and validation. This role sits at the intersection of silicon, board design, FPGA/ASIC development, and platform integration, with direct impact on how AI infrastructure scales at the
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TITLE: Sr. Systems Engineer - North-Central
EMPLOYER: Versa Networks
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
APPLY_URL: https://jobs.jobvite.com/versa-networks/job/oOlyufwV
EXCERPT: Sr. Systems Engineer - North-Central Sr. Systems Engineer - North-Central
---
TITLE: HW Engineer
EMPLOYER: Cisco
LOCATION: San Jose, California, US (unspecified)
SALARY: $152K-$219K
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/San-Jose-California-US/Lab-HW-Engineer_2009057
EXCERPT: HW Engineer San Jose, California, US The application window is expected to close on: 03/26/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the team: The Hardware Team is responsible for leading the hardware development through all phases of product design, from concept and architecture to production and support. Our engineers handle every aspect of chip development, from definition and architecture to silicon bring-up, validation, and system integration. This role combines strong technical expertise with leadership, planning, and cross-functional collaboration. Your Impact: You will join our Cisco Silicon One team , the epicenter of Cisco's ASIC design. As a Hardware Lab Engineer you will be responsible for enabling and supporting the full lifecycle of silicon and hardware development by operating and evolving a world-class hardware lab environment. Key responsibilities: Own and manage day-to-day operation of the hardware lab supporting ASIC bring-up, EVB development, validation, and system debug. Ensure lab readiness for critical milestones such as silicon power-on, bring-up, qualification, and customer enablement. Provide hands-on technical support in the lab for EVB bring-up, debug, failure analysis Manage lab infrastructure, equipment, and resources including scopes, analyzers, power supplies, sockets, pogo pins, handlers, and automation tools. Coordinate lab usage and priorities across multiple projects and global teams. Work closely with cross-functional teams including board design, package, mechanical, thermal, SI/PI, test, production, and validation. Drive continuous improvement of lab processes, workflows, safety, and efficiency. Interface with external vendors and partners
---
TITLE: Standard Cell Library Engineer
EMPLOYER: Intel
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-28
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/Standard-Cell-Library-Engineer_JR0283004-1
EXCERPT: Standard Cell Library Engineer 2 Locations posted: Posted 15 Days Ago
---
TITLE: Distributed Systems Engineer
EMPLOYER: Cadence Design Systems, Inc.
LOCATION: PORT MOODY 01 (VANCOUVER) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cadence.wd1.myworkdayjobs.com/External_Careers/job/PORT-MOODY-01-VANCOUVER/Distributed-Systems-Engineer_R53232
EXCERPT: Distributed Systems Engineer PORT MOODY 01 (VANCOUVER) posted: Posted Yesterday
---
TITLE: Flight Software Engineer – Embedded Linux & Networking
EMPLOYER: AST SpaceMobile
LOCATION: Lanham, Maryland, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
APPLY_URL: https://ast-science.com/company/careers/?gh_jid=4705073005
EXCERPT: Flight Software Engineer – Embedded Linux & Networking Lanham, Maryland, United States AST SpaceMobile is building the first and only global cellular broadband network in space to operate directly with standard, unmodified mobile devices based on our extensive IP and patent portfolio and designed for both commercial and government applications. Our engineers and space scientists are on a mission to eliminate the connectivity gaps faced by today's five billion mobile subscribers and finally bring broadband to the billions who remain unconnected. Position Overview We are seeking a highly skilled Flight Software Engineer - Embedded Linux & Networking to design, develop, and support embedded software systems for advanced aerospace platforms. This role focuses on building and optimizing Linux-based networking capabilities within mission-critical environments, contributing to system architecture, integration, and performance of complex embedded systems. Key Responsibilities: - Design, develop, and maintain embedded Linux software, including board support packages (BSPs), device drivers, and system-level integration - Lead development of networking subsystems, including protocol stacks, network drivers, and communication interfaces - Collaborate with cross-functional engineering teams to define system interfaces and ensure seamless hardware/software integration - Contribute to and uphold embedded software architecture standards, best practices, and coding guidelines - Participate in full software development lifecycle, including design, coding, testing, integration, and deployment - Support simulation and testing environments to validate networking behavior and system performance - Diagnose and resolve complex technical issues across hardware and software boundaries - Conduct code reviews and provide mentorship to junior engineers to ensure quality and consistency
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TITLE: Sr Test Application Engineer
EMPLOYER: Renesas Electronics
LOCATION: Kulim, , Malaysia (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/RenesasElectronics/744000127551059-sr-test-application-engineer
EXCERPT: Sr Test Application Engineer Kulim, , Malaysia Company Description: Job Description: We are seeking an experienced Test Application Engineer to support and sustain Final Test (FT) operations in a high-volume semiconductor manufacturing environment. This role focuses on maintaining stable test performance, resolving production test issues, supporting equipment and hardware, and ensuring consistent product quality and manufacturing efficiency. Key Responsibilities Sustain and maintain FT ATE performance for mass production Provide daily production test support to ensure stable test operations Troubleshoot and resolve test-related issues including yield drops, tester alarms, and test escapes Perform test correlation, limit validation, and guard band verification Support test hardware maintenance (load boards, sockets, cables, probe interfaces) Coordinate with Process, QA, and Manufacturing teams to resolve tester and handler issues Support engineering change implementation (ECR / ECO) related to test Assist in NPI FT handover from development to mass production Support temperature testing , re-test, and containment activities Participate in failure analysis and root cause investigations Prepare and maintain test-related documentation and reports Prepare and maintain Equipment/Tester OEE. Qualifications: Bachelor's degree in Electrical / Electronics Engineering , Microelectronics, or related field Minimum 3-5 years of experience in Final Test engineering or test maintenance Hands-on experience with ATE systems (e.g. Teradyne, LTX, Advantest, Chroma, SPEA) Strong understanding of Final Test manufacturing flow and production operations Experience supporting high-volume, high-mix manufacturing environments Ability to read and interpret datasheets, test limits, and schematics Additional Information: Renesas is an embedded semiconductor solution provider driven by its Purpose ' To Make Our
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TITLE: Band 5 - Biomedical Scientist - Immunology - Leeds
EMPLOYER: Pulse Active Stations Network
LOCATION: Leeds, North Yorkshire (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-07
APPLY_URL: https://job-boards.greenhouse.io/pulse/jobs/6577250003
EXCERPT: Band 5 - Biomedical Scientist - Immunology - Leeds Leeds, North Yorkshire
---
TITLE: RF Engineer
EMPLOYER: Intel
LOCATION: 4 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-28
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/RF-Engineer_JR0283005-1
EXCERPT: RF Engineer 4 Locations posted: Posted 15 Days Ago
---
TITLE: Sr. Software Engineer
EMPLOYER: Cowboy Space Corporation
LOCATION: San Carlos, California, San Carlos, California, United States (unspecified)
SALARY: $150K-$200K
POSTED: 2026-05-11
APPLY_URL: https://jobs.ashbyhq.com/cowboyspace/9c2cbc34-422e-4954-affe-fcdf9097c725
EXCERPT: Sr. Software Engineer San Carlos, California, San Carlos, California, United States Sr. Software Engineer About Cowboy Space Corp: Cowboy Space Corp. is building the infrastructure to power and connect the orbital economy. Our satellites operate in Low Earth Orbit to collect sunlight and enable a new class of capabilities-from powering on-orbit compute, to transmitting energy via infrared lasers (space-to-earth and space-to-space), powering on-orbit compute to delivering secure, high-bandwidth optical data. By rethinking how energy and data are generated and distributed in space, we're unlocking entirely new ways to operate both in orbit and on Earth. Founded in 2024 by Baiju Bhatt (co-founder of Robinhood), Cowboy Space Corp. is backed by leading investors and built by a team from top aerospace and defense organizations. We're moving quickly to solve complex technical challenges and build a new category of space infrastructure. About the Role : We are looking for a Software Engineer to help build critical systems that power our space-based compute platform. You will work across the stack-from flight and mission software to ground systems and simulation tools-contributing to software that operates in highly constrained, high-reliability environments. This is a high-growth role with the opportunity to gain ownership quickly and work closely with experienced engineers across hardware and software. Responsibilities: - Design, develop, and rigorously test high-reliability, low-latency flight software for our space-based compute platform and satellite subsystems. - Implement and maintain critical mission software for on-orbit operation, including command and data handling (C&DH), fault detection, isolation, and recovery (FDIR), and
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TITLE: Electrical Hardware Engineer, HyperX
EMPLOYER: Hewlett-Packard
LOCATION: Hsinchu, Hsinchu City, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://hp.eightfold.ai/careers/job/42092339
EXCERPT: Electrical Hardware Engineer, HyperX Hsinchu, Hsinchu City, Taiwan
---
TITLE: Engineer - Embedded Software (Middleware)
EMPLOYER: Netradyne
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.netradyne.com/company/careers?gh_jid=4678691005
EXCERPT: Engineer - Embedded Software (Middleware) Bangalore Netradyne harnesses the power of Computer Vision and Edge Computing to revolutionize the modern-day transportation ecosystem. We are a leader in fleet safety solutions. With growth exceeding 4x year over year, our solution is quickly being recognized as a significant disruptive technology. Our team is growing, and we need forward-thinking, uncompromising, competitive team members to continue to facilitate our growth. Job Title: Engineer - Middleware (Linux Systems) Location: Bangalore Experience: 1-3 Years About Netradyne Netradyne is a fast-growing AI and edge computing company transforming fleet safety and driver behavior analytics through cutting-edge vision-based technology. Our solutions leverage deep learning, embedded systems, and cloud platforms to deliver real-time insights and improve road safety globally. Key Responsibilities - Design and implement middleware components and services on Linux-based platforms - Develop and optimize IPC mechanisms (e.g., sockets, message queues, shared memory, DBus) - Work on system daemons, service orchestration, and resource management modules - Collaborate with cross-functional teams including hardware, firmware, and application layers - Perform code reviews, unit testing, integration testing, and performance tuning - Ensure software reliability, maintainability, and scalability - Debug and resolve system issues across middleware and lower layers - Contribute to system architecture and design discussions Qualifications - Bachelor's or Master's degree in Computer Science, Electronics - 1- 3 years of experience in system software development on Linux Required Skills - Strong C/C++ programming skills - Solid understanding of Linux internals (process/thread model, scheduling, memory management, IPC) - Experience with IPC mechanisms
---
TITLE: Electronics Hardware Engineer
EMPLOYER: Eaton Corporation
LOCATION: Moon Township, Pennsylvania, USA, 15108 (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://eaton.eightfold.ai/careers/job/687233335702
EXCERPT: Electronics Hardware Engineer Moon Township, Pennsylvania, USA, 15108
---
TITLE: Test Application Engineer
EMPLOYER: Renesas Electronics
LOCATION: Kulim, , Malaysia (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/RenesasElectronics/744000116725837-test-application-engineer
EXCERPT: Test Application Engineer Kulim, , Malaysia Company Description: Job Description: We are seeking an experienced Test Application Engineer to support and sustain Final Test (FT) operations in a high-volume semiconductor manufacturing environment. This role focuses on maintaining stable test performance, resolving production test issues, supporting equipment and hardware, and ensuring consistent product quality and manufacturing efficiency. Key Responsibilities Sustain and maintain FT ATE performance for mass production Provide daily production test support to ensure stable test operations Troubleshoot and resolve test-related issues including yield drops, tester alarms, and test escapes Perform test correlation, limit validation, and guard band verification Support test hardware maintenance (load boards, sockets, cables, probe interfaces) Coordinate with Process, QA, and Manufacturing teams to resolve tester and handler issues Support engineering change implementation (ECR / ECO) related to test Assist in NPI FT handover from development to mass production Support temperature testing , re-test, and containment activities Participate in failure analysis and root cause investigations Prepare and maintain test-related documentation and reports Prepare and maintain Equipment/Tester OEE. Qualifications: Bachelor's degree in Electrical / Electronics Engineering , Microelectronics, or related field Minimum 3-5 years of experience in Final Test engineering or test maintenance Hands-on experience with ATE systems (e.g. Teradyne, LTX, Advantest, Chroma, SPEA) Strong understanding of Final Test manufacturing flow and production operations Experience supporting high-volume, high-mix manufacturing environments Ability to read and interpret datasheets, test limits, and schematics Additional Information: Renesas is an embedded semiconductor solution provider driven by its Purpose ' To Make Our Lives
---
TITLE: Senior Software Engineer (SMTS) — Ultra Messaging
EMPLOYER: Salesforce
LOCATION: Illinois - Chicago (unspecified)
SALARY: $148K-$224K
POSTED: 2026-05-20
PARENTAL_LEAVE_WEEKS: 26 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 12 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers.salesforce.com/en/jobs/jr340226/senior-software-engineer-smts-ultra-messaging/
EXCERPT: Senior Software Engineer (SMTS) — Ultra Messaging Illinois - Chicago Role Overview The Senior Software Engineer SMTS role is part of the Ultra Messaging (UM) team, a small, specialized group of engineers building and maintaining one of the industry's most demanding real-time messaging middleware platforms. Ultra Messaging is mission-critical infrastructure for some of the world's largest financial institutions - including major global banks, trading firms, market makers, and exchanges - where microseconds matter and reliability is non-negotiable. The team works remotely with a preference for candidates in the Chicago area, where several team members are based. You'll be working on a mature, production-grade, system-level C codebase that has been powering real-time financial data flows since 2004. If you're a low-level systems programmer who loves performance, concurrency, and working on software that has to work right, every time - this is your role. Responsibilities Analyze requirements for new features, enhancements, and bug fixes; produce clear requirements documents. Evaluate the existing codebase to determine optimal design approaches; produce design documents. Implement changes primarily in the core C layer, with occasional work in Java (via JNI) and .NET (C#) API wrappers for cross-platform support. Write and execute development-level tests to validate correctness and performance. Collaborate with and support QA and customer support engineers throughout the development lifecycle. Occasionally engage directly with customers on technically complex issues when escalation is warranted. Required Skills You have 5+ years of experience writing production-quality C or C++ code. You have hands-on experience with multi-threaded programming , including
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TITLE: Senior Network Engineer
EMPLOYER: Cadence Design Systems, Inc.
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cadence.wd1.myworkdayjobs.com/External_Careers/job/NOIDA/Senior-Network-Engineer_R53236
EXCERPT: Senior Network Engineer 2 Locations posted: Posted 30+ Days Ago
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TITLE: Test Maintenance Engineer
EMPLOYER: Renesas Electronics
LOCATION: Kulim, , Malaysia (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/RenesasElectronics/744000127545611-test-maintenance-engineer
EXCERPT: Test Maintenance Engineer Kulim, , Malaysia Company Description: Job Description: We are seeking an experienced Test Maintenance Engineer to support and sustain Final Test (FT) operations in a high-volume semiconductor manufacturing environment. This role focuses on maintaining stable test performance, resolving production test issues, supporting equipment and hardware, and ensuring consistent product quality and manufacturing efficiency. Key Responsibilities Sustain and maintain FT ATE test programs for mass production Provide daily production test support to ensure stable test operations Troubleshoot and resolve test-related issues including yield drops, tester alarms, and test escapes Perform test correlation, limit validation, and guard band verification Support test hardware maintenance (load boards, sockets, cables, probe interfaces) Coordinate with Equipment, Process, and Manufacturing teams to resolve tester and handler issues Monitor and analyze FT yield, bin distribution, and test performance metrics Support engineering change implementation (ECR / ECO) related to test Assist in NPI FT handover from development to mass production Support temperature testing , re-test, and containment activities Participate in failure analysis and root cause investigations Prepare and maintain test-related documentation and reports Qualifications: Qualifications and Skills Bachelor's degree in Electrical / Electronics Engineering , Microelectronics, or related field 2-5 years of experience in Final Test engineering or test maintenance Hands-on experience with ATE systems (e.g. Teradyne, Advantest, Chroma, SPEA) Strong understanding of Final Test manufacturing flow and production operations Experience supporting high-volume, high-mix manufacturing environments Ability to read and interpret datasheets, test limits, and schematics Additional Information: Renesas is an embedded semiconductor solution provider driven
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TITLE: Electrical Hardware Engineer
EMPLOYER: Anduril
LOCATION: Lexington, Massachusetts, United States (unspecified)
SALARY: $129K-$171K
POSTED: 2026-06-04
APPLY_URL: https://boards.greenhouse.io/andurilindustries/jobs/5156216007?gh_jid=5156216007
EXCERPT: Electrical Hardware Engineer Lexington, Massachusetts, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE TEAM The Anduril Imaging team develops state-of-the-art imaging systems across both hardware and software, deployed to tackle the most significant security challenges of America and its allies. The team is heavily involved in utilizing computer vision, perception, electro-optical, infrared, and sensor data to give our war fighters and allies an advantage. ABOUT THE JOB As an Electrical Hardware Engineer at Anduril Imaging, you will design and develop advanced electronics for airborne EO/IR systems, focusing on sensor electronics, aircraft interfaces, and power management. Your role will involve hands-on testing and collaboration with cross-functional teams to ensure optimal performance and integration of cutting-edge technologies. WHAT YOU'LL DO - Contribute to the design, development, and testing of electronics for airborne EO/IR systems, including sensor electronics, aircraft interfaces, and power management. - Support systems engineering teams in
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TITLE: [Bluetooth] Software/Senior Software/Principal Software Engineer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/XMLNAME--Bluetooth--Software-Senior-Software-Principal-Software-Engineer_R-10029318
EXCERPT: [Bluetooth] Software/Senior Software/Principal Software Engineer 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Tape Out Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Hsinchu (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/Tape-Out-Engineer_R-10063230
EXCERPT: Tape Out Engineer Hsinchu posted: Posted 30+ Days Ago
---
TITLE: Core Network Delivery Engineer
EMPLOYER: Vodafone Group
LOCATION: POZZUOLI, Italy (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://vodafone.eightfold.ai/careers/job/563018696289002
EXCERPT: Core Network Delivery Engineer POZZUOLI, Italy
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TITLE: Network Engineer
EMPLOYER: Kyndryl
LOCATION: Beijing, China (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://kyndryl.wd5.myworkdayjobs.com/KyndrylProfessionalCareers/job/Beijing-China/networking_R-57189
EXCERPT: Network Engineer Beijing, China posted: Posted Today
---
TITLE: Lead Hardware Engineer
EMPLOYER: GE Vernova
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-29
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Wilmington-NC-USA/Lead-Hardware-Engineer_R5043083-2
EXCERPT: Lead Hardware Engineer 3 Locations posted: Posted 14 Days Ago
---
TITLE: Electro-Mechanical Hardware Engineer
EMPLOYER: EnduroSat
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
APPLY_URL: https://endurosat.jazz.co/apply/wluOVAnhpB/ElectroMechanical-Hardware-Engineer
EXCERPT: Electro-Mechanical Hardware Engineer Electro-Mechanical Hardware Engineer
---
TITLE: Network Engineer
EMPLOYER: DXC Technology
LOCATION: GBR - GLS - GLOUCESTER (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://dxctechnology.wd1.myworkdayjobs.com/DXCJobs/job/GBR---GLS---GLOUCESTER/Network-Engineer_51551791
EXCERPT: Network Engineer GBR - GLS - GLOUCESTER posted: Posted 30+ Days Ago
---
TITLE: Hardware Designer
EMPLOYER: Syntronic
LOCATION: Boston, MA (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
APPLY_URL: https://jobs.lever.co/syntronic/a6aa03ed-b247-45b0-a9b9-2d9849f49acf
EXCERPT: Hardware Designer Boston, MA
---
TITLE: Software Engineer II, Service Network - Slack
EMPLOYER: Slack
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-28
PARENTAL_LEAVE_WEEKS: 26 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 12 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://salesforce.wd12.myworkdayjobs.com/Slack/job/Virginia---Herndon/Software-Engineer-II--Service-Network---Slack_JR341704
EXCERPT: Software Engineer II, Service Network - Slack 2 Locations posted: Posted 15 Days Ago
---
TITLE: OT Network Engineer
EMPLOYER: Masco
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://masco.wd1.myworkdayjobs.com/masco/job/US---Tennessee---Jackson/OT-Network-Engineer_REQ52518
EXCERPT: OT Network Engineer 3 Locations posted: Posted 30+ Days Ago
---
TITLE: Senior Electronic Hardware Engineer
EMPLOYER: GE Vernova
LOCATION: Stafford (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Stafford/Senior-Electronic-Hardware-Engineer_R5039517-2
EXCERPT: Senior Electronic Hardware Engineer Stafford posted: Posted 30+ Days Ago
---
TITLE: Device Engineer
EMPLOYER: Intel
LOCATION: Ireland, Leixlip (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Ireland-Leixlip/Device-Engineer_JR0284556
EXCERPT: Device Engineer Ireland, Leixlip posted: Posted 4 Days Ago
---
TITLE: ECAD Hardware Engineer
EMPLOYER: Magna International Inc.
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://magna.wd3.myworkdayjobs.com/Magna/job/Timisoara-RO/ECAD-Hardware-Engineer_R00239313
EXCERPT: ECAD Hardware Engineer 2 Locations posted: Posted Today
---
TITLE: Principal Digital Hardware Engineer (PCBs/FPGAs/HDL)
EMPLOYER: Anduril
LOCATION: Costa Mesa, California, United States (unspecified)
SALARY: $220K-$292K
POSTED: 2026-01-30
APPLY_URL: https://boards.greenhouse.io/andurilindustries/jobs/5038267007?gh_jid=5038267007
EXCERPT: Principal Digital Hardware Engineer (PCBs/FPGAs/HDL) Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. WHAT YOU'LL DO - Technical lead for electrical engineering team, creating embedded compute solutions for vehicle management, DSP, and networking. - Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (Developing requirements, schematic capture, board layout, bring-up, test, and integration). - Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization). - Collaborate with internal stakeholders to develop a strategy for developing and rolling out your compute solutions across Anduril in a scalable manner. - Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines. REQUIRED QUALIFICATIONS - Bachelor's Degree in Electrical Engineering or equivalent - 15+ years of experience designing, testing
---
TITLE: Hardware Engineer 5
EMPLOYER: Broadcom
LOCATION: USA-CA San Jose Innovation Drive (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
APPLY_URL: https://broadcom.wd1.myworkdayjobs.com/External_Career/job/USA-CA-San-Jose-Innovation-Drive/Hardware-Engineer-5_R026209
EXCERPT: Hardware Engineer 5 USA-CA San Jose Innovation Drive posted: Posted Yesterday
---
TITLE: Principal Silicon Engineer - Networking
EMPLOYER: Microsoft
LOCATION: Santa Clara, CA, US (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
K401_MATCH: yes (not source-backed)
APPLY_URL: https://apply.careers.microsoft.com/careers/job/1970393556819872
EXCERPT: Principal Silicon Engineer - Networking Santa Clara, CA, US
---
TITLE: Connectivity Systems Validation Engineer
EMPLOYER: Intel
LOCATION: India, Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/India-Bangalore/Connectivity-Systems-Validation-Engineer_JR0284582
EXCERPT: Connectivity Systems Validation Engineer India, Bangalore posted: Posted Today
---
TITLE: Sr. Systems Engineer - Service Providers
EMPLOYER: Versa Networks
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
APPLY_URL: https://jobs.jobvite.com/versa-networks/job/oagHufwl
EXCERPT: Sr. Systems Engineer - Service Providers Sr. Systems Engineer - Service Providers
---
TITLE: Tier 3, Engineer 4 – Network Solutions Engineer
EMPLOYER: Comcast Corporation
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://comcast.wd5.myworkdayjobs.com/Comcast_Careers/job/TX---Plano-7900-Windrose-Avenue-8th-Floor/Tier-3--Engineer-4---Network-Solutions-Engineer_R438620
EXCERPT: Tier 3, Engineer 4 – Network Solutions Engineer 2 Locations posted: Posted Yesterday
---
TITLE: EDA Tools Hardware Engineer
EMPLOYER: Intel
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-29
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Taiwan-Hsinchu/EDA-Tools-Hardware-Engineer_JR0284383
EXCERPT: EDA Tools Hardware Engineer 2 Locations posted: Posted 14 Days Ago
---
TITLE: Hardware Electronics Engineer 2
EMPLOYER: Draper Laboratories
LOCATION: Cambridge, MA (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
K401_MATCH: yes (not source-backed)
APPLY_URL: https://draper.wd5.myworkdayjobs.com/Draper_Careers/job/Cambridge-MA/Hardware-Electronics-Engineer-2_JR002230
EXCERPT: Hardware Electronics Engineer 2 Cambridge, MA posted: Posted 3 Days Ago
---
TITLE: Device Engineer
EMPLOYER: Intel
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-13
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-Arizona-Phoenix/Device-Engineer_JR0283845
EXCERPT: Device Engineer 3 Locations posted: Posted 30 Days Ago
---
TITLE: Hardware Engineer
EMPLOYER: Arrow Electronics
LOCATION: Benton Harbor, Michigan, United States of America (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://arrow.wd1.myworkdayjobs.com/AC/job/Benton-Harbor-Michigan/Device-Engineer_R242718/apply
EXCERPT: Hardware Engineer Benton Harbor, Michigan, United States of America Join our team as a Senior Hardware Engineer and drive the next-gen HMI module architecture for leading-edge electronics. Collaborate with top-tier partners, design high-performance boards, and ensure certification and field testing. Shape innovative solutions in a dynamic, growth-focused environment. Ready to make an impact? Apply now to advance your engineering career!
---
TITLE: Hardware Engineer
EMPLOYER: Broadcom
LOCATION: USA-CA Irvine Alton Parkway Bldg 1 (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
APPLY_URL: https://broadcom.wd1.myworkdayjobs.com/External_Career/job/USA-CA-Irvine-Alton-Parkway-Bldg-1/Hardware-Engineer_R026046
EXCERPT: Hardware Engineer USA-CA Irvine Alton Parkway Bldg 1 posted: Posted 30+ Days Ago
---
TITLE: FPGA Engineer Staff
EMPLOYER: Plexus Corp
LOCATION: Penang, Malaysia (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://plexus.eightfold.ai/careers/job/1099550731704
EXCERPT: FPGA Engineer Staff Penang, Malaysia
---
TITLE: SoC Integration Engineer
EMPLOYER: Intel
LOCATION: 4 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/SoC-Integration-Engineer_JR0284554
EXCERPT: SoC Integration Engineer 4 Locations posted: Posted 7 Days Ago
---
TITLE: Defect/Integration Engineer
EMPLOYER: Analog Devices
LOCATION: Ireland, Limerick (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Defect-Integration-Engineer_R262760
EXCERPT: Defect/Integration Engineer Ireland, Limerick posted: Posted 17 Days Ago
---
TITLE: Staff Software Engineer, Data Infrastructure
EMPLOYER: Slack
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-27
PARENTAL_LEAVE_WEEKS: 26 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 12 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://salesforce.wd12.myworkdayjobs.com/Slack/job/California---San-Francisco/Staff-Software-Engineer--Data-Infrastructure_JR339840
EXCERPT: Staff Software Engineer, Data Infrastructure 3 Locations posted: Posted 16 Days Ago
---
TITLE: Hardware Engineer
EMPLOYER: Lam Research
LOCATION: IN-Bangalore (3811) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://lamresearch.eightfold.ai/careers/job/1099551126057
EXCERPT: Hardware Engineer IN-Bangalore (3811)
---
TITLE: Engineer, EHS
EMPLOYER: Ruckus Networks
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
APPLY_URL: https://jobs.commscope.com/job/Juarez-Chihuahua-Engineer%2C-EHS-Chih/1399110500/
EXCERPT: Engineer, EHS Engineer, EHS
---
TITLE: Interconnect Hardware Engineer
EMPLOYER: NVIDIA Corporation
LOCATION: Israel, Yokneam (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Yokneam/Interconnect-Hardware-Engineer_JR2018480
EXCERPT: Interconnect Hardware Engineer Israel, Yokneam posted: Posted 11 Days Ago
---
TITLE: Senior Staff Mixed Signal IP Enablement and Debug Engineer
EMPLOYER: Intel
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Folsom/Senior-Staff-Mixed-Signal-IP-Enablement-and-Debug-Engineer_JR0284335-1
EXCERPT: Senior Staff Mixed Signal IP Enablement and Debug Engineer 2 Locations posted: Posted 11 Days Ago
---
TITLE: Hardware Engineer
EMPLOYER: Jbt Marel Corp
LOCATION: NL - Boxmeer JP (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
APPLY_URL: https://jbtm.wd108.myworkdayjobs.com/JBT_Marel_Career_Site/job/NL---Boxmeer-JP/Hardware-Engineer_21594-1
EXCERPT: Hardware Engineer NL - Boxmeer JP posted: Posted 30+ Days Ago
---
TITLE: Sr. Network Engineer
EMPLOYER: Leidos
LOCATION: Odenton, MD (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://leidos.wd5.myworkdayjobs.com/External/job/Odenton-MD/Sr-Network-Engineer_R-00181592-1
EXCERPT: Sr. Network Engineer Odenton, MD posted: Posted 30+ Days Ago
---
TITLE: Linux Driver Wifi developer
EMPLOYER: Intel
LOCATION: Israel, Jerusalem (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-14
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Israel-Jerusalem/Linux-Driver-Wifi-developer_JR0281055
EXCERPT: Linux Driver Wifi developer Israel, Jerusalem posted: Posted 29 Days Ago
---
TITLE: Firmware Engineer
EMPLOYER: Fuse Energy
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-09
APPLY_URL: https://apply.workable.com/j/9927D49B40
EXCERPT: Firmware Engineer
---
TITLE: IT - Staff Network Engineer
EMPLOYER: Cadence Design Systems, Inc.
LOCATION: OSAKA01 (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cadence.wd1.myworkdayjobs.com/External_Careers/job/OSAKA01/IT---Staff-Network-Engineer_R54008
EXCERPT: IT - Staff Network Engineer OSAKA01 posted: Posted 30+ Days Ago
---
TITLE: Network Implementation Engineer
EMPLOYER: Leidos
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://leidos.wd5.myworkdayjobs.com/External/job/Chantilly-VA/Network-Implementation-Engineer_R-00175723
EXCERPT: Network Implementation Engineer 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Network Engineer
EMPLOYER: Leidos
LOCATION: Fort Meade, MD (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://leidos.wd5.myworkdayjobs.com/External/job/Fort-Meade-MD/Network-Engineer_R-00182962
EXCERPT: Network Engineer Fort Meade, MD posted: Posted 30+ Days Ago
---
TITLE: Network & Infrastructure Engineer
EMPLOYER: Versa Networks
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
APPLY_URL: https://jobs.jobvite.com/versa-networks/job/oPSivfwe
EXCERPT: Network & Infrastructure Engineer Network & Infrastructure Engineer
---
TITLE: Ethernet Hardware Product Application Engineer
EMPLOYER: Intel
LOCATION: India, Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/India-Bangalore/Ethernet-Hardware-Product-Application-Engineer_JR0283909
EXCERPT: Ethernet Hardware Product Application Engineer India, Bangalore posted: Posted 30+ Days Ago
---
TITLE: Hardware Engineer (Wireless)
EMPLOYER: Ubiquiti
LOCATION: Taipei (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-27
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/ubiquiti/jobs/4202757009
EXCERPT: Hardware Engineer (Wireless) Taipei About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you'll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Responsibilities: - Product hardware development, schematics design, layout review, BOM maintenance, functionality verification, planning of production testing, and failure analysis - Work with RF engineers to figure out performance issues of radios. - Review design derating and suggest design update due to DFM (design for manufacturing), DFA(design for assembly) and DFC (Design For Cost.) - Report projects' status and issue tracking to internal. - Survey and evaluate potential technologies for related products. Teardown and review new products in the market. Must-haves: - At least 3 years of relevant experience in network, server or Media ODM companies. - BS or MS in EE engineering. - Good working knowledge of system level architecture and switch applications, PoE etc.. - Can communicate with foreign engineers directly. - Basic knowledge of EE lab equipment including: oscilloscopes, multimeters, power supplies, etc. - Familiar with QCA/MTK platforms - Proficiency on PCB and schematic tools
---
TITLE: Hardware Engineer (Compute Server)
EMPLOYER: Ubiquiti
LOCATION: Taipei (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-18
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/ubiquiti/jobs/4087980009
EXCERPT: Hardware Engineer (Compute Server) Taipei About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you'll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Role Summary We are looking for a highly driven Hardware Engineer who is passionate about innovation and eager to build extraordinary products. In this role, you will help design next-generation Storage Server solutions, including high-density NAS, SAN, and unified storage systems with real global impact. You will collaborate directly with R&D labs across multiple countries, bringing your expertise, energy, and creativity into every stage of development. We value engineers who think beyond conventional solutions, embrace new challenges, and consistently engineer reliable, high-performance enterprise storage products. Responsibilities - Collaborate with a global cross-functional team-including industrial design, layout, mechanical, SI, BSP, thermal, DQA, and product management-to drive new product development from concept through mass production. - Lead or contribute to system architecture for storage servers, owning schematic capture, component selection, and PCB layout review to ensure ultra-high-speed signal integrity and robust high-power design. - Design and validate high-density storage
---
TITLE: Systems and Hardware Enabling Engineer
EMPLOYER: Intel
LOCATION: India, Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/India-Bangalore/Systems-and-Hardware-Enabling-Engineer_JR0282646-1
EXCERPT: Systems and Hardware Enabling Engineer India, Bangalore posted: Posted Today
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TITLE: Hardware Engineer
EMPLOYER: Raytheon Technologies
LOCATION: CA-AB-CALGARY-111 ~ 919 72nd Ave NE ~ 72ND AVE, Ste A (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/CA-AB-CALGARY-111--919-72nd-Ave-NE--72ND-AVE-Ste-A/Hardware-Engineer_01834341
EXCERPT: Hardware Engineer CA-AB-CALGARY-111 ~ 919 72nd Ave NE ~ 72ND AVE, Ste A posted: Posted 30+ Days Ago
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TITLE: Network Service Engineer
EMPLOYER: Kyndryl
LOCATION: Taipei, New Taipei City, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
K401_MATCH: yes (not source-backed)
APPLY_URL: https://kyndryl.wd5.myworkdayjobs.com/KyndrylProfessionalCareers/job/Taipei-New-Taipei-City-Taiwan/Network-Service-Engineer_R-61529
EXCERPT: Network Service Engineer Taipei, New Taipei City, Taiwan posted: Posted 7 Days Ago
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TITLE: M&D Hardware Engineer
EMPLOYER: GE Vernova
LOCATION: Lisburn (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Lisburn/Hardware-Engineer_R5036398-2
EXCERPT: M&D Hardware Engineer Lisburn posted: Posted 30+ Days Ago
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TITLE: Hardware Engineering Architect, Server/Remote/Hybrid
EMPLOYER: Jabil
LOCATION: Austin, TX (hybrid)
SALARY: Not disclosed
POSTED: 2026-05-27
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Austin-TX/System-Architect--Electrical_J2443094
EXCERPT: Hardware Engineering Architect, Server/Remote/Hybrid Austin, TX posted: Posted 16 Days Ago
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TITLE: Engineering
EMPLOYER: Texas Instruments
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-04
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers.ti.com/en/sites/CX/pages/engineering
EXCERPT: Engineering Engineering
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TITLE: System Hardware Engineer (Switch/NAS)
EMPLOYER: Ubiquiti
LOCATION: Taipei (unspecified)
SALARY: Not disclosed
POSTED: 2026-04-28
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/ubiquiti/jobs/4234000009
EXCERPT: System Hardware Engineer (Switch/NAS) Taipei About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you'll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Responsibilities - Lead hardware circuit design, schematic development, and PCB layout review to ensure robust system performance and manufacturability - Drive design verification, system bring-up, debugging, and root cause analysis, including RMA failure resolution - Own BOM management and support production to ensure smooth transition from NPI to mass production - Evaluate and integrate new technologies, components, and platforms to enhance product competitiveness - Participate across the full product lifecycle from NPI, MP to EOL - Collaborate with cross-functional teams including layout, component engineering, firmware, mechanical, power, thermal, QA, software, PM, ID, and compliance Qualifications - Bachelor's degree or above in Electrical Engineering or a related field - 5+ years of hands-on experience in system-level hardware design - Experience with networking products such as Ethernet gateway, switch, or NAS platforms - Solid understanding of Ethernet technologies including 802.3 PoE (PSE/PD), 1G/10G PHY, and switching or routing fundamentals
---
TITLE: Embedded Software Engineer - Ethernet Switching
EMPLOYER: NVIDIA Corporation
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-TX-Austin/Software-Engineer---Ethernet-Switching_JR2010826
EXCERPT: Embedded Software Engineer - Ethernet Switching 2 Locations posted: Posted 30+ Days Ago
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TITLE: Sr. Reliability Engineer - Hardware / Electrical
EMPLOYER: Medtronic
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 24 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://medtronic.wd1.myworkdayjobs.com/medtroniccareers/job/Mounds-View-Minnesota-United-States-of-America/Sr-Reliability-Engineer---Hardware---Electrical_R69254-1
EXCERPT: Sr. Reliability Engineer - Hardware / Electrical 2 Locations posted: Posted 2 Days Ago
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TITLE: Global Ultrasound Hardware Engineering Leader
EMPLOYER: Baker Hughes
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 12 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 8 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://bakerhughes.wd5.myworkdayjobs.com/BakerHughes/job/DE-NW-HURTH-ROBERT-BOSCH-STRASSE-3/Global-Ultrasound-Hardware-Engineering-Leader_R162029-1
EXCERPT: Global Ultrasound Hardware Engineering Leader 2 Locations posted: Posted 30+ Days Ago
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TITLE: Senior Mixed Signal IP Enablement and Debug Engineer
EMPLOYER: Intel
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Folsom/Senior-Mixed-Signal-IP-Enablement-and-Debug-Engineer_JR0284421
EXCERPT: Senior Mixed Signal IP Enablement and Debug Engineer 2 Locations posted: Posted 11 Days Ago
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TITLE: Electronics Hardware Engineer
EMPLOYER: Ubiquiti
LOCATION: Riga, Latvia (unspecified)
SALARY: EUR 3K-5K/mo
POSTED: 2026-03-03
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/ubiquiti/jobs/4077630009
EXCERPT: Electronics Hardware Engineer Riga, Latvia About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you'll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Role description: Ubiquiti Riga office is looking for an Electronics Hardware Engineer who shares our passion for innovation and technology and desire to do something extraordinary. You will participate in hardware design and hardware design audits/validations for UniFi products, like Ethernet Switches, Gateway routers, Access Points and Cameras with worldwide impact. Working closely with our R&D labs from different countries around the globe. We expect you to bring your experience, enthusiasm, and creativity wherever you go and put them into your work. You should think out of the box when finding solutions to new problems and make things work. Responsibilities: - Design and verify electronic PCBs (considering HW, SW, FW, ME, SI, thermal, and acoustic possible issues) ensuring they meet high standards of performance and reliability, and work closely with BSP and FW team to figure out issues and system bring up. - Be involved into product
---
TITLE: Electronics Design Engineer
EMPLOYER: Fuse Energy
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2024-10-30
APPLY_URL: https://apply.workable.com/j/B8CE72DA6F
EXCERPT: Electronics Design Engineer
---
TITLE: Connectivity Engineer
EMPLOYER: Anduril
LOCATION: Costa Mesa, California, United States (unspecified)
SALARY: $113K-$149K
POSTED: 2026-04-14
APPLY_URL: https://boards.greenhouse.io/andurilindustries/jobs/5107257007?gh_jid=5107257007
EXCERPT: Connectivity Engineer Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE ROLE As a Connectivity Engineer, you will work within the Deployment Operations organization and across the aisle with other engineering and operations groups to design and maintain connectivity solutions for Anduril's deployed suite of products.Underlying all deployments - whether it be aircraft or ground systems, Anduril products or those integrated, combat zones or close to home - is a diverse array of networking infrastructure connecting assets to one another and their operators. Data link topologies traverse infinite permutations of medium including fiber, MANET, military SATCOM, commercial LEO satellite internet, microwave backhaul, and commercial and private 3G/4G/5G cell networks. The Connectivity team is responsible for performing technical due diligence with customers (both internal and external) to ensure that the correct network architecture is selected for a given mission, assisting with sourcing of the appropriate
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TITLE: Band 5 - General Radiographer - Neath Port Talbot
EMPLOYER: Pulse Active Stations Network
LOCATION: Neath Port Talbot (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-07
APPLY_URL: https://job-boards.greenhouse.io/pulse/jobs/6481970003
EXCERPT: Band 5 - General Radiographer - Neath Port Talbot Neath Port Talbot
---
TITLE: Staff Electrical Engineer
EMPLOYER: Ouster Inc
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://ouster.applytojob.com/apply/kNbrmZu4lf/Staff-Electrical-Engineer
EXCERPT: Staff Electrical Engineer Staff Electrical Engineer
---
TITLE: Hardware Engineer
EMPLOYER: Ubiquiti
LOCATION: Taipei (unspecified)
SALARY: Not disclosed
POSTED: 2026-04-15
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/ubiquiti/jobs/4221782009
EXCERPT: Hardware Engineer Taipei About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you'll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Responsibilities: - Mainly focus for system schematic review and mechanical stacking review with mechanical engineers and PCB layout review with layout engineers. - Work with RF engineers to figure out performance issues of radios. - Review design derating and suggest design update due to DFM (design for manufacturing), DFA(design for assembly) and DFC (Design For Cost.) - Schematic and BOM maintain and review. - Write test plans for testing coverage, executes tests, and documents test results for projects. - Report projects' status and issue tracking to internal. - Teardown and review new products in the market. Qualifications: - BS or MS in EE engineering. - Junior/New grads are welcome. - Leadership in a project. - Good working knowledge of system level architecture and RF fundamentals. - Basic knowledge of EE lab equipment including: oscilloscopes, multimeters, power supplies, etc. - Good understanding of RF metrics. - Proficiency on PCB and
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TITLE: Lead LAN/WAN Engineer
EMPLOYER: CACI
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://caci.wd1.myworkdayjobs.com/External/job/Washington-DC-US/Lead-LAN-WAN-Engineer_303911-1
EXCERPT: Lead LAN/WAN Engineer 2 Locations posted: Posted 30+ Days Ago
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TITLE: Network and Software Engineer
EMPLOYER: Vodafone Group
LOCATION: Madrid, Spain (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://vodafone.eightfold.ai/careers/job/563018696124851
EXCERPT: Network and Software Engineer Madrid, Spain
---
TITLE: Load Balancer Network Engineer
EMPLOYER: Intel
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-23
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/Load-Balancer-Network-Engineer_JR0284296
EXCERPT: Load Balancer Network Engineer 2 Locations posted: Posted 20 Days Ago
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TITLE: Wireless Systems & Architecture Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Wireless-Systems---Architecture-Engineer_R-10061689
EXCERPT: Wireless Systems & Architecture Engineer Pune posted: Posted 30+ Days Ago
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TITLE: Hardware Applications Engineer
EMPLOYER: NXP Semiconductors
LOCATION: San Jose (Holger Way) (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/San-Jose-Holger-Way/Hardware-Applications-Engineer_R-10061640
EXCERPT: Hardware Applications Engineer San Jose (Holger Way) posted: Posted 30+ Days Ago
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TITLE: Senior EDA Tools Hardware Engineer
EMPLOYER: Intel
LOCATION: Virtual US (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-21
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Virtual-US/Senior-EDA-Tools-Hardware-Engineer_JR0284051
EXCERPT: Senior EDA Tools Hardware Engineer Virtual US posted: Posted 22 Days Ago
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TITLE: Network Service Engineer
EMPLOYER: Kyndryl
LOCATION: Taipei, New Taipei City, Taiwan (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
K401_MATCH: yes (not source-backed)
APPLY_URL: https://kyndryl.wd5.myworkdayjobs.com/KyndrylProfessionalCareers/job/Taipei-New-Taipei-City-Taiwan/Network-Service_R-61124
EXCERPT: Network Service Engineer Taipei, New Taipei City, Taiwan posted: Posted 17 Days Ago
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TITLE: Engineer, Networking, Routing & Switching
EMPLOYER: Magna International Inc.
LOCATION: Bangalore, IN (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://magna.wd3.myworkdayjobs.com/Magna/job/Bangalore-IN/Engineer--Networking--Routing---Switching_R00240487
EXCERPT: Engineer, Networking, Routing & Switching Bangalore, IN posted: Posted 30+ Days Ago
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TITLE: KERING Network Engineer
EMPLOYER: Kering
LOCATION: Paris, France (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers.kering.com/careers/job/563705889773694
EXCERPT: KERING Network Engineer Paris, France
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TITLE: R&D Electrical Hardware Engineer
EMPLOYER: Hewlett-Packard
LOCATION: Singapore, South West, Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://hp.eightfold.ai/careers/job/42203387
EXCERPT: R&D Electrical Hardware Engineer Singapore, South West, Singapore
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TITLE: Founding Hardware Engineer
EMPLOYER: Navient
LOCATION: San Francisco | [OnSite] (onsite)
SALARY: Not disclosed
POSTED: 2026-06-04
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.ashbyhq.com/navi/1d79f6cb-65c4-471d-8e99-70ed868d842d
EXCERPT: Founding Hardware Engineer San Francisco | [OnSite]
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TITLE: Principal Network Engineer
EMPLOYER: Elanco
LOCATION: UK - Hook (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
APPLY_URL: https://elanco.wd5.myworkdayjobs.com/External_Career/job/UK---Hook/Principal-Network-Engineer_R0024527-1
EXCERPT: Principal Network Engineer UK - Hook posted: Posted 30+ Days Ago
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