I'm looking for a job. I exported this list from FewerJobs.com - a curated job board.

Please:
1. Rank these jobs by fit for me, given my resume / skills.
2. Highlight the top 5 with a one-sentence rationale each.
3. Flag any concerns, including benefit values without source-backed evidence.
4. Suggest one or two filter changes I could make on FewerJobs to find more good matches.

Filters I applied:
- q: ON Semiconductor
- quality_floor: default
- match_401k_strict: true
- parental_strict: true
- non_birth_strict: true
- pto_strict: true
- include_older: false
- apply_url_verified: false
- page: 2
- per_page: 100
- sort: relevance

Jobs (100 total):

---
TITLE: Semiconductor Process Engineer
EMPLOYER: Teledyne Technologies
LOCATION: US - Camarillo, CA (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-26
K401_MATCH: yes (not source-backed)
APPLY_URL: https://flir.wd1.myworkdayjobs.com/flircareers/job/US---Camarillo-CA/Semiconductor-Process-Engineer_REQ34736
EXCERPT: Semiconductor Process Engineer US - Camarillo, CA posted: Posted 17 Days Ago
---
TITLE: Staff Engineer - ASIC SOC Verification
EMPLOYER: Micron Technology, Inc.
LOCATION: Hyderabad - Skyview, India (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-03
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Hyderabad---Skyview-India/Staff-Engineer---ASIC-SOC-Verification_JR103457
EXCERPT: Staff Engineer - ASIC SOC Verification Hyderabad - Skyview, India posted: Posted 9 Days Ago
---
TITLE: Import/Export Specialist (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Import-Export-Specialist--m-f-d----for-semiconductor-industry_R2617998
EXCERPT: Import/Export Specialist (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Semiconductor Web & Technical Documentation Writer (Location：Tokyo)
EMPLOYER: Infineon Technologies
LOCATION: Tokyo (Japan) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://infineon.eightfold.ai/careers/job/563808970288562
EXCERPT: Semiconductor Web & Technical Documentation Writer (Location：Tokyo) Tokyo (Japan)
---
TITLE: Engineer- DRAM, Advanced DRAM and EM Device/Cell Technology
EMPLOYER: Micron Technology, Inc.
LOCATION: Boise, ID - Main Site (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Engineer--DRAM-DEVICE---CELL-TECHNOLOGY_JR90433
EXCERPT: Engineer- DRAM, Advanced DRAM and EM Device/Cell Technology Boise, ID - Main Site posted: Posted 28 Days Ago
---
TITLE: New Product Program Manager- Semiconductor Materials
EMPLOYER: Entegris
LOCATION: Aurora, IL (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://entegris.wd1.myworkdayjobs.com/EntegrisCareers/job/Aurora-IL/New-Product-Program-Manager--Semiconductor-Materials_REQ-12359
EXCERPT: New Product Program Manager- Semiconductor Materials Aurora, IL posted: Posted Yesterday
---
TITLE: Director, SoC Design Engineering
EMPLOYER: Intel
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-04
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/Director--SoC-Design-Engineering_JR0284604
EXCERPT: Director, SoC Design Engineering 3 Locations posted: Posted 8 Days Ago
---
TITLE: Engineer, ASIC Physical Design
EMPLOYER: Micron Technology, Inc.
LOCATION: Minneapolis, MN (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Minneapolis-MN/Engineer--ASIC-Physical-Design_JR103247
EXCERPT: Engineer, ASIC Physical Design Minneapolis, MN posted: Posted 11 Days Ago
---
TITLE: Senior Physicist (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Senior-Physicist--m-f-d----for-semiconductor-industry_R2612258
EXCERPT: Senior Physicist (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Semiconductor Foundry Demand Business Strategist
EMPLOYER: Intel
LOCATION: Taiwan, Taipei (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Taiwan-Taipei/Semiconductor-Foundry-Demand-Business-Strategist_JR0280880
EXCERPT: Semiconductor Foundry Demand Business Strategist Taiwan, Taipei posted: Posted 30+ Days Ago
---
TITLE: Principal Systems/Mechanical Design Engineer, Semiconductor
EMPLOYER: Jabil
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Remote---USA/Principal-Systems-Mechanical-Design-Engineer_J2444904
EXCERPT: Principal Systems/Mechanical Design Engineer, Semiconductor 2 Locations posted: Posted 4 Days Ago
---
TITLE: Optical I/O Engineer
EMPLOYER: Etched
LOCATION: San Jose, CA, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
APPLY_URL: https://jobs.ashbyhq.com/etched/2eff3af0-ef7d-4dea-9e56-02227fb75edf
EXCERPT: Optical I/O Engineer San Jose, CA, United States About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary Etched is building dedicated optical I/O expertise to support the next generation of our inference systems. We are hiring a Founding Optical I/O Engineer to be our first dedicated optics hire and to own optical interconnect from architecture through bring-up. This is a hands-on senior IC role with a clear path to growing a team behind you. The right candidate combines deep technical credibility in silicon photonics, optical packaging, or high-speed optical signaling with the judgment to drive a complex technology from concept to working silicon. Key Responsibilities • Define and own Etched's optical I/O architecture from photonic engine design through system integration • Specify optical interconnect requirements (bandwidth density, reach, latency, power, packaging) derived from system-level constraints • Design and bring up the photonic integrated circuits, light sources, and optical packaging that make up Etched's optical I/O, working with foundry and assembly partners as needed • Drive co-design between optical I/O and the rest of the chip and
---
TITLE: Sales Representative for Semiconductor Business
EMPLOYER: 3M
LOCATION: JP, OSAKA, VIRTUAL (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://3m.wd1.myworkdayjobs.com/Search/job/JP-OSAKA-VIRTUAL/Sales-Representative-for-Semiconductor-Business_R01164211
EXCERPT: Sales Representative for Semiconductor Business JP, OSAKA, VIRTUAL posted: Posted 30+ Days Ago
---
TITLE: Senior Principle Engineer - SoC Design Verification
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principle-Engineer---SoC-Design-Verification_R-10061929
EXCERPT: Senior Principle Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago
---
TITLE: Staff Engineer, Semiconductor FAE for Analog (Location：Tokyo)
EMPLOYER: Infineon Technologies
LOCATION: Tokyo (Japan) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://infineon.eightfold.ai/careers/job/563808970234993
EXCERPT: Staff Engineer, Semiconductor FAE for Analog (Location：Tokyo) Tokyo (Japan)
---
TITLE: Senior Engineer - SoC Design Engineering
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer---SoC-Design-Engineering_R-10062288
EXCERPT: Senior Engineer - SoC Design Engineering Pune posted: Posted 30+ Days Ago
---
TITLE: Customer Service Representative (Semiconductor)
EMPLOYER: Qnity Electronics
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-21
APPLY_URL: https://qnity.wd503.myworkdayjobs.com/Jobs/job/Marlborough-Massachusetts/Customer-Service-Representative--Semiconductor-_251291W
EXCERPT: Customer Service Representative (Semiconductor) 2 Locations posted: Posted 22 Days Ago
---
TITLE: Multiphysics Simulation Scientist, Semiconductors
EMPLOYER: Periodic Labs
LOCATION: Menlo Park, California, United States (unspecified)
SALARY: $160K-$220K
POSTED: 2026-05-14
APPLY_URL: https://jobs.ashbyhq.com/periodic-labs/0d96f03c-8f08-44ae-a7cb-8c4bbc80976c
EXCERPT: Multiphysics Simulation Scientist, Semiconductors Menlo Park, California, United States About Periodic Labs The most important scientific discoveries of our time won't happen in a traditional lab. Periodic Labs is an AI and physical sciences company building state-of-the-art models to accelerate breakthroughs across materials, energy, semiconductors, and beyond. Backed by world-class investors and growing rapidly, we operate at the pace the frontier requires. Our team brings deep expertise, genuine ownership, and an insatiable drive to push the boundaries of what's scientifically possible. About the Role Periodic Labs is developing AI systems that can simulate physical science, verify predictions, and train on the full scientific method. A core part of that mission is building high-fidelity computational models of the processes happening inside our experimental and customer-facing systems, then making those models fast enough to support AI planning, autonomous lab operation, and engineering decision-making. We are looking for a Multiphysics Simulation Scientist to develop, validate, accelerate, and integrate models of semiconductor-relevant physical processes. This role is designed for someone with deep experience in multiphysics simulation, especially in domains such as advanced packaging, wafer mechanics, thin-film deposition, plasma processing, thermal transport, stress and warpage, capillary flow, electromagnetics, or related manufacturing processes. You will work across computational science, AI, automation, process engineering, and customer-facing teams. Your models will help us understand experimental systems, generate training data, guide process decisions, and deliver high-value engineering insights to semiconductor customers. What You'll Do - Build and apply multiphysics models for semiconductor-relevant systems, including thermal, mechanical, fluid, electromagnetic, plasma,
---
TITLE: Senior Digital IP Design Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Design-Engineer--f-m-d-_R-10063822
EXCERPT: Senior Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: Staff or Senior Staff Recruiter (Experienced in Semiconductor Industry)
EMPLOYER: Renesas Electronics
LOCATION: Shanghai, , China (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/RenesasElectronics/744000120307917-staff-or-senior-staff-recruiter-experienced-in-semiconductor-industry-
EXCERPT: Staff or Senior Staff Recruiter (Experienced in Semiconductor Industry) Shanghai, , China Company Description: Job Description: We are seeking a Senior Recruiter with strong semiconductor industry expertise, particularly within Integrated Device Manufacturer (IDM) environments. The role leads the full end-to-end recruitment lifecycle while ensuring an exceptional experience for candidates and hiring managers, supported by high standards of data accuracy and process excellence. The ideal candidate is a hands-on technical recruiter with deep experience managing complex semiconductor requisitions and operating effectively in a fast-paced, global environment. Key Responsibilities End-to-End Technical Recruitment Lead the full recruitment cycle from requisition intake to offer acceptance. Develop tailored sourcing strategies for hard-to-fill semiconductor roles across design, manufacturing, test, packaging, and operations. Sourcing & Screening Leverage multiple sourcing channels, semiconductor talent communities, niche platforms, referrals, and proactive market mapping. Build longlists and shortlists of qualified semiconductor professionals by applying role-specific technical filters across semiconductor HW & SW R&D IC design, fabrication, equipment engineering, process engineering, test development, and related fields. Candidate & Stakeholder Management Provide high-quality CV presentations and candidate summaries to hiring managers. Advise hiring teams on market conditions, candidate availability, competitive intelligence, and recruitment timelines. Ensure consistent communication and outstanding experiences for candidates throughout the process. Operation & System Excellence Manage all recruitment status updates in ATS, ensuring transparency and accuracy. Partner closely with cross-functional teams including HRBPs, HR Operations, and Business Leaders for compliance and smooth Process flows. Industry Expertise Demonstrate strong familiarity with semiconductor roles across the IDM value chain, including: Advanced
---
TITLE: Electronics Design Engineer
EMPLOYER: Fuse Energy
LOCATION: Location not specified (unspecified)
SALARY: Not disclosed
POSTED: 2024-10-30
APPLY_URL: https://apply.workable.com/j/B8CE72DA6F
EXCERPT: Electronics Design Engineer
---
TITLE: Equipment Engineer (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Equipment-Engineer--m-f-d----for-semiconductor-industry_R2517891
EXCERPT: Equipment Engineer (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Electrical Engineer, Hardware Systems
EMPLOYER: Etched
LOCATION: San Jose, CA, United States (unspecified)
SALARY: $150K-$275K
POSTED: 2026-03-17
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
APPLY_URL: https://jobs.ashbyhq.com/etched/61860739-5aa9-4f64-920d-f4c1cca71af8
EXCERPT: Electrical Engineer, Hardware Systems San Jose, CA, United States About Etched Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning. Etched is looking for exceptional hardware system engineers to join our team. The candidate will be responsible for schematic design for our accelerator module, and will help us pave the way for manufacturing scale. Key Responsibilities - Lead schematic design of the mezzanine card and base board for Etched's accelerator systems - Work with Signal Integrity, PCB, and Mechanical Engineering to solve system level design problems - Collaborate with ODMs/OEMs on system requirements, including bringup and validation plans - Understand datacenter customer requirements and ensure our servers meet them - Bring up of system base board and mezzanine card - Create and manage PCBA documentation including BOMs and special assembly processes - Define test plans and test equipment for bring-up and manufacturing You may be a good fit if you have (Must-have qualifications) - 5-10 years of experience in complex server/switch system design and development - Extensive experience on 100G Ethernet, PCIe Gen5, I2C, SPI, UART interfaces - Familiar with modern AI/datacenter system architecture - Proven track record of designing systems alongside silicon - Deep understanding of datacenter needs, especially with respect to
---
TITLE: Application Engineer (m/f/d) - semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Feldkirchen,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/FeldkirchenDEU/Application-Engineer--m-f-d----semiconductor-industry_R2620334
EXCERPT: Application Engineer (m/f/d) - semiconductor industry Feldkirchen,DEU posted: Posted 12 Days Ago
---
TITLE: Systems IC Architect
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-17
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Systems-IC-Architect_R-10063523
EXCERPT: Systems IC Architect 2 Locations posted: Posted 26 Days Ago
---
TITLE: Senior Hardware ASIC Arch/Design Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Hyderabad (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Hardware-ASIC-Arch-Design-Engineer_R-10061529
EXCERPT: Senior Hardware ASIC Arch/Design Engineer Hyderabad posted: Posted 30+ Days Ago
---
TITLE: Industrial Engineer (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Industrial-Engineer--m-f-d----for-semiconductor-industry_R2517890
EXCERPT: Industrial Engineer (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 30+ Days Ago
---
TITLE: Test Engineering
EMPLOYER: ON Semiconductor
LOCATION: Bangalore, Karnataka, India (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-21
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505542
EXCERPT: Test Engineering Bangalore, Karnataka, India Test Engineering
---
TITLE: Electrical Engineer (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Feldkirchen,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/FeldkirchenDEU/Electrical-Engineer--m-f-d----for-semiconductor-industry_R2616658
EXCERPT: Electrical Engineer (m/f/d) - for semiconductor industry Feldkirchen,DEU posted: Posted 12 Days Ago
---
TITLE: Senior DfT Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Caen (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Caen/Senior-DfT-Engineer_R-10062175
EXCERPT: Senior DfT Engineer Caen posted: Posted 30+ Days Ago
---
TITLE: DRAM Systems Architecture
EMPLOYER: Micron Technology, Inc.
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/DRAM-Systems-Architecture_JR96736
EXCERPT: DRAM Systems Architecture 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Semiconductor Safety Engineer
EMPLOYER: NVIDIA Corporation
LOCATION: US, CA, Santa Clara (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Semiconductor-Safety-Engineer_JR2014716
EXCERPT: Semiconductor Safety Engineer US, CA, Santa Clara posted: Posted 30+ Days Ago
---
TITLE: Topological Qubit Device Engineer
EMPLOYER: GlobalFoundries
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalfoundries.wd1.myworkdayjobs.com/External/job/USA---New-York---Malta/Topological-Qubit-Device-Engineer_JR-2602623
EXCERPT: Topological Qubit Device Engineer 2 Locations posted: Posted 7 Days Ago
---
TITLE: Senior Thin Films Module Engineer
EMPLOYER: ON Semiconductor
LOCATION: Hopewell Junction, NY, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505728
EXCERPT: Senior Thin Films Module Engineer Hopewell Junction, NY, United States Senior Thin Films Module Engineer
---
TITLE: Embedded Systems Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Roznov (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Roznov/Embedded-Systems-Engineer_R-10060346-1
EXCERPT: Embedded Systems Engineer Roznov posted: Posted 30+ Days Ago
---
TITLE: Industrial Engineer
EMPLOYER: ON Semiconductor
LOCATION: Hopewell Junction, NY, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505688
EXCERPT: Industrial Engineer Hopewell Junction, NY, United States Industrial Engineer
---
TITLE: Mechanical Design Engineer – Semiconductor Packaging
EMPLOYER: Intel
LOCATION: US, Arizona, Phoenix (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-27
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-Arizona-Phoenix/Mechanical-Design-Engineer---Semiconductor-Packaging_JR0284244
EXCERPT: Mechanical Design Engineer – Semiconductor Packaging US, Arizona, Phoenix posted: Posted 16 Days Ago
---
TITLE: Senior Engineer - NAND CMOS Device
EMPLOYER: Micron Technology, Inc.
LOCATION: Fab 10N/X, Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Fab-10NX-Singapore/Engineer-Sr-Eng-Principal-Eng---NAND-CMOS-Device_JR68215
EXCERPT: Senior Engineer - NAND CMOS Device Fab 10N/X, Singapore posted: Posted 30+ Days Ago
---
TITLE: Principle Analog Design Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Shanghai (JingAn) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Shanghai-JingAn/Principle-Analog-Design-Engineer_R-10063955
EXCERPT: Principle Analog Design Engineer Shanghai (JingAn) posted: Posted Yesterday
---
TITLE: Embedded Hardware Engineering Specialist
EMPLOYER: Eaton Corporation
LOCATION: Moon Township, Pennsylvania, USA, 15108 (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://eaton.eightfold.ai/careers/job/687235603268
EXCERPT: Embedded Hardware Engineering Specialist Moon Township, Pennsylvania, USA, 15108
---
TITLE: Senior Semiconductor Key Account Manager
EMPLOYER: Illinois Tool Works
LOCATION: Fremont - 94539 (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://itw.wd5.myworkdayjobs.com/External/job/Fremont---94539/Senior-Semiconductor-Key-Account-Manager_JR6599
EXCERPT: Senior Semiconductor Key Account Manager Fremont - 94539 posted: Posted 30+ Days Ago
---
TITLE: Internship - MicroLED application engineer
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Eindhoven/Internship---MicroLED-application-engineer_R-10062875
EXCERPT: Internship - MicroLED application engineer 2 Locations posted: Posted 30+ Days Ago
---
TITLE: Technical Support Engineer - Semiconductor Metrology
EMPLOYER: KLA Corporation
LOCATION: Boise, ID (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
K401_MATCH: yes (not source-backed)
APPLY_URL: https://kla.wd1.myworkdayjobs.com/Search/job/Boise-ID/Technical-Support-Engineer---Semiconductor-Metrology_2636407
EXCERPT: Technical Support Engineer - Semiconductor Metrology Boise, ID posted: Posted 7 Days Ago
---
TITLE: ASIC/FPGA Design Engineer
EMPLOYER: Intel
LOCATION: Malaysia, Penang (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Malaysia-Penang/ASIC-FPGA-Design-Engineer_JR0280623
EXCERPT: ASIC/FPGA Design Engineer Malaysia, Penang posted: Posted 30+ Days Ago
---
TITLE: Senior Hardware Engineer
EMPLOYER: Magna International Inc.
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://magna.wd3.myworkdayjobs.com/Magna/job/Timisoara-RO/Senior-Hardware-Engineer_R00239579
EXCERPT: Senior Hardware Engineer 2 Locations posted: Posted Today
---
TITLE: Semiconductor Foundry Demand Senior Business Strategist
EMPLOYER: Intel
LOCATION: Taiwan, Taipei (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Taiwan-Taipei/Semiconductor-Foundry-Demand-Senior-Business-Strategist_JR0280879
EXCERPT: Semiconductor Foundry Demand Senior Business Strategist Taiwan, Taipei posted: Posted 30+ Days Ago
---
TITLE: Sr Synthesis and Front-End Implementation Engineer
EMPLOYER: NXP Semiconductors
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Sr-Synthesis-and-Front-End-Implementation-Engineer_R-10063206
EXCERPT: Sr Synthesis and Front-End Implementation Engineer 3 Locations posted: Posted 28 Days Ago
---
TITLE: Regional Sector Head- Semiconductor and Cloud, Asia Pacific | Industrial Projects
EMPLOYER: Deutsche Post
LOCATION: Singapore, Central, Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-22
K401_MATCH: yes (not source-backed)
APPLY_URL: https://dpdhlgroup.avature.net/jobs/ApplicationMethods?jobId=354796&source=careers.dhl.com
EXCERPT: Regional Sector Head- Semiconductor and Cloud, Asia Pacific | Industrial Projects Singapore, Central, Singapore Role Title: Regional Sector Head- Semiconductor and Cloud, Asia Pacific | Industrial Projects . Location: Asia-Pacific . DHL Industrial Projects: DHL Industrial Projects (IP) is part of DHL Global ...
---
TITLE: Director of Engineering – ASIC Design
EMPLOYER: NXP Semiconductors
LOCATION: Hyderabad (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Director-of-Engineering---ASIC---SoC-Architecture---Design_R-10061209
EXCERPT: Director of Engineering – ASIC Design Hyderabad posted: Posted 30+ Days Ago
---
TITLE: Device Engineer
EMPLOYER: Intel
LOCATION: Ireland, Leixlip (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/Ireland-Leixlip/Device-Engineer_JR0284556
EXCERPT: Device Engineer Ireland, Leixlip posted: Posted 4 Days Ago
---
TITLE: Contamination Control Engineer (m/w/d) for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Process-Engineer---cleaning-processes--m-w-d--for-semiconductor-industry_R2519166
EXCERPT: Contamination Control Engineer (m/w/d) for semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: CDI - Ingénieur Device - Yield engineer F/H
EMPLOYER: STMicroelectronics
LOCATION: Rousset, France (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://stmicroelectronics.eightfold.ai/careers/job/563637170312589
EXCERPT: CDI - Ingénieur Device - Yield engineer F/H Rousset, France
---
TITLE: Senior Technical Marketing Engineer - EDA and Semiconductor
EMPLOYER: NVIDIA Corporation
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Technical-Marketing-Engineer---EDA-and-Semiconductor_JR2016782-1
EXCERPT: Senior Technical Marketing Engineer - EDA and Semiconductor 2 Locations posted: Posted 24 Days Ago
---
TITLE: Senior Technical Recruiter - Semiconductor Manufacturing
EMPLOYER: Semtech Corp
LOCATION: USA - Alhambra, CA (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://semtech.wd1.myworkdayjobs.com/SemtechCareers/job/USA---Alhambra-CA/Senior-Technical-Recruiter---Semiconductor-Manufacturing_REQ3402
EXCERPT: Senior Technical Recruiter - Semiconductor Manufacturing USA - Alhambra, CA posted: Posted 2 Days Ago
---
TITLE: Chip Design Engineer
EMPLOYER: NVIDIA Corporation
LOCATION: Israel, Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Tel-Aviv/Chip-Design-Engineer_JR2016289
EXCERPT: Chip Design Engineer Israel, Tel Aviv posted: Posted 30+ Days Ago
---
TITLE: Engineer - Post-Silicon Hardware Validation
EMPLOYER: Infineon Technologies
LOCATION: Ho Chi Minh City (Vietnam) | Ho Chi Minh, Vietnam (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://infineon.eightfold.ai/careers/job/563808961449921
EXCERPT: Engineer - Post-Silicon Hardware Validation Ho Chi Minh City (Vietnam) | Ho Chi Minh, Vietnam
---
TITLE: Technical Project Manager (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Feldkirchen,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/FeldkirchenDEU/Technical-Project-Manager--m-f-d----for-semiconductor-industry_R2614311
EXCERPT: Technical Project Manager (m/f/d) - for semiconductor industry Feldkirchen,DEU posted: Posted 12 Days Ago
---
TITLE: Supplier Account Manager Semiconductor Parts Cleaning
EMPLOYER: Applied Materials
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-03
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/Santa-ClaraCA/Supplier-Account-Manager-Cleaning_R2620508
EXCERPT: Supplier Account Manager Semiconductor Parts Cleaning 2 Locations posted: Posted 9 Days Ago
---
TITLE: Precision Analog Data Converter Design
EMPLOYER: NXP Semiconductors
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-25
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Precision-Analog-Data-Converter-Design_R-10063473
EXCERPT: Precision Analog Data Converter Design 2 Locations posted: Posted 18 Days Ago
---
TITLE: Semiconductor FAB Equipment Engineer - Qnity Electronics
EMPLOYER: Qnity Electronics
LOCATION: Marlborough, Massachusetts (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-13
APPLY_URL: https://qnity.wd503.myworkdayjobs.com/Jobs/job/Marlborough-Massachusetts/Semiconductor-FAB-Equipment-Engineer---Qnity-Electronics_251075W
EXCERPT: Semiconductor FAB Equipment Engineer - Qnity Electronics Marlborough, Massachusetts posted: Posted 30 Days Ago
---
TITLE: Senior Principal Engineer - SoC Design Verification
EMPLOYER: NXP Semiconductors
LOCATION: Pune (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principle-Engineer---SoC-Design-Verification_R-10062973
EXCERPT: Senior Principal Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago
---
TITLE: Supplier Quality Engineer (m/f/d) - semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Supplier-Quality-Engineer--m-f-d----semiconductor-industry_R2616596
EXCERPT: Supplier Quality Engineer (m/f/d) - semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Senior Thin Film Module Engineer
EMPLOYER: ON Semiconductor
LOCATION: Hopewell Junction, NY, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505726
EXCERPT: Senior Thin Film Module Engineer Hopewell Junction, NY, United States Senior Thin Film Module Engineer
---
TITLE: Senior SoC Chiplet Architect
EMPLOYER: Intel
LOCATION: 6 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/Senior-SoC-Chiplet-Architect_JR0284564
EXCERPT: Senior SoC Chiplet Architect 6 Locations posted: Posted 2 Days Ago
---
TITLE: Manufacturing Quality Engineer (m/f/d) - for semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Manufacturing-Quality-Engineer--m-f-d----for-semiconductor-industry_R2610421
EXCERPT: Manufacturing Quality Engineer (m/f/d) - for semiconductor industry Heimstetten,DEU posted: Posted 30+ Days Ago
---
TITLE: Sr. Applications Manager
EMPLOYER: Ametek
LOCATION: Work Location (Country) United States | Remote/Onsite Onsite (remote)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.ametek.com/job/Peabody-Sr_-Applications-Manager-MA-01960/1382822800/
EXCERPT: Sr. Applications Manager Work Location (Country) United States | Remote/Onsite Onsite The Senior Applications Manager plays a critical role in expanding our semiconductor business across the United States. This role partners closely with semiconductor OEMs and end users to solve complex application challenges through technically sound, high‑value solutions. As a trusted technical and commercial advisor, the Senior Applications Manager drives growth by translating customer requirements into differentiated solutions while leading a team of Applications Engineers, managing key accounts and contributing to strategic semiconductor opportunities. Responsibilities Manage and mentor a team of Applications Engineers, aligning technical execution, customer support, and resource deployment to drive successful application outcomes. Serve as the primary point of contact for assigned semiconductor OEM and end‑user accounts, building strong, long‑term relationships. Drive revenue growth with direct ownership of a multi-million dollar territory and contribute to a broader semiconductor opportunity pipeline. Manage large semiconductor OEM accounts, supporting executive alignment, design‑in activities, and preferred supplier positioning. Identify and develop new customers, applications, and growth opportunities within the U.S. semiconductor end‑user market. Support complex, high‑priority opportunities by partnering with sales teams and leadership on strategy and execution. Engage directly with customers to understand application needs, performance expectations, and system‑level
---
TITLE: Mergers & Acquisition, Lead Transaction Principal
EMPLOYER: Teradyne
LOCATION: North Reading, MA (unspecified)
SALARY: $220K-$352K
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 4 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 4 (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://jobs.teradyne.com/Teradyne/job/North-Reading-Mergers-&-Acquisition%2C-Lead-Transaction-Principal-MA/1389582400/
EXCERPT: Mergers & Acquisition, Lead Transaction Principal North Reading, MA ABOUT TERADYNE Teradyne is a global leader in automated test equipment and industrial automation, enabling customers across the semiconductor, electronics, and advanced manufacturing ecosystem to accelerate innovation and deliver high-quality products at scale. Across semiconductor test, system-level and wafer-level test, photonics, and adjacent semiconductor capital equipment, Teradyne operates at the intersection of deep engineering, complex supply chains, and long investment cycles. Strategic M&A plays a critical role in expanding Teradyne's served markets and strengthening long-term technology leadership. OPPORTUNITY OVERVIEW Teradyne is seeking a Lead Transaction Principal to own and execute mergers, acquisitions, divestitures, and strategic technology transactions across its semiconductor and semiconductor capital equipment businesses. This role carries end-to-end accountability for transactions from early assessment through execution, signing, and close, and requires close partnership with engineering, product, operational, and executive leadership. KEY RESPONSIBILITIES Own end-to-end M&A and strategic transactions across semiconductor test, wafer-level test, system-level test, and adjacent semiconductor capital equipment segments. Lead deal strategy, valuation framing, and execution from early evaluation through closing. Lead cross-functional deal teams spanning engineering, product management, operations, finance, legal, tax, HR, and IT. Evaluate target technologies,
---
TITLE: MGR PRIN, PROJECT
EMPLOYER: ON Semiconductor
LOCATION: Bucheon-si, Gyeonggi-do, Korea, Republic of (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505600
EXCERPT: MGR PRIN, PROJECT Bucheon-si, Gyeonggi-do, Korea, Republic of MGR PRIN, PROJECT
---
TITLE: Interconnect Hardware Characterization Engineer
EMPLOYER: NVIDIA Corporation
LOCATION: Israel, Yokneam (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Yokneam/Interconnect-Hardware-Engineer_JR2018752
EXCERPT: Interconnect Hardware Characterization Engineer Israel, Yokneam posted: Posted 11 Days Ago
---
TITLE: Materials science intern
EMPLOYER: PatSnap
LOCATION: Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-04-30
APPLY_URL: https://jobs.lever.co/patsnap/5a0dde57-d0f3-4e62-92f0-f6f60aceec5a
EXCERPT: Materials science intern Singapore We are seeking a detail-oriented candidate to structure and curate semiconductor process knowledge. You will translate complex technical content into standardised insights and collaborate cross-functionally to enhance data quality. We are seeking a detail-oriented candidate to structure and curate semiconductor process knowledge. You will translate complex technical content into standardised insights and collaborate cross-functionally to enhance data quality. Key Responsibilities: - Distill and author standardized Process Skills from annotated data and patent texts, covering process objectives, flow steps, key parameters, control points, common defects, alternative solutions, and evolution paths. - Participate in building a Semiconductor Process Knowledge Graph, mapping relationships among processes, materials, equipment, devices, and performance metrics. - Assist in designing process retrieval and recommendation logic; optimize knowledge presentation formats (e.g., process cards, flowcharts, decision trees, comparison matrices). - Work closely with product managers and algorithm teams to define knowledge-base schemas, quality standards, and update mechanisms. - Track cutting-edge semiconductor process trends (e.g., Advanced Packaging, GAA transistors, novel memory devices, power semiconductors) and continuously enrich knowledge content. Requirements： - Currently enrolled in a Bachelor's degree or higher in Materials Science and Engineering (or a related field such as Electrical or Chemical Engineering), with a solid understanding of semiconductor materials and processes. - Excellent technical writing and knowledge distillation skills; adept at abstracting complex process logic into clear, reusable, structured entries. - Familiar with full semiconductor flows (FEOL/BEOL) or a specific segment (logic, memory, advanced packaging, compound semiconductors). - Rigorous logical thinking; basic understanding of information
---
TITLE: Device Engineer (eInfochips)
EMPLOYER: Arrow Electronics
LOCATION: Peachtree City, Georgia, United States of America (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://arrow.wd1.myworkdayjobs.com/AC/job/US-GA-Peachtree-City-Georgia-Panasonic-Auto/Device-Engineer--eInfochips-_R243086/apply
EXCERPT: Device Engineer (eInfochips) Peachtree City, Georgia, United States of America Embrace the role of a Device Engineer and drive innovation in device development for leading platforms like Qualcomm, Android, and Linux. You'll design, develop, and validate modules, troubleshoot issues, and collaborate with top engineers. Shape the future of semiconductor design with eInfochips and accelerate your career in a dynamic, global environment.
---
TITLE: Investment Banking Vice President - Semiconductor
EMPLOYER: Citigroup Inc.
LOCATION: SAN FRANCISCO, California, United States of America (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://citi.eightfold.ai/careers/job/859033985888
EXCERPT: Investment Banking Vice President - Semiconductor SAN FRANCISCO, California, United States of America
---
TITLE: Senior VLSI Engineer
EMPLOYER: NVIDIA Corporation
LOCATION: 2 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Tel-Aviv/Senior-VLSI-Engineer_JR2019141
EXCERPT: Senior VLSI Engineer 2 Locations posted: Posted Today
---
TITLE: Senior Technology Transactions Attorney – Semiconductor Industry
EMPLOYER: GlobalFoundries
LOCATION: OFFSITE - USA - Texas (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-02
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalfoundries.wd1.myworkdayjobs.com/External/job/OFFSITE---USA---Texas/Senior-Technology-Transactions-Attorney---Semiconductor-Industry_JR-2600979
EXCERPT: Senior Technology Transactions Attorney – Semiconductor Industry OFFSITE - USA - Texas posted: Posted 10 Days Ago
---
TITLE: Interconnect Hardware Engineer
EMPLOYER: NVIDIA Corporation
LOCATION: Israel, Yokneam (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Yokneam/Interconnect-Hardware-Engineer_JR2018480
EXCERPT: Interconnect Hardware Engineer Israel, Yokneam posted: Posted 11 Days Ago
---
TITLE: Semiconductor Materials Section Manager 2
EMPLOYER: Northrop Grumman Corporation
LOCATION: United States-California-Manhattan Beach (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://ngc.eightfold.ai/careers/job/1340072086975
EXCERPT: Semiconductor Materials Section Manager 2 United States-California-Manhattan Beach
---
TITLE: Senior Digital IP Verification Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Verification-Engineer--f-m-d-_R-10063820
EXCERPT: Senior Digital IP Verification Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: R&D Electrical Hardware Engineer
EMPLOYER: Hewlett-Packard
LOCATION: Singapore, South West, Singapore (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://hp.eightfold.ai/careers/job/42203387
EXCERPT: R&D Electrical Hardware Engineer Singapore, South West, Singapore
---
TITLE: Subject Matter Expert – Cleanliness (m/f/d) for the semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/Subject-Matter-Expert---Cleanliness--m-f-d--for-the-semiconductor-industry_R2614006
EXCERPT: Subject Matter Expert – Cleanliness (m/f/d) for the semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Digital Engineer for Integrated Circuits (Graduate) (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-27
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Digital-Engineer-for-Integrated-Circuits--Graduate---f-m-d-_R-10063430
EXCERPT: Digital Engineer for Integrated Circuits (Graduate) (f/m/d) Munich posted: Posted 16 Days Ago
---
TITLE: Semiconductor Equipment Maintenance Technician
EMPLOYER: Micron Technology, Inc.
LOCATION: Manassas, VA - Fab 6 (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Manassas-VA----Fab-6/Semiconductor-Equipment-Maintenance-Technician_JR89925
EXCERPT: Semiconductor Equipment Maintenance Technician Manassas, VA - Fab 6 posted: Posted 30+ Days Ago
---
TITLE: Analog IC Layout Engineer
EMPLOYER: Neuralink
LOCATION: Fremont, California, United States (unspecified)
SALARY: $83K-$139K
POSTED: 2026-04-28
K401_MATCH: yes (not source-backed)
APPLY_URL: https://boards.greenhouse.io/neuralink/jobs/7718856003?gh_jid=7718856003
EXCERPT: Analog IC Layout Engineer Fremont, California, United States About Neuralink: We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world. Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. Job Description and Responsibilities: We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer, your responsibilities will include: - Crafting state-of-the-art layouts for mixed-signal and analog circuits - Amplifiers - Filters - Switched capacitor circuits - Oscillators - Data converters - Power management circuits - Reviewing layout floorplans and analyzing high-fidelity circuits with circuit engineers - Physical verification of custom IC mask layouts (LVS,
---
TITLE: Semiconductor Advanced Technology Principal Architect
EMPLOYER: Fluor Corporation
LOCATION: Greenville, US-SC, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers.fluor.com/careers/job/1099552464305
EXCERPT: Semiconductor Advanced Technology Principal Architect Greenville, US-SC, United States
---
TITLE: Senior Engineer - Semiconductor Fab Manufacturing / Automation Engineer
EMPLOYER: GlobalFoundries
LOCATION: Essex Junction (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-04
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalfoundries.wd1.myworkdayjobs.com/External/job/Essex-Junction/Senior-Engineer---Semiconductor-Fab-Manufacturing---Automation-Engineer_JR-2602164
EXCERPT: Senior Engineer - Semiconductor Fab Manufacturing / Automation Engineer Essex Junction posted: Posted 8 Days Ago
---
TITLE: Senior Principal Engineer, Analog Validation/Characterization
EMPLOYER: NXP Semiconductors
LOCATION: Noida (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-19
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Principal-Engineer--Analog-Validation-Characterization_R-10062839
EXCERPT: Senior Principal Engineer, Analog Validation/Characterization Noida posted: Posted 24 Days Ago
---
TITLE: Semiconductor Change Management Engineer
EMPLOYER: Micron Technology, Inc.
LOCATION: Boise, ID - Main Site (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Semiconductor-Change-Management-Engineer_JR98714
EXCERPT: Semiconductor Change Management Engineer Boise, ID - Main Site posted: Posted 30+ Days Ago
---
TITLE: FA Technician
EMPLOYER: ON Semiconductor
LOCATION: Dong Nai, Viet Nam (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
APPLY_URL: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505221
EXCERPT: FA Technician Dong Nai, Viet Nam FA Technician
---
TITLE: Principal Digital IP Design Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Principal-Digital-IP-Design-Engineer--f-m-d-_R-10063823
EXCERPT: Principal Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday
---
TITLE: Semiconductor Fab Automation Engineer (New College Grad)
EMPLOYER: GlobalFoundries
LOCATION: Essex Junction (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-18
K401_MATCH: yes (not source-backed)
APPLY_URL: https://globalfoundries.wd1.myworkdayjobs.com/External/job/Essex-Junction/Semiconductor-Fab-Automation-Engineer--New-College-Grad-_JR-2602163
EXCERPT: Semiconductor Fab Automation Engineer (New College Grad) Essex Junction posted: Posted 25 Days Ago
---
TITLE: Electronics Hardware Engineer
EMPLOYER: GE Vernova
LOCATION: Niskayuna (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Niskayuna/Electronics-Hardware-Engineer_R5041321-1
EXCERPT: Electronics Hardware Engineer Niskayuna posted: Posted 30+ Days Ago
---
TITLE: Senior Construction Site Manager - Semiconductor
EMPLOYER: Fluor Corporation
LOCATION: Greenville, US-NC, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers.fluor.com/careers/job/1099552464414
EXCERPT: Senior Construction Site Manager - Semiconductor Greenville, US-NC, United States
---
TITLE: Senior Hardware Verification Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Hyderabad (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Hardware-Verification-Engineer_R-10062078
EXCERPT: Senior Hardware Verification Engineer Hyderabad posted: Posted 30+ Days Ago
---
TITLE: R&D Mechanical Engineer (m/w/d) - semiconductor industry
EMPLOYER: Applied Materials
LOCATION: Heimstetten,DEU (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://amat.wd1.myworkdayjobs.com/External/job/HeimstettenDEU/R-D-Mechanical-Engineer--m-w-d----semiconductor-industry_R2614071
EXCERPT: R&D Mechanical Engineer (m/w/d) - semiconductor industry Heimstetten,DEU posted: Posted 12 Days Ago
---
TITLE: Quality Process Engineer - Semiconductor Manufacturing
EMPLOYER: Semtech Corp
LOCATION: USA - Colorado Springs - Federal (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://semtech.wd1.myworkdayjobs.com/SemtechCareers/job/USA---Colorado-Springs---Federal/Quality-Engineer_REQ3297
EXCERPT: Quality Process Engineer - Semiconductor Manufacturing USA - Colorado Springs - Federal posted: Posted 30+ Days Ago
---
TITLE: EMC Engineer (f/m/d)
EMPLOYER: NXP Semiconductors
LOCATION: Munich (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/EMC-Engineer--f-m-d-_R-10061511
EXCERPT: EMC Engineer (f/m/d) Munich posted: Posted 30+ Days Ago
---
TITLE: Senior Test Engineer - Semiconductor NPI
EMPLOYER: Semtech Corp
LOCATION: USA - San Diego, CA (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://semtech.wd1.myworkdayjobs.com/SemtechCareers/job/USA---San-Diego-CA/Senior-NPI-Test-Engineer_REQ3293
EXCERPT: Senior Test Engineer - Semiconductor NPI USA - San Diego, CA posted: Posted 4 Days Ago
---
TITLE: Senior Electronics Hardware Engineer
EMPLOYER: Caterpillar Inc.
LOCATION: Woodridge, Illinois (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-29
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cat.wd5.myworkdayjobs.com/caterpillarcareers/job/Woodridge-Illinois/Senior-Electronics-Hardware-Engineer_R0000371470
EXCERPT: Senior Electronics Hardware Engineer Woodridge, Illinois posted: Posted 14 Days Ago
---
TITLE: Senior Integrated Marketing Manager, Semiconductor
EMPLOYER: NVIDIA Corporation
LOCATION: US, CA, Santa Clara (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Integrated-Marketing-Manager--Semiconductor_JR2018833
EXCERPT: Senior Integrated Marketing Manager, Semiconductor US, CA, Santa Clara posted: Posted 4 Days Ago
---
TITLE: Junior Layout Engineer
EMPLOYER: NXP Semiconductors
LOCATION: Catania (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Junior-Layout-Engineer_R-10062969-1
EXCERPT: Junior Layout Engineer Catania posted: Posted 30+ Days Ago
---
TITLE: Senior Chip Design Engineer
EMPLOYER: NVIDIA Corporation
LOCATION: Israel, Tel Aviv (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Tel-Aviv/Chip-Design-Engineer_JR2003290
EXCERPT: Senior Chip Design Engineer Israel, Tel Aviv posted: Posted 2 Days Ago
---

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