I'm looking for a job. I exported this list from FewerJobs.com - a curated job board.

Please:
1. Rank these jobs by fit for me, given my resume / skills.
2. Highlight the top 5 with a one-sentence rationale each.
3. Flag any concerns, including benefit values without source-backed evidence.
4. Suggest one or two filter changes I could make on FewerJobs to find more good matches.

Filters I applied:
- q: Cadence Design Systems, Inc.
- quality_floor: default
- match_401k_strict: true
- parental_strict: true
- non_birth_strict: true
- pto_strict: true
- include_older: false
- apply_url_verified: false
- page: 10
- per_page: 100
- sort: relevance

Jobs (100 total):

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TITLE: Founding Product Designer
EMPLOYER: Listen Labs
LOCATION: San Francisco, CA, San Francisco, California, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-05
APPLY_URL: https://jobs.ashbyhq.com/listenlabs/a8d40c4f-2367-493e-bd41-f3987abb4d4b
EXCERPT: Founding Product Designer San Francisco, CA, San Francisco, California, United States TL;DR: We're hiring a Founding Product Designer to turn complex, week-long consulting projects into elegant, simple experiences powered by AI. If you love rethinking products from the ground up, turning complexity into beauty, and obsessing over every detail, we should talk. Background Listen Labs is an AI-powered research platform that helps teams uncover insights from customer interviews in hours - not months. We help customers analyze conversations, surface themes, and make faster, smarter product decisions. Company highlights - entirely product-led: - World-Class Team: Founded by serial entrepreneurs (previous AI exit), former co-founders, and talent from Jane Street, Twitter, Stripe, Affirm, Bain, Goldman Sachs, and many more Sequoia-backed startups (plus IOI/ICPC backgrounds). - Hypergrowth: We're a 30-person team backed by Sequoia, growing from $0 to a $10M run-rate in under a year. We move fast, care deeply about craft, and love working with people who take ownership. - Traction: Rapid growth across segments with enterprise wins at Google, Microsoft, Nestlé, and P&G. - Performance: Industry-leading win rate driven by a highly differentiated product. - Market Validation: Consistently winning customers across all segments with over six-figure lands that lead to quick expansions. - Viral Product: Interviews are shared with tens of thousands of viewers, fueling PLG, organic expansion, and daily inbound from Fortune 500s. What You'll Do - Lead end-to-end design across all customer-facing experiences, creating a seamless and intuitive journey from first touch to long-term engagement. - Define and evolve
---
TITLE: Printed Circuit Board (PCB) Designer
EMPLOYER: Viavi Solutions INC
LOCATION: Germantown, MD USA (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://viavisolutions.wd1.myworkdayjobs.com/careers/job/Germantown-MD-USA/Printed-Circuit-Board--PCB--Designer_250003946-1
EXCERPT: Printed Circuit Board (PCB) Designer Germantown, MD USA Summary: VIAVI (NASDAQ: VIAV) is a global provider of network test, monitoring and assurance solutions for telecommunications, cloud, enterprises, first responders, military, aerospace, and railway. VIAVI is also a leader in light management technologies for 3D sensing, anti-counterfeiting, consumer electronics, industrial, automotive, government and aerospace applications. We are the people behind the products that help keep the world connected at home, school, work, at play, and everywhere in between. VIAVI employees are passionate about supporting customer success and we welcome people who bring their best every day to the company - to question, to collaborate and to push for solutions that will delight our customers. Duties & Responsibilities: About the Role We are seeking a talented Printed Circuit Board (PCB) Designer to contribute to the development of next-generation designs. This role is ideal for a driven individual passionate about creating high-performance electronic assemblies and working within a collaborative, innovative environment. Key Responsibilities Design & Development : Design and develop high layer count PCB layouts for high-speed digital, radio frequency (RF), and high-power circuit assemblies. Apply contemporary printed circuit board (PCB) design methodologies to ensure superior signal integrity, efficient thermal management, and effective electromagnetic interference (EMI) mitigation. Cross-Functional Collaboration : Partner closely with hardware engineers, signal integrity experts, and mechanical designers to lead the optimization of PCB layouts, ensuring adherence to best practices for performance, reliability, and efficient manufacturing processes. Documentation & Compliance : Oversee the precise management of all PCB design data,
---
TITLE: Design Systems Engineer
EMPLOYER: Legora
LOCATION: Stockholm HQ | OnSite (onsite)
SALARY: Not disclosed
POSTED: 2026-06-10
APPLY_URL: https://jobs.ashbyhq.com/legora/9d37e6e0-15d9-4af1-b552-729bacbc4a2a
EXCERPT: Design Systems Engineer Stockholm HQ | OnSite ABOUT US Legora is redefining how legal work gets done. Not built for lawyers, built with them. We work alongside the world's best legal teams, who expect excellence, precision, and speed, and we hold ourselves to the same bar. Our AI-native workspace lets legal professionals move faster, think more clearly, and operate with sharper precision. By analysing thousands of documents in minutes and powering end-to-end workflows, we cut through complexity, teams can focus on what matters: judgment, strategy, and outcomes. 1,000+ customers across 50+ countries trust us, including Cleary Gottlieb, Goodwin, Linklaters, White & Case, Dentons, and Barclays. We've scaled to $100M+ in ARR, with teams across Europe, North America and APAC, and continue to expand through acquisitions including Qura, Walter AI and Graceview. We partner with world-class performers: including Aaron Judge and the New York Yankees, Ludvig Åberg (and his caddie), and campaigns featuring Jude Law. Joining Legora means three things. - We lean in: ownership over titles, outcomes over intentions. - We fight for excellence: high standards, direct, ego-free feedback. - We grow together: as a team and with our customers. Mission before ego. Everyone contributes. No one coasts. If you're driven by impact, pace, and raising the bar. This is the place. The role We're hiring a Design Systems Engineer to enable high-quality, lightning-fast implementation to support Legora's rapid growth. You'll join our growing design team and work alongside our existing Design Systems Engineer to build the foundations that keep
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TITLE: BIM Systems Engineer, Data Center Operations
EMPLOYER: Apple
LOCATION: Maiden, United States of America (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200661050/bim-systems-engineer-data-center-operations?team=CORSV
EXCERPT: BIM Systems Engineer, Data Center Operations Maiden, United States of America Apple is where individual imaginations gather together, committing to the values that lead to great work. Every new product we build, service we create, or Apple Store experience we deliver is the result of us making each other's ideas stronger. That happens because every one of us shares a belief that we can make something wonderful and share it with the world, changing lives for the better. It's the diversity of our people and their thinking that inspires the innovation that runs through everything we do. When we bring everybody in, we can do the best work of our lives. Here, you'll do more than join something, you'll add something. Our Data Center Engineering team is responsible for evaluating new technologies of IT servers, Data Center Infrastructure devices and systems. We are seeking a skilled BIM expert to to join our team and lead our CAD, BIM and engineering documentation systems management. We are looking for a team oriented and innovative person with a logical mindset, that is self-confident and forward-thinking, and is experienced in collaborating with the diversity of functions in the data center AEC space. As the BIM Systems Engineer, you will be the subject matter expert for the Data Center Engineering function; oversee the owner quality review of CAD drawings and BIM models on large, complex projects; provide leadership in documentation-related process development and re-engineering; and develop and maintain our BIM technologies roadmap. Develop process for
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TITLE: Communications Lead, Platform
EMPLOYER: Anthropic
LOCATION: New York City, NY; San Francisco, CA; Seattle, WA (unspecified)
SALARY: $265K-$295K
POSTED: 2026-06-03
APPLY_URL: https://job-boards.greenhouse.io/anthropic/jobs/5240487008
EXCERPT: Communications Lead, Platform New York City, NY; San Francisco, CA; Seattle, WA About Anthropic Anthropic's mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic is looking for a Communications Lead to own external communications for the Claude Platform, our API. The Claude Platform is how many of our customers put Claude to work, and this role shapes how that work is understood beyond Anthropic: from flagship product launches to the steady cadence of capability releases and developer-facing news. You'll sit on the Product Communications team and work day to day with the Platform product and engineering teams, Product Marketing, and Developer Relations. You should understand how developers and enterprises actually build with APIs and be comfortable engaging with developer tools and hold a clear point of view on what makes a product land. Key responsibilities - Own communications for the Claude Platform end to end: capability releases, product updates, and the steady cadence of developer-facing news - Build and maintain strong relationships with the journalists, newsletter writers, and creators covering AI platforms, enterprise software, and the API economy - Prepare Platform leaders to be effective spokespeople for press, podcasts, panels, and the smaller moments in between - Partner with Product and Engineering to align external
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TITLE: Power Electrical Engineer
EMPLOYER: Meta
LOCATION: Sunnyvale, CA (unspecified)
SALARY: $173K-$245K
POSTED: 2026-06-04
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.metacareers.com/jobs/1604420380769879/
EXCERPT: Power Electrical Engineer Sunnyvale, CA As a Hardware Electrical Engineer at Meta, you will design, develop, and integrate electrical systems for a wide range of applications, from next-generation consumer hardware to large-scale infrastructure. You will collaborate with cross-functional teams-including mechanical, optical, firmware, software, and manufacturing experts-to deliver impactful solutions. Your work may span the full product or system lifecycle, from early prototyping and feasibility studies to large-scale deployment. You will be part of an environment that values technical quality, rapid iteration, and creative problem-solving. Responsibilities: - Lead the electrical development of highly complex systems or multiple subsystems, driving technical direction and architecture - Define and drive electrical architecture, system integration, and technical strategy for major projects - Lead cross-functional design reviews, resolve technical conflicts, and ensure alignment across engineering disciplines - Drive innovation by identifying and implementing new technologies, processes, or methodologies to improve system/product performance, reliability, and features - Oversee hardware bring-up, debugging, and support for manufacturing, assembly, deployment, or operational readiness at scale - Evaluate and influence vendor and partner solutions, ensuring alignment with Meta's requirements and long-term strategy - Mentor and coach engineers at all levels - Operate autonomously, set direction for teams, and manage priorities across multiple projects or workstreams - Collaborate globally across distributed teams, influencing cross-organization initiatives and technical strategy - Champion operational clarity, compliance, and specialized requirements, driving continuous improvement and best practices Minimum qualifications: - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, and/or equivalent industry experience
---
TITLE: Sr. Hardware Design Engineer - x86 / GPU / HPC (27752)
EMPLOYER: Supermicro
LOCATION: US - HQ (US001) | Country United States | State California | City San Jose (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
APPLY_URL: https://jobs.supermicro.com/job/San-Jose-Sr_-Hardware-Design-Engineer-x86-GPU-HPC-%2827752%29-Cali/1333019000/
EXCERPT: Sr. Hardware Design Engineer - x86 / GPU / HPC (27752) US - HQ (US001) | Country United States | State California | City San Jose Job Req ID: 27752 About Supermicro: Supermicro® is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community. We seek talented, passionate, and committed engineers, technologists, and business leaders to join us. Job Summary: As a global leader in networking solution innovation, Super Micro Computer's mission is to develop and provide the market with end-to end computing solution and high performance networking products. We have an immediate need for a Sr. Hardware Design Engineer to join our talented and bright design team. The candidate will play a key role in the development process of in-house server motherboards, by working collaboratively with cross-functional engineering team as well as outside partners to ensure the robust design of the boards. The candidate must be self-motivated and possess a strong will to do great things, with a result-driven mindset to develop the most competitive and endurance board products. Essential Duties and Responsibilities: Lead schematic capture, layout review, BOM generation, debugging, and testing for server motherboards, add-on cards, and backplane products. Collaborate close
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TITLE: Lead Electrical Engineer, Smartglasses
EMPLOYER: Meta
LOCATION: Sunnyvale, CA (unspecified)
SALARY: $173K-$245K
POSTED: 2026-06-07
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.metacareers.com/jobs/3953667998272542/
EXCERPT: Lead Electrical Engineer, Smartglasses Sunnyvale, CA As a Hardware Electrical Engineer at Meta, you will design, develop, and integrate electrical systems for a wide range of applications, from next-generation consumer hardware to large-scale infrastructure. You will collaborate with cross-functional teams-including mechanical, optical, firmware, software, and manufacturing experts-to deliver impactful solutions. Your work may span the full product or system lifecycle, from early prototyping and feasibility studies to large-scale deployment. You will be part of an environment that values technical quality, rapid iteration, and creative problem-solving. Responsibilities: - Lead the electrical development of highly complex systems or multiple subsystems, driving technical direction and architecture - Define and drive electrical architecture, system integration, and technical strategy for major projects - Lead cross-functional design reviews, resolve technical conflicts, and ensure alignment across engineering disciplines - Drive innovation by identifying and implementing new technologies, processes, or methodologies to improve system/product performance, reliability, and features - Oversee hardware bring-up, debugging, and support for manufacturing, assembly, deployment, or operational readiness at scale - Evaluate and influence vendor and partner solutions, ensuring alignment with Meta's requirements and long-term strategy - Mentor and coach engineers at all levels - Operate autonomously, set direction for teams, and manage priorities across multiple projects or workstreams - Collaborate globally across distributed teams, influencing cross-organization initiatives and technical strategy - Champion operational clarity, compliance, and specialized requirements, driving continuous improvement and best practices Minimum qualifications: - Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, and/or equivalent industry
---
TITLE: Product Designer
EMPLOYER: Sierra
LOCATION: San Francisco, CA, San Francisco, CA, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-15
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
APPLY_URL: https://jobs.ashbyhq.com/sierra/ba780c1d-ebd7-45b8-8c99-12666af5bfa3
EXCERPT: Product Designer San Francisco, CA, San Francisco, CA, United States About us - At Sierra, we're creating a platform to help businesses build better, more human customer experiences with AI. We are primarily an in-person company based in San Francisco, with growing offices in Atlanta, New York, London, Paris, Madrid, Munich, Singapore, Japan, and Sydney. - We are guided by a set of values that are at the core of our actions and define our culture: Trust, Customer Obsession, Craftsmanship, Intensity, and Family. These values are the foundation of our work, and we are committed to upholding them in everything we do. - Our co-founders are Bret Taylor and Clay Bavor . Bret currently serves as Board Chair of OpenAI. Previously, he was co-CEO of Salesforce (which had acquired the company he founded, Quip) and CTO of Facebook. Bret was also one of Google's earliest product managers and co-creator of Google Maps. Before founding Sierra, Clay spent 18 years at Google, where he most recently led Google Labs. Earlier, he started and led Google's AR/VR effort, Project Starline, and Google Lens. Before that, Clay led the product and design teams for Google Workspace. What You'll Do: - Solve for the customer: We serve multiple stakeholders - People looking for help from our Agents via chat & voice, CX managers using our tools to monitor and improve the process, and Developers looking to build on and extend our platform. Each of these has a unique set of needs and product challenges.
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TITLE: Principal Engineer, Card Readers Team
EMPLOYER: Toast, Inc.
LOCATION: Remote, US (remote)
SALARY: $230K-$368K
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers.toasttab.com/jobs?gh_jid=7769188
EXCERPT: Principal Engineer, Card Readers Team Remote, US Toast creates technology to help restaurants and local businesses succeed in a digital world, helping business owners operate, increase sales, engage customers, and keep employees happy. As a Principal Engineer on the Card Readers team, you will be a technical leader responsible for designing, developing, and maintaining our POS payment integrations. You will work closely with hardware SDKs, the core POS application team, and other cross-functional stakeholders to drive technical decisions and define the target architecture for our payment solutions. Your expertise in high-throughput asynchronous JVM solutions, coupled with a deep understanding of mission-critical transactional processing, will be crucial in delivering robust and scalable solutions. A day in the life (Responsibilities) - Develop and execute technical strategies to solve complex business challenges, leveraging data and customer insights to prioritize impactful improvements. - Establish guiding technical and delivery principles that influence engineering practices across the broader engineering organization. - Architect, design, and develop robust, high-performance applications using Kotlin, optimized for security, speed, availability, and reliability. - Raise the bar as a high-throughput, hands-on code contributor modeling high standards. - Lead agile development processes, including sprint planning, daily stand-ups, and retrospectives. - Mentor and guide engineers, fostering a culture of continuous improvement, inclusivity, and engineering excellence. - Build and maintain strong partnerships across lines of business, aligning technical solutions with strategic objectives. - Leverage cutting edge AI tools to enhance your development workflow, improve velocity, and help pioneer new approaches to building - contributing to
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TITLE: Senior Design Engineer
EMPLOYER: Cisco
LOCATION: 2 Locations (unspecified)
SALARY: $131K-$182K
POSTED: 2026-05-22
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Allentown-Pennsylvania-US/Senior-Design-Engineer_2003189-1
EXCERPT: Senior Design Engineer 2 Locations The application window is expected to close on: 05/18/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team Join Cisco's Silicon Photonics group, where we combine deep expertise in analog, digital, and optical design to build the world's fastest networking solutions. We're a collaborative, innovative team passionate about pushing the limits of high-speed connectivity. Your Impact As a Hardware Design Engineer, you'll lead the design and development of next-generation 100G/200G/400G photonics ICs. From architecture to lab validation, you'll shape product direction, mentor engineers, and ensure Cisco stays at the forefront of optical networking innovation. Specific responsibilities include: Drive architecture, design, and verification of high-speed mixed-signal and photonics circuits. Define and document chip-level specifications and verification plans. Collaborate across optical, electrical, firmware, and manufacturing teams to deliver end-to-end solutions. Lead lab validation, debug, and yield improvement activities. Mentor and provide technical guidance to junior engineers. Minimum Qualifications Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience, or equivalent related work experience Master's or PhD in Electrical Engineering (or related field). Experience in analog/mixed-signal IC design for high-speed system. Lab validation and test experience with high-speed equipment. Experience writing code with Python or C for automation and/or analysis. Expertise with design tools (Cadence Virtuoso, Spectre, Calibre, etc.). Preferred Qualifications Deep expertise in photonics and high-speed datapath circuits (modulators,
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TITLE: EE Design & Test Engineer
EMPLOYER: Apple
LOCATION: San Francisco Bay Area, United States of America (unspecified)
SALARY: $120K-$210K
POSTED: 2026-05-20
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200664207/ee-design-test-engineer?team=HRDWR
EXCERPT: EE Design & Test Engineer San Francisco Bay Area, United States of America The Motion Sensing Hardware team at Apple develops sophisticated test systems and instrumentation that support cutting-edge sensing technologies in consumer products. This role offers an opportunity to join a team that designs, builds, and validates the custom hardware infrastructure used to characterize inertial, pressure, and magnetic sensors throughout the product development lifecycle. We invite motivated and innovative electrical engineers to help create the test instrumentation that gives our team unmatched insight into sensor performance. As a Module Test Instrumentation & Automation Engineer, you will be responsible for designing the electronic hardware and supporting software that underpin the team's sensor characterization capability. Your work will span schematic design, PCB layout oversight, and the software layers that connect custom test hardware to the team's broader automation infrastructure. You will bring together deep electrical engineering fundamentals and strong software development skills to deliver instrumentation that is precise, reliable, and tightly integrated with the team's characterization workflows. This position requires a versatile electrical engineer with hands-on experience designing analog and mixed signal circuits, overseeing PCB layout for precision measurement applications, and writing software to connect custom test hardware to the team's automation and data collection pipelines. You will own the design of sensor evaluation boards and test fixtures from schematic through bring-up, ensuring that hardware choices - signal conditioning topology, power architecture, interface selection - directly serve the accuracy and throughput demands of sensor characterization. You will develop the software interfaces
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TITLE: Sensing Hardware - Algorithm Systems Engineering Leader
EMPLOYER: Apple
LOCATION: San Francisco Bay Area, United States of America (unspecified)
SALARY: $208K-$365K
POSTED: 2025-10-18
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200626643/sensing-hardware-algorithm-systems-engineering-leader?team=HRDWR
EXCERPT: Sensing Hardware - Algorithm Systems Engineering Leader San Francisco Bay Area, United States of America Join the Sensing Hardware Architecture team and define how billions of users interact with Apple's most iconic products, including iPhone, Apple Watch, and Vision Pro. Our team pioneers the sensor technologies that enable magical new experiences, turning physical actions like touch and motion into seamless digital responses. We are seeking a leader for our world-class algorithms team-the group that develops and delivers the foundational algorithms that bring our sensor hardware to life. Its unique strength lies in a pragmatic and forward-thinking philosophy: we artfully blend state-of-the-art AI/ML techniques with traditional signal processing and estimation theory to build the absolute best solution for every challenge. Whether the optimal approach is a classic algorithm, a deep neural network, or a sophisticated hybrid, our focus is always on delivering unparalleled performance and quality at scale. We embrace the most advanced tools from the AI/ML community to rapidly develop, optimize, and validate all of our solutions. As the leader of this team, you will have a rare opportunity to navigate this dynamic technical landscape. You will set the vision for how we solve sensing problems, guiding your team to make critical architectural decisions that have a massive impact. Your leadership will directly influence the next generation of Apple products, deploying solutions at a scale that is second to none. In this role, you will lead, grow, and mentor a world-class team of algorithm engineers, fostering a culture of innovation
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TITLE: Revenue Operations Manager
EMPLOYER: Viant Technology Inc
LOCATION: Chicago, Illinois, United States; New York, New York, United States (unspecified)
SALARY: $110K-$125K
POSTED: 2026-04-27
APPLY_URL: https://job-boards.greenhouse.io/vianttechnology/jobs/4204927009
EXCERPT: Revenue Operations Manager Chicago, Illinois, United States; New York, New York, United States WHAT YOU'LL DO Viant is seeking a strategic and data-driven Revenue Operations Manager to help scale and optimize our go-to-market engine. In this role, you will partner closely with Sales Leadership and cross-functional stakeholders to drive operational excellence across pipeline management, forecasting, compensation, and performance analytics. This is a high-impact opportunity to shape how revenue is planned, measured, and executed across the organization. You will act as a trusted advisor to GTM leaders, bringing structure, insights, and rigor to decision-making while proactively identifying opportunities to improve efficiency and drive growth. From designing scalable compensation plans to enhancing our reporting infrastructure and tech stack, you'll play a critical role in ensuring our revenue organization operates with precision and clarity. THE DAY-TO-DAY Revenue Operations Leadership - Partner with Director of Revenue Operations to own and evolve core RevOps processes including pipeline management, forecasting, territory planning, and deal execution. - Partner closely with Sales Leadership to ensure pipeline health, forecast accuracy, and a consistent operating cadence. - Serve as a trusted operational advisor to GTM leaders, proactively identifying risks and opportunities. - Design, build, and maintain variable compensation plans that align sales outcomes with company objectives. - Manage MBOs, SPIFFs, and STIPs; assess effectiveness and recommend improvements. Data, Systems & Tooling - Own data accuracy, governance, and hygiene across Salesforce and the broader GTM tech stack, including Highspot and Gong. - Build and maintain reporting infrastructure to support compensation, forecasting,
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TITLE: Hardware Engineer
EMPLOYER: Arrow Financial CORP
LOCATION: EG-Cairo, Egypt (Maadi Technology Park) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-09
APPLY_URL: https://arrow.wd1.myworkdayjobs.com/AC/job/EG-Cairo-Egypt-Maadi-Technology-Park/Hardware-Engineer_R243994-1
EXCERPT: Hardware Engineer EG-Cairo, Egypt (Maadi Technology Park) Position: Hardware Engineer Job Description: COMPANY PROFILE eInfochips - An Arrow Company (www.einfochips.com) is a pure-play Product Engineering Services company, with a focus on product innovation and solution accelerators in the Global Engineering & R&D Services Market. eInfochips provides solutions across the product stack - Silicon, Hardware, Embedded Software, Applications, Industrial Design, and User Interfaces. eInfochips has over 1700+ professionals, world-class processes, and infrastructure spread across 8 delivery centers in Egypt (Cairo), India (Ahmedabad, Pune, Bangalore, Chennai). The Company has been debt-free, cash-positive, and has shown 20%+ Y on Y growth over the past 4 years. With a strong focus in verticals like Avionics, Retail, Security & Surveillance, and Semiconductor, along with a clientele of 30+ Billion Dollar Enterprises, eInfochips is poised to grow at over 25% per annum. We are known for our vibrant and dynamic workplace, where personal and professional fulfillment and company success go hand in hand. We take pride in creating exceptional work experiences, encouraging innovation, and being involved with our employees, customers, and communities. We have been repeatedly recognized by Gartnet/Frost & Sullivan/Zinnov/Deloitte/NASSCOM for variety of our cutting-edge work. KEY RESPONSIBILITIES *Develop a requirement definition aligned with the customer *Drafting schematic and layout in an accurate way *Test, verification, characterization, and documentation according to procedures and standards *Responsible for managing the time estimation of design activities *Hardware support for any new development and improving the existing designs and new ones. *Running and optimizing EMC measurements and duration tests
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TITLE: RTL Design Engineer
EMPLOYER: Apple
LOCATION: Irvine, United States of America (unspecified)
SALARY: $172K-$302K
POSTED: 2025-12-22
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200638701/rtl-design-engineer?team=HRDWR
EXCERPT: RTL Design Engineer Irvine, United States of America At Apple, we work every day to craft products that enrich people's lives. If you're passionate about taking on unsolved challenges, we have a great opportunity for a results-oriented and highly motivated RTL Design Engineer. This is an exciting position in the world class Apple mixed-signal silicon design team! This role will build upon your solid foundation in digital logic circuits while introducing mixed-signal and analog circuit design and features. You will work with a variety of flows fundamental to modern silicon engineering: modeling and integrating high-performance mixed-signal and analog IPs into high-speed digital circuits, ensuring formal equivalence between custom designs and their abstract representations. This is an excellent opportunity to gain valuable experience in software methods and analysis, which are increasingly crucial across the semiconductor industry. As a member of our dynamic team, you will have the exceptional opportunity to help create the next generation of products that will delight and inspire millions of Apple customers every day. You will work to specify, design, verify, and support lab bring-up of sophisticated digital and mixed-signal circuits with signal processing capabilities. In this role, you will be responsible for specifying and/or micro-architecting digital and signal processing blocks in sophisticated mixed-signal circuits. You will be responsible for RTL coding of blocks specified by you or others, including implementation of DSP algorithms. You will also participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with
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TITLE: Senior Physical Design Engineer
EMPLOYER: TensTorrent
LOCATION: Tokyo, Japan (unspecified)
SALARY: Not disclosed
POSTED: 2026-04-20
APPLY_URL: https://job-boards.greenhouse.io/tenstorrent/jobs/5104550007
EXCERPT: Senior Physical Design Engineer Tokyo, Japan Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a senior physical design engineer to join Tenstorrent's AIDC Yayoi project, driving chiplet-level and chip-top physical implementation of high-performance CPU-based SoCs in a cutting-edge system-in-package environment. This role is hybrid, based out of Tokyo, Japan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are - You have a Bachelor's, Master's, or PhD in electrical engineering, computer engineering, or computer science, with extensive experience (typically 10+ years) in SoC/ASIC/GPU/CPU physical design on taped-out designs. - You are highly skilled with industry-standard tools (e.g., Synopsys/Cadence) and physical verification, and comfortable scripting in TCL and at least one other language (e.g., Python). - You are a strong collaborator who can guide and mentor junior engineers, communicate clearly with global
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TITLE: Electrical Design Engineer
EMPLOYER: Podium Automation
LOCATION: New York City, New York, United States (unspecified)
SALARY: $70K-$100K
POSTED: 2026-05-26
RELOCATION_ASSISTANCE: no (not source-backed)
APPLY_URL: https://jobs.ashbyhq.com/podium-automation/7a73c593-985a-4de8-8f3c-6c517a614355
EXCERPT: Electrical Design Engineer New York City, New York, United States Podium Automation is reimagining industrial control panel manufacturing through software-enabled design and automated fabrication. We're building technology to create a new industrial supply chain - reducing lead times for critical electrical equipment from months to days. Backed by top-tier investors including a16z's American Dynamism fund, SV Angel, and Banter Capital, we're growing rapidly and looking for exceptional people to help us scale. We are seeking a full-time Electrical Design Engineer to work across control panel design, build, and test. You will have the opportunity to work across the end-to-end process in a variety of operations from electrical design to enclosure modification through final testing. What You'll Do - Translate customer design requirements into build-ready UL 508A compliant electrical schematics - Build out Podium's component database and standardized symbol library - Test, implement, and provide feedback on new software tools that help speed up the schematic creation process - Support our operations in answering technician questions and turning those questions into process improvement sprints - Support the automation of the panel build process through testing of new methods and tools, and ensuring necessary information is digitized during the design phase. Who You Are There are 4 values that all Podium employees are expected to demonstrate (albeit imperfectly): - Customer Obsession : We sit on the same side of the table as our customers and build things to solve their biggest problems - High Integrity : We strive to be honest, transparent,
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TITLE: PCB Design Engineer, Sr Staff
EMPLOYER: d-Matrix
LOCATION: Santa Clara, Santa Clara, Ca, Ca, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-04-22
APPLY_URL: https://jobs.ashbyhq.com/d-matrix/9e4343ae-f0bf-44e7-8242-8f9f21849fa8
EXCERPT: PCB Design Engineer, Sr Staff Santa Clara, Santa Clara, Ca, Ca, United States At d-Matrix , we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive , and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together , we can help shape the endless possibilities of AI. Sr. Staff PCB Layout Design Engineer Location: Santa Clara, CA (Hybrid/On-site) About the Role As a Sr. Staff PCB Layout Design Engineer , you will be the lead architect of the physical medium that connects our breakthrough AI silicon to the world. At d-Matrix, our "Corsair" platforms push the boundaries of signal density and power delivery. You will own the layout of high-complexity, high-layer-count PCBAs (20+ layers), ensuring that 112G/224G SerDes signals remain pristine and that thousands of Amps are delivered across the board with minimal loss. In this senior leadership role, you will also serve as the custodian of our Design Methodology , driving the automation, tooling, and rigorous constraint management processes that allow us to scale our hardware development with high precision and speed. Key Responsibilities • Full-Cycle System Layout: Lead the layout for high-complexity AI accelerator cards (PCIe form
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TITLE: Product Designer 2 - Wearables
EMPLOYER: Garmin
LOCATION: Olathe, Kansas (remote)
SALARY: Not disclosed
POSTED: 2025-10-01
APPLY_URL: https://careers-garmin.icims.com/jobs/17244/login
EXCERPT: Product Designer 2 - Wearables Olathe, Kansas Overview Garmin is seeking a full-time Product Designer 2 to join our Outdoor and Fitness Wearable group at Garmin's U.S. headquarters in the Greater Kansas City area. You will be a part of a team designing user experiences for a highly diverse range of Garmin wearables. Your designs will help users explore the great outdoors, stay connected and enable rescues in remote locations, live healthier lifestyles, enable performance athletes to train more effectively, and keep parents connected with their kids. In this UX-focused role, you will be paired with a design mentor and be responsible for understanding, ideating, and creating compelling, well-crafted designs for new features and functions for many of our products. Success involves understanding and applying fundamental usability and user-centered design principles, working amongst many groups and stakeholders to hone your design, and guiding software user interface development, working closely with design leadership, software engineers, graphic artists, product managers, and other stakeholders of your assigned projects. Essential Functions Research, design and prototype user experiences for new features and products in a timely and organized manner Communicate research and designs using mockups, story boarding, visual presentations and writing behavioral documentation Produce creative, simple and highly usable solutions for how products interact in response to human behavior Document clear, organized solutions that are highly understandable in flow, function and status by stakeholders, engineers, and unfamiliar eyes Work closely with design leadership, software engineers, graphic artists, product managers and other stakeholders of the assigned
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TITLE: Senior DFT Engineer, Architecture
EMPLOYER: TensTorrent
LOCATION: Tokyo, Japan (unspecified)
SALARY: Not disclosed
POSTED: 2024-11-05
APPLY_URL: https://job-boards.greenhouse.io/tenstorrent/jobs/4556198007
EXCERPT: Senior DFT Engineer, Architecture Tokyo, Japan Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Job title Senior DFT Engineer Job description We are looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design. Your responsibilities Integrate and verify test features in digital designs for effective manufacturing testing and silicon debug. Key responsibilities include: - Building entire chip-level DFT strategies - Inserting DFTs, including scan chains, memory BIST, and JTAG - Collaborating with RTL, physical design, and verification teams for testability throughout the design flow - Scripting and automating DFT flows using industry-standard EDA tools (e.g., Cadence, Synopsys, Siemens) - Running and analyzing
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TITLE: Health Sensing EE - Engineering Manager
EMPLOYER: Apple
LOCATION: Cupertino, United States of America (unspecified)
SALARY: $198K-$343K
POSTED: 2025-12-18
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200637323/health-sensing-ee-engineering-manager?team=HRDWR
EXCERPT: Health Sensing EE - Engineering Manager Cupertino, United States of America The Health Sensing team conceives, designs, develops, and launches innovative and exciting health sensing technologies for Apple's future products, while expanding an impactful new domain for the company. We face challenges everyday that require sharp problem solving skills. You will lead the development of next generation health sensors, in a highly cross functional environment, while we deliver inspiring technology and information to users on the most critical area of their lives - their health! A proactive electrical engineering leader with a passion for solving complex technical challenges and building and developing high performing engineering teams. You have a proven ability to influence cross-functional teams and decisions through complex technical issues. You will be applying your expertise in system, analog and digital circuit design to design critical health sensors and evaluate coexistence, sensor performance and product integration. You'll be engaged in the entire sensor development lifecycle, from concept to mass production. You are a strategic thinker with a strong foundation of analog circuit fundamentals and a proven track record of taking electrical designs into mass production. You're a collaborative teammate with excellent interpersonal skills and a drive to push the boundaries of innovation. You have experience representing your team's work in high-stakes forums, shaping technical strategy through persuasive communication, and mentoring others in presenting their work effectively. Lead the Health Sensing electrical engineering team in the design, development, and integration of Health sensors for Apple products from concept to high-volume
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TITLE: Senior Mechanical Design Engineer - Flexible Instruments
EMPLOYER: Intuitive Surgical, Inc.
LOCATION: Sunnyvale, CA, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
PARENTAL_LEAVE_WEEKS: 8 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 8 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/Intuitive/744000094063806-senior-mechanical-design-engineer-flexible-instruments
EXCERPT: Senior Mechanical Design Engineer - Flexible Instruments Sunnyvale, CA, United States Company Description: At Intuitive, we are united behind our mission: we believe that minimally invasive care is life-enhancing care. Through ingenuity and intelligent technology, we expand the potential of physicians to heal without constraints. As a pioneer and market leader in robotic-assisted surgery, we strive to foster an inclusive and diverse team, committed to making a difference. For more than 25 years, we have worked with hospitals and care teams around the world to help solve some of healthcare's hardest challenges and advance what is possible. Intuitive has been built by the efforts of great people from diverse backgrounds. We believe great ideas can come from anywhere. We strive to foster an inclusive culture built around diversity of thought and mutual respect. We lead with inclusion and empower our team members to do their best work as their most authentic selves. Passionate people who want to make a difference drive our culture. Our team members are grounded in integrity, have a strong capacity to learn, the energy to get things done, and bring diverse, real world experiences to help us think in new ways. We actively invest in our team members to support their long-term growth so they can continue to advance our mission and achieve their highest potential. Join a team committed to taking big leaps forward for a global community of healthcare professionals and their patients. Together, let's advance the world of minimally invasive care. Job Description:
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TITLE: Senior/Staff Facilities Electrical Systems Engineer- Operations & Design
EMPLOYER: Micron Technology, Inc.
LOCATION: Boise, ID - Main Site (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Senior-Staff-Facilities-Electrical-Systems-Engineer--Operations---Design_JR98482
EXCERPT: Senior/Staff Facilities Electrical Systems Engineer- Operations & Design Boise, ID - Main Site posted: Posted 30+ Days Ago
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TITLE: Senior Quality Engineer
EMPLOYER: Aurora Innovation, Inc.
LOCATION: Mountain View, California (unspecified)
SALARY: $150K-$240K
POSTED: 2026-02-19
APPLY_URL: https://aurora.tech/jobs/8385086002?gh_jid=8385086002
EXCERPT: Senior Quality Engineer Mountain View, California Who we are Aurora's mission is to deliver the benefits of self-driving technology safely, quickly, and broadly. The Aurora Driver will create a new era in mobility and logistics, one that will bring a safer, more efficient, and more accessible future to everyone. At Aurora, you will tackle massively complex problems alongside other passionate, intelligent individuals, growing as an expert while expanding your knowledge. For the latest news from Aurora, visit aurora.tech or follow us on LinkedIn . Aurora hires talented people with diverse backgrounds who are ready to help build a transportation ecosystem that will make our roads safer, get crucial goods where they need to go, and make mobility more efficient and accessible for all. We are seeking a highly skilled and experienced QMS Quality Engineer to join our Hardware Safety and Quality team. The successful candidate will play a critical role in establishing, maintaining, and improving our Quality Management System (QMS) to ensure compliance with ISO 9001 standards in the design, development, and operation of hardware products. This position requires a detail-oriented professional with a proven track record in quality engineering and a strong understanding of ISO standards, particularly in the hardware sector. In this role, you will - Develop, implement, and maintain the Quality Management System (QMS) in alignment with ISO 9001 standards for hardware product design and development processes. - Collaborate with cross-functional teams including design, engineering, production, and operations to ensure quality standards are integrated throughout the product
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TITLE: Design Director, Core Experience
EMPLOYER: Block, Inc.
LOCATION: Bay Area, CA, United States of America (unspecified)
SALARY: $304K-$457K
POSTED: 2025-11-24
PARENTAL_LEAVE_WEEKS: 16 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: http://block.xyz/careers/jobs/4980557008?gh_jid=4980557008
EXCERPT: Design Director, Core Experience Bay Area, CA, United States of America Block is one company built from many blocks, all united by the same purpose of economic empowerment. The blocks that form our foundational teams - People, Finance, Counsel, Hardware, Information Security, Platform Infrastructure Engineering, and more - provide support and guidance at the corporate level. They work across business groups and around the globe, spanning time zones and disciplines to develop inclusive People policies, forecast finances, give legal counsel, safeguard systems, nurture new initiatives, and more. Every challenge creates possibilities, and we need different perspectives to see them all. Bring yours to Block. The Role The Core Experience design team shapes the future of Cash App by defining the fundamental flows, frameworks, and surfaces that tens of millions of customers rely on every day. We are a team that drives the strategic step-changes pushing our product forward. As the Design Lead for Core Experience, you will report to Cam Worboys (Head of Product Design, Cash App and Afterpay) and lead a team of 10+ designers. This is a hybrid player-coach and DRI role: you will set an exceptionally high craft bar while staying hands-on with the most critical work. You will partner with senior leadership across product, engineering, and research to define long-term vision, drive roadmaps, and ship experiences that redefine what a financial product can feel like. You Will - Define and uphold craft excellence for Core Experience - staying close to the details, leading critique, and ensuring
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TITLE: SOC Thermal Engineer
EMPLOYER: Apple
LOCATION: Austin, United States of America (unspecified)
SALARY: $181K-$318K
POSTED: 2025-10-15
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200626309/soc-thermal-engineer?team=HRDWR
EXCERPT: SOC Thermal Engineer Austin, United States of America Do you love working on challenges that no one has yet solved? Do you like changing the game? Envision what you could do here. At Apple, we believe new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. We are looking for a self-motivated and ambitious individual who will work closely with multi-functional teams to optimize mobile device's thermal performance and participate in advanced IC packaging research and development. The Thermal Engineer will design and validate cooling solutions for high-performance computing systems. The role involves simulation, testing, and cross-functional collaboration to ensure thermal performance and reliability across product lines. This position is responsible for thermal analysis and design of thermal solutions to address chip energy efficiency and performance scaling, Providing thermal modeling solutions to mobile devices at silicon die and semiconductor package levels, Analyzing simulation and measurement results to enhance product thermal management, Integrate cooling solutions to next generation SOC architecture design. Minimum Qualifications: BS + 10 years of industry experience. Preferred Qualifications: MSEE +10 years of industry experience. Demonstrated leadership capabilities at the senior engineer level. Deep expertise in thermal design for silicon devices and packaging solutions. Proven experience with IC physical design parameters and their impact on electrical and thermal performance across various packaging technologies. Strong understanding of SoC design methodologies, low-power design techniques, and thermal analysis approaches. Comprehensive knowledge
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TITLE: Senior Design Engineer
EMPLOYER: Cisco
LOCATION: Allentown, Pennsylvania, US (unspecified)
SALARY: $166K-$234K
POSTED: 2026-05-22
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Allentown-Pennsylvania-US/Senior-Design-Engineer_2003192
EXCERPT: Senior Design Engineer Allentown, Pennsylvania, US The application window is expected to close on: 05/25/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team Join Cisco's Silicon Photonics group, where we combine deep expertise in analog, digital, and optical design to build the world's fastest networking solutions. We're a collaborative, innovative team passionate about pushing the limits of high-speed connectivity. Your Impact As a Senior Engineer, you'll lead the design and development of next-generation 100G/200G/400G photonics ICs. From architecture to lab validation, you'll shape product direction, mentor engineers, and ensure Cisco stays at the forefront of optical networking innovation. Specific responsibilities include: Drive architecture, design, and verification of high-speed mixed-signal and photonics circuits. Define and document chip-level specifications and verification plans. Collaborate across optical, electrical, firmware, and manufacturing teams to deliver end-to-end solutions. Lead lab validation, debug, and yield improvement activities. Mentor and provide technical guidance to junior engineers. Minimum Qualifications Bachelors + 12 years of related experience, or Masters + 8 years of related experience, or PhD + 5 years of related experience Master's or PhD in Electrical Engineering (or related field). 10+ years of experience in analog/mixed-signal IC design for high-speed systems. Lab validation and test experience with high-speed equipment. Experience with Python and C for automation and analysis. Hands-on expertise with design tools (Cadence Virtuoso, Spectre, Calibre, etc.). Preferred Qualifications Deep expertise in photonics and high-speed datapath circuits (modulators, TIAs, PLLs, ADC/DAC,
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TITLE: CX Designer Sr
EMPLOYER: Valtech
LOCATION: Brazil - Remote (remote)
SALARY: Not disclosed
POSTED: 2026-05-25
APPLY_URL: https://job-boards.eu.greenhouse.io/valtech/jobs/4873902101
EXCERPT: CX Designer Sr Brazil - Remote Why Valtech? We're the experience innovation company - a trusted partner to the world's most recognized brands. To our people we offer growth opportunities, a values -driven culture, international careers and the chance to shape the future of experience. The opportunity At Valtech, you'll find an environment designed for continuous learning, meaningful impact, and professional growth. Whether you're pioneering new digital solutions, challenging conventional thinking or building the next generation of customer experiences, your work will help transform industries. We are proud of: - The work we do and the innovation we drive - Our values of share, care a nd dare - A workplace culture that fosters creativity, diversity and autonomy - Our borderless, global framework, which enables seamless collaboration The role As a CX Designer Sr , you are passionate about experience innovation and eager to push the boundaries of what's possible. You bring 5+ YEARS of experience, a growth mindset and a drive to make a lasting impact. You will thrive in this role if you are: - A curious problem solver who challenges the status quo - A collaborator who values teamwork and knowledge-sharing - Excited by the intersection of technology, creativity and data - Experienced in Agile methodologies and consulting (a plus) Role responsibilities • Lead Service Design and Customer Experience (CX) initiatives, considering the end-to-end customer journey, from acquisition to post-sales and ongoing relationship management. • Compile, organize, and analyze existing inputs, such as: Voice of Customer (VoC)
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TITLE: Senior Hardware Design Engineer, Ethernet Switching
EMPLOYER: Arista Networks
LOCATION: Santa Clara, CA, United States (unspecified)
SALARY: $300K-$655K
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/AristaNetworks/744000130067758-senior-hardware-design-engineer-ethernet-switching
EXCERPT: Senior Hardware Design Engineer, Ethernet Switching Santa Clara, CA, United States Company Description: Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation. Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do. Job Description: Who You'll Work With Working closely with cross-functional teams including software, product management, and manufacturing, our engineers innovate on system architectures, high-speed PCB designs, and signal integrity to deliver state-of-the-art products that drive network performance and reliability. The total estimated annual compensation range for this position, inclusive of base salary, bonus, and equity, is $300,000 to $655,000. This range is a good faith estimate only. Bonus and equity
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TITLE: Enablement Strategy & Operations Manager
EMPLOYER: Hootsuite
LOCATION: New York, New York, United States, Toronto, Ontario, Canada, Vancouver, British Columbia, Canada (unspecified)
SALARY: CAD 96K-135K
POSTED: 2026-05-27
APPLY_URL: https://careers.hootsuite.com/job/?gh_jid=7960594
EXCERPT: Enablement Strategy & Operations Manager New York, New York, United States, Toronto, Ontario, Canada, Vancouver, British Columbia, Canada This role builds and runs the operating system of Hootsuite's Revenue Enablement function. The GTM Enablement Strategy & Ops Manager designs the AI-powered systems, workflows, and infrastructure that allow enablement to scale across Sales and Customer Office (without scaling headcount). This role builds the machinery that makes the entire function faster, smarter, and measurably more effective. You own the infrastructure layer: the planning cadence, intake and prioritization framework, reporting model, communication systems, and AI governance architecture. Every system you build should reduce manual effort, increase throughput, and produce field impact that can be traced to revenue outcomes. This role is open in USA in provinces and states we can legally hire in and will report into the Chief of Staff, Revenue. WHAT YOU'LL DO - Design and implement AI-powered workflows across the enablement function: content generation, program delivery automation, coaching insight loops, knowledge management systems, AI-drafted program communications - Manage and govern curated AI workflows (e.g. Claude skills library, shared projects) in partnership with Sales, Customer, RevOps & Marketing. Maintain the governance tracker, evaluate tools against field use cases, drive adoption with measured behavior change, and lead AI-focused workstreams including Hackathon planning and RevOps roadmap alignment. - Lead cross-functional program execution, analyzing and integrating inputs from Marketing, Solution Consulting, RevOps and Internal Enablement Stakeholders to bring key initiatives from strategy to field-ready delivery. - Manage the integrated enablement planning process across Sales
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TITLE: System Product Design Engineer - Core Systems
EMPLOYER: Apple
LOCATION: Cupertino, United States of America (unspecified)
SALARY: $114K-$191K
POSTED: 2026-03-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200651200/system-product-design-engineer-core-systems?team=HRDWR
EXCERPT: System Product Design Engineer - Core Systems Cupertino, United States of America Apple is a place where extraordinary people gather to do their best work. Passion works here, our community is made up of every kind of individual: artists and designers, engineers and scientists, problem solvers and doers. Together we build things and experiences people once couldn't have imagined - and now can't imagine living without. So if you're excited by the idea of making a real impact, a career with Apple might be your dream job. Just be ready to dream big! We are looking for someone who is passionate about engineering and thrives on innovation to help build the next generation of the world's most innovative mobile devices. This role is for someone with strong mechanical design skills, an ability to lead projects in a multi-functional setting, and excellent communication skills with both vendors within Asia and internal teams at Apple. The role will require the ability to deliver outstanding design solutions while balancing multiple priorities on demanding schedules. You will be responsible for building prototypes for design validation and driving failure analysis. As designs mature, you will also primarily work on-site at contract manufacturers within India to implement and integrate iPhones to enable product at scale. We are looking to add a product design engineer to the team. Day to day job responsibilities include the design of tight tolerance components for prototype systems, development of test infrastructure, and characterization of components and assembly processes. Minimum Qualifications: -
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TITLE: Engineering Director
EMPLOYER: AlixPartners
LOCATION: Buenos Aires (unspecified)
SALARY: Not disclosed
POSTED: 2026-04-20
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.alixpartners.com/careers/7703009003?gh_jid=7703009003
EXCERPT: Engineering Director Buenos Aires At AlixPartners, we tackle complex challenges by transforming insights into innovative solutions, delivering lasting value for businesses, their people, and the communities they serve. Our products are designed to drive meaningful impact, ensuring sustainable growth and success. By understanding, respecting, and honoring the needs of our employees, clients, and communities, AlixPartners actively promotes an inclusive environment. We strongly believe in the value that diversity of thoughts and experiences bring to our firm, and are committed to the perpetual enhancements of initiatives, policies, and practices. We hold ourselves accountable by providing the space for authenticity, growth, and equity for everyone. AlixPartners has embraced a hybrid work model to provide flexibility and support our employees' work-life integration. Our hybrid model combines a mix of in-person and remote working. Our products are designed to drive meaningful impact for our clients and stakeholders. This role follows a different cadence to traditional consulting or on-site client presence - it follows a traditional product development cadence, while being expected to engage our users in the appropriate situations such as business conferences and in-person workshops. What you'll do Build and lead a top-talented engineering hub in Buenos Aires that delivers scalable, secure, and reliable software for our products portfolio. Create scalable, reliable, and high-performing software solutions that multiply our clients' results and drive business growth. Build and ship LLM-driven product features (RAG, document Q&A, intelligent workflows) that drive user growth and revenue. Take a hands-on role, both at the architecture and code level
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TITLE: Systems Engineer Design & Implementation - North Carolina OR South Carolina
EMPLOYER: Motorola Solutions, Inc.
LOCATION: South Carolina Remote Work, More... (remote)
SALARY: Not disclosed
POSTED: 2026-05-14
PARENTAL_LEAVE_WEEKS: 13 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 13 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://motorolasolutions.wd5.myworkdayjobs.com/Careers/job/South-Carolina-Remote-Work/Systems-Engineer-Design---Implementation---North-Carolina-OR-South-Carolina_R64874
EXCERPT: Systems Engineer Design & Implementation - North Carolina OR South Carolina South Carolina Remote Work, More... posted: Posted 29 Days Ago
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TITLE: Senior Hardware Engineer, Electromagnetic and SIPI, Pixel Watch
EMPLOYER: Google
LOCATION: Mountain View, CA, USA (unspecified)
SALARY: $159K-$231K
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2Fcka8w23EOb7K92rUt3H8yL-TPeMIFn9EbLDO79mLIrEg_EjsACxwdTOeVAUCdoSB4ofet2j0AG-7zQ6jpSQ-QvNnOBsEIIsAqfTGH44w2jTwAzTN3EceoPAMKhbXi2w%3D%3D_V2&loc=US&title=Senior+Hardware+Engineer
EXCERPT: Senior Hardware Engineer, Electromagnetic and SIPI, Pixel Watch Mountain View, CA, USA In this role, you will participate actively across all lifecycle stages of Pixel Watch product development. You will serve as the technical owner for component and system-level Electromagnetic (EM) integrity, signal and power integrity translating data into actionable architecture-level insights. You will require close collaboration with cross-functional teams to predict, debug, and optimize the hardware performance of next-generation wearable technology.The Google Pixel team focuses on designing and delivering the world's most helpful mobile experience. The team works on shaping the future of Pixel devices and services through some of the most advanced designs, techniques, products, and experiences in consumer electronics. This includes bringing together the best of Google's artificial intelligence, software, and hardware to build global smartphones and create transformative experiences for users across the world. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead comprehensive EM simulations at both the component and system levels, with a focus on passive mode extraction and overall system performance analysis. Perform detailed correlation studies between simulation models and bench lab measurements to ensure and maintain high-fidelity simulation accuracy. Deliver targeted simulations and DOEs (Design of Experiments) to assist cross-functional teams with EM-related debugging, root-cause analysis, and hardware optimization. Conduct Pixel Watch Signal Integrity and Power Integrity (SIPI) simulations in the frequency domain,
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TITLE: Senior Technology Design Manager - White Space Fit Out
EMPLOYER: CoreWeave
LOCATION: Livingston, NJ / New York, NY / Sunnyvale, CA / San Francisco, CA / Bellevue, WA (unspecified)
SALARY: $157K-$210K
POSTED: 2026-05-21
K401_MATCH: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
LEARNING_BUDGET_OFFERED: yes (not source-backed)
APPLY_URL: https://coreweave.com/careers/job?4683488006&board=coreweave&gh_jid=4683488006
EXCERPT: Senior Technology Design Manager - White Space Fit Out Livingston, NJ / New York, NY / Sunnyvale, CA / San Francisco, CA / Bellevue, WA CoreWeave is The Essential Cloud for AI™. Built for pioneers by pioneers, CoreWeave delivers a platform of technology, tools, and teams that enables innovators to build and scale AI with confidence. Trusted by leading AI labs, startups, and global enterprises, CoreWeave combines superior infrastructure performance with deep technical expertise to accelerate breakthroughs and turn compute into capability. Founded in 2017, CoreWeave became a publicly traded company (Nasdaq: CRWV) in March 2025. Learn more at www.coreweave.com . What You'll Do: We are seeking a highly skilled and experienced Data Center Design Manager to lead and manage the design process on behalf of CoreWeave, overseeing the design of our Data Center Fit Outs (White Space) and ensuring that designs meet and incorporate CoreWeave project requirements. About the role: This role will primarily focus on managing the execution of Architectural, MEP, and LV/IT infrastructure designs within our leased data center facilities. The Design Manager will ensure that all designs align with our project requirements and are executed to meet performance, efficiency, and scalability standards. The role will also provide ongoing support into the Fit Out construction phase to ensure the design is implemented accurately. Acting as the primary point of contact for design-related matters, on a per-project basis, this individual will collaborate with internal teams and external consultants to ensure designs are executed consistently and to the highest
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TITLE: Sr Electrical Engineer, Last Mile Delivery & Technology, Last Mile Delivery & Technology
EMPLOYER: Amazon
LOCATION: Bellevue, Washington, USA (unspecified)
SALARY: $137K-$186K
POSTED: 2026-05-12
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
SURROGACY_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10417641/sr-electrical-engineer-last-mile-delivery-technology-last-mile-delivery-technology
EXCERPT: Sr Electrical Engineer, Last Mile Delivery & Technology, Last Mile Delivery & Technology Bellevue, Washington, USA Last Mile Delivery & Technology is responsible for envisioning and developing forward-looking initiatives to improve the efficiency, speed, quality, and safety of the delivery experience for customers worldwide. Our team is actively seeking highly-motivated innovators who are eager to transform the future of logistics and delivery solutions. As a Senior Electrical Engineer, you will lead the electrical architecture, development, and validation of advanced machine vision and compute devices for automotive and industrial applications. You'll work closely with product and operations teams to understand process and business challenges, architect novel solutions, and drive hardware development from concept to production. The ideal candidate demonstrates a hands-on passion for engineering, communicates concepts clearly both verbally and visually, and thrives in a dynamic, highly ambiguous environment. Key job responsibilities * Lead electronic system design projects from concept through production * Partner across engineering, manufacturing, and business stakeholders to gather, analyze, and prioritize project requirements while balancing diverse objectives * Architect, design, and optimize electrical modules, assemblies, and systems - including design considerations for system integration, manufacturability, testability, reliability, and cost * Develop electrical schematics and provide oversight for component placement and layout activities of printed circuit board assemblies (PCBAs) - including component selection, floor planning, signal and power integrity review * Perform circuit simulations to analyze functionality and performance under various loading, environmental, and component tolerance scenarios. * Develop electrical test plans - including bring up, verification, validation,
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TITLE: Research Engineer, Reasoning & Memory - SIML
EMPLOYER: Apple
LOCATION: Cupertino, United States of America (unspecified)
SALARY: $147K-$272K
POSTED: 2026-04-09
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200656722/research-engineer-reasoning-memory-siml?team=MLAI
EXCERPT: Research Engineer, Reasoning & Memory - SIML Cupertino, United States of America The System Intelligence and Machine Learning (SIML) Content Understanding teams are seeking a Research Engineer in Reasoning & Memory Systems. You will be working alonside teams that are in charge of operating system wide embeddings, personalized RAG workstreams, tool calling, context compaction / efficiency & memory systems. Projects are focussed on advancing Apple Intelligence capabilities, while working closely across disciplines with our partners in hardware engineering, design and product. Selected references to our prior work (a) https://arxiv.org/pdf/2507.13575, (b) https://arxiv.org/pdf/2407.21075, (c) https://www.apple.com/newsroom/2024/12/apple-intelligence-now-features-image-playground-genmoji-and-more/ Important attributes expected in the role is fluency in algorithm development (prompt optimization, post training / alignment), and experience with automatic evaluation techniques. The role includes the opportunity to partner with world class system engineers to prototype and incorporate bleeding edge algorithmic innovations in the context of emerging agentic experiences Other responsibilities include testing and upkeep of training infrastructure, whiled partnering with safety/security teams on emerging robustness challenges while aligning models/agents to production needs. Ability to interface with large scale data infrastructure is a huge plus. Apple has a thriving Machine Learning research community. It is expected that role offers the candidate an opportunity to form a strong network of collaborators across the company, while sharing research progress with senior technical leaders at a regular cadence. Minimum Qualifications: PhD, or MSc in Computer Science/Electrical Engineering, or a related field (mathematics, physics or computer engineering); with a focus on machine learning, or comparable professional experience Strong ML and
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TITLE: Hardware Engineer - IC Package design team leader (12+ years)
EMPLOYER: Cisco
LOCATION: 3 Locations (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-23
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Bangalore-India/Hardware-Engineer---IC-Package-design-team-leader--12--years-_2012261
EXCERPT: Hardware Engineer - IC Package design team leader (12+ years) 3 Locations Meet the Team Join the Package Design Team at Cisco Silicon One in India, a group leading the way in developing Cisco's groundbreaking silicon solutions for next-generation networking. As a collaborative team at the center of Cisco's silicon development, we design and optimize advanced package solutions for some of the industry's most sophisticated ASICs. You'll work directly with experts in layout, signal integrity, and power distribution, shaping innovative methodologies and driving the evolution of high-performance networking technologies. Your Impact This role offers a unique opportunity to make a significant impact on the future of networking innovation within the Cisco Silicon One initiative. As a lead engineer, you will drive the entire package design process-from planning and optimization to execution-ensuring the delivery of high-speed, robust, and scalable solutions for global networks. You will mentor engineers, define strategies, and collaborate across multi-functional teams to accelerate the creation of industry-leading silicon packages. Beyond technical leadership, you'll join a passionate community dedicated to changing how the world connects, works, and learns, while building strong partnerships and fostering collective success. Responsibilities Lead package design tasks, planning and driving schedules from concept through implementation Optimize package pinouts, stack-ups, power distribution, and high-speed routing, balancing performance and manufacturability Collaborate with silicon floor planning, signal integrity (SI), and power integrity (PI) teams to ensure design quality and efficiency Work closely with layout editors to deliver high-quality package designs aligned with interface requirements Enhance design methodologies and
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TITLE: Mechanical Systems & Support Designer
EMPLOYER: Eaton Corporation
LOCATION: Greenwood, South Carolina, USA, 29649 (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://eaton.eightfold.ai/careers/job/687236458251
EXCERPT: Mechanical Systems & Support Designer Greenwood, South Carolina, USA, 29649
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TITLE: Signal Integrity Engineer, Sr Staff
EMPLOYER: d-Matrix
LOCATION: Santa Clara, Santa Clara, Ca, Ca, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-06
APPLY_URL: https://jobs.ashbyhq.com/d-matrix/70e72048-e196-4352-9d34-f93afc35c9d9
EXCERPT: Signal Integrity Engineer, Sr Staff Santa Clara, Santa Clara, Ca, Ca, United States At d-Matrix , we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive , and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together , we can help shape the endless possibilities of AI. About the Role As the Senior Staff SI/PI Engineer, you will be the technical authority responsible for the electrical integrity of d-Matrix's high-performance AI compute platforms. In an environment where we are pushing 112G/224G SerDes and delivering thousands of Amps to multi-chip modules (MCM), your role is critical to ensuring that our "Digital In-Memory Computing" architecture translates into stable, manufacturable, and world-class hardware. You will lead the end-to-end modeling, simulation, and correlation efforts-from the silicon die through the package and across the system PCBA. Key Responsibilities • End-to-End SI/PI Ownership: Drive the SI/PI strategy for next-generation AI accelerators, focusing on high-speed interfaces (PCIe Gen6/7, CXL, LPDDR5) and custom Chiplet-to-Chiplet interconnects. • MCM & Package Simulation: Lead the modeling and analysis of complex multi-chip packages, including interposer routing, micro-bump parasitic extraction, and die-to-die (D2D) link budgeting. • Advanced PDN Architecting: Design and optimize
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TITLE: Display Solutions Hardware Platform Enablement Architect
EMPLOYER: Hewlett-Packard
LOCATION: Spring, Texas, United States of America (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://hp.eightfold.ai/careers/job/41774427
EXCERPT: Display Solutions Hardware Platform Enablement Architect Spring, Texas, United States of America
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TITLE: GPU Physical Design Clocking Engineer
EMPLOYER: Apple
LOCATION: Austin, United States of America (unspecified)
SALARY: $181K-$318K
POSTED: 2026-02-13
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200646346/gpu-physical-design-clocking-engineer?team=HRDWR
EXCERPT: GPU Physical Design Clocking Engineer Austin, United States of America Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, we will enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on, technical work. You will be implementing complete chip design from netlist to tapeout. You will have hands on experience in physical design and large chip integration. As a GPU Clocking engineer, you will collaborate with FE teams to understand chip architecture and drive clocking aspects early in design cycle. You will drive best in class clocking construction and solutions for performance, power and Area (PPA). You will collaborate to drive clocking methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress. You will need to communicate and drive the needs of PD and Clocking with multi-functional teams that will enable achieving the goals of the back-end design for the project. Minimum Qualifications: BS + 10 years of relevant experience Experience with ASIC integration including one or more of the following: Floorplanning, Clock and Power distribution, global signal planning,
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TITLE: Expert IC Package Design Lead
EMPLOYER: Astera Labs
LOCATION: Israel (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-22
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/asteralabs/jobs/4664075005
EXCERPT: Expert IC Package Design Lead Israel Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Expert IC Package Design Lead to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, leading the physical implementation strategy for chips that power the world's largest AI clusters. As an Expert IC Package Design Lead , you will be a core technical contributor in the development of advanced IC packaging solutions for high-performance connectivity silicon. You will own package flow, architecture, design, and qualification from concept through production, working closely with silicon, signal integrity, power integrity, mechanical, manufacturing, and external OSAT partners. You will be responsible for defining package technologies
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TITLE: Technical Lead Design Verification Engineer
EMPLOYER: Astera Labs
LOCATION: San Jose, CA (unspecified)
SALARY: $147K-$195K
POSTED: 2026-05-28
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/asteralabs/jobs/4697334005
EXCERPT: Technical Lead Design Verification Engineer San Jose, CA Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . We are looking for a Technical Lead Design Verification Engineers with a flair for being a code breaker, ability to come up hybrid mechanisms for verification of complex ASICs. Experience with System Verilog, C, C++, Python or other scripting languages would be a plus. Using your coding and problem-solving skills, you will contribute to the functional verification of the designs. You'll be responsible for the full life cycle of verification, from planning to writing tests to debugging, collect and closing coverage. You'll also work with the software and system validation teams to come up with test plans and executing them in emulation platforms. Basic qualifications - Strong academic and technical background in electrical engineering. At minimum, a Bachelor's in EE is required, and a Masters is preferred. - ≥5 years' experience verifying and validating complex SoC for Server, Storage, and Networking applications. - Knowledge of industry-standard simulators, revision control
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TITLE: Senior Director, Central Operations
EMPLOYER: Justworks
LOCATION: New York, New York (unspecified)
SALARY: $240K-$310K
POSTED: 2026-05-06
APPLY_URL: https://boards.greenhouse.io/justworks/jobs/7895799?gh_jid=7895799
EXCERPT: Senior Director, Central Operations New York, New York Who We Are At Justworks, you'll enjoy a welcoming and casual environment, great benefits, wellness program offerings, company retreats, and the ability to interact with and learn from leaders in the startup community. We work hard and care about our most prized asset - our people. We're helping businesses get off the ground by enabling them to focus on running their business. We solve HR issues. We're data-driven and never stop iterating. If you'd like to work in a supportive, entrepreneurial environment, are interested in building something meaningful and having fun while doing it, we'd love to hear from you. We're united by shared goals and shared motivations at Justworks. These are best summed up in our company values, which are reflected in our product and in our team. Our Values If this sounds like you, you'll fit right in. Who You Are You're an operations leader who sees this moment in operations for what it is: a rare inflection point where AI and automation are reshaping what's possible, and where the leaders who move first will define the next generation of operational excellence. You bring deep expertise in standards, systems, and process design, paired with the vision to imagine what operations can become and the discipline to get there. You've built operational infrastructure before: the SOPs, controls, systems, KPI frameworks, and governance cadences that turn a high-performing team into a high-performing organization. You're a builder at heart, energized by creating structure
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TITLE: Sr Electrical Engineer I
EMPLOYER: Axon Enterprise
LOCATION: Scottsdale, Arizona, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-23
PARENTAL_LEAVE_WEEKS: 10 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 10 (not source-backed)
K401_MATCH: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/axon/jobs/7674607003
EXCERPT: Sr Electrical Engineer I Scottsdale, Arizona, United States Join Axon and be a Force for Good. At Axon, we're on a mission to Protect Life. We're explorers, pursuing society's most critical safety and justice issues with our ecosystem of devices and cloud software. Like our products, we work better together. We connect with candor and care, seeking out diverse perspectives from our customers, communities and each other. Life at Axon is fast-paced, challenging and meaningful. Here, you'll take ownership and drive real change. Constantly grow as you work hard for a mission that matters at a company where you matter. Your Impact As a Senior member of the TASER Electrical Engineering team, you will drive and engage in innovative hands-on design, development, and testing of cutting-edge electronics that are integral to Axon TASER Products. You will apply strong technical expertise and sound engineering judgment to deliver robust, high-quality designs that meet rigorous product and regulatory requirements. In this role, you will own substantial portions of circuit and subsystem designs, support system-level architecture decisions, and collaborate with cross-functional partners across product engineering, firmware, new product introduction, manufacturing, and quality teams. You will also mentor junior engineers and contribute to raising the technical bar within the team while continuing to grow your own technical leadership capabilities. Join a passionate engineering team dedicated to overcoming complex challenges, and help deliver technologies that positively impact Law Enforcement, Public Safety, and their surrounding communities. Your Day-to-Day - Research, propose, and develop innovative, industry-leading circuit designs
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TITLE: Design Verification Engineer
EMPLOYER: Arrow Financial CORP
LOCATION: US-CA-San Jose, California (unspecified)
SALARY: $96K-$176K
POSTED: 2026-06-03
K401_MATCH: yes (not source-backed)
LEARNING_BUDGET_OFFERED: yes (not source-backed)
APPLY_URL: https://arrow.wd1.myworkdayjobs.com/AC/job/US-CA-San-Jose-California/Design-Verification-Engineer_R243002
EXCERPT: Design Verification Engineer US-CA-San Jose, California Position: Design Verification Engineer Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed CPU ARM/RISC-V with C knowledge Regression & Coverage Closure What We Are Looking For: Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews and close tracking of technical as well as management aspect Provide guidance to team on developing UVM-based SV test-benches, defining block, sub-system and SOC top level test plans, PCIe, NVMe, NAND, DDR and CPU sub-systems and verification methodologies, flows and quality metrics. Job Complexity ● Requires in-depth knowledge and experience Solves complex problems; takes a new perspective using existing solutions ● Works independently; receives minimal guidance ● Acts as a resource for colleagues with less experience Represents the level at which career may stabilize for many years or even until retirement ● Contributes to process improvements Typically resolves problems using existing solutions ● Provides informal guidance to junior staff Works with minimal guidance Experience / Education Typically requires 5-7 years of related experience with a 4 year degree; or 3 years and an advanced degree; or equivalent work experience. What's In It for You: At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That's why we offer competitive financial compensation, including various compensation plans and a solid benefits package. Medical, Dental, Vision Insurance 401k, With Matching Contributions Short-Term/Long-Term Disability Insurance Health Savings Account
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TITLE: Test Specialist, Components (Starshield)
EMPLOYER: SpaceX
LOCATION: Hawthorne, CA (unspecified)
SALARY: $33-$39/hr
POSTED: 2026-05-10
APPLY_URL: https://boards.greenhouse.io/spacex/jobs/8537897002?gh_jid=8537897002
EXCERPT: Test Specialist, Components (Starshield) Hawthorne, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. TEST SPECIALIST, COMPONENTS (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and commercial use, Starshield is designed for government use, with an initial focus on three areas: Earth observation, communications, and hosted payloads. Designed to meet diverse mission requirements, Starshield satellites are capable of integrating a wide variety of payloads, offering unique versatility to users. With the proven ability to iterate rapidly, SpaceX's unique full-stack approach in developing end-to-end systems, from launch vehicles to user terminals, enables the deployment of capabilities at scale with unprecedented speed. Starshield's proliferated low-Earth orbit architecture provides inherent resiliency and constant connectivity to on-orbit assets, while SpaceX's proven rapid launch capability provides expedient and economical access to space. The Test Specialist role is responsible for supporting the initial bring-up and future production of Starshield satellites. This includes designing tooling (electrical checkout racks, vehicle harnessing, DAQ setups etc.) and processes (vehicle checkout software, harness/component integration, troubleshooting procedures, etc.) to build Starshield vehicles at a continually increasing rapid cadence. Test Specialists will be expected to contribute to daily production activities, including dispositioning and troubleshooting issues, providing feedback and basic test software (Python-based)
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TITLE: Senior Systems Engineer, Fault Protection
EMPLOYER: Waymo
LOCATION: Mountain View, CA, USA; San Francisco, CA, USA (unspecified)
SALARY: $196K-$242K
POSTED: 2026-03-27
APPLY_URL: https://careers.withwaymo.com/jobs?gh_jid=7748416
EXCERPT: Senior Systems Engineer, Fault Protection Mountain View, CA, USA; San Francisco, CA, USA Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver™-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Waymo's Systems Engineering team works together to blend software and hardware systems in groundbreaking new ways. We set the high performance standards that ensure our vehicles run smoothly and keep passengers safe, then design and perform the tests that validate that performance. We're looking for talented teammates who'll help us maintain strong teamwork and are passionate about driving results. This role follows a hybrid work schedule and you will report to a Systems Engineering Manager. You will: - Advance the Waymo Driver's capabilities to safely mitigate diverse fault conditions in support of Waymo's continued expansion - Develop and own comprehensive requirements and verification & validation plans for mission critical SW systems and features, ensuring appropriate level of coverage to demonstrably meet product quality & safety goals
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TITLE: Hardware Systems Architect, eero Hardware Engineering
EMPLOYER: Amazon
LOCATION: San Francisco, California, USA (unspecified)
SALARY: $158K-$214K
POSTED: 2026-05-22
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10428845/hardware-systems-architect-eero-hardware-engineering
EXCERPT: Hardware Systems Architect, eero Hardware Engineering San Francisco, California, USA At eero, our mission is to serve as the central nervous system of the home. While we began by revolutionizing home WiFi, we aim to create comprehensive solutions that serve both wireless and wired connectivity needs for customers and businesses across the globe. Our cross-functional team, spanning hardware, software, and manufacturing, develops advanced Ethernet switching and gateway products, alongside state of the art security features, to complement our award-winning mesh WiFi systems. As an Amazon company, we combine the best of startup culture with the resources and stability of one of the world's leading technology companies. Our team builds products that customers love - from mesh routers to high-performance wired networking devices - and we're looking for you to join us in shaping the future of the connected home. We are seeking an experienced Hardware System Architect to lead the design and development of next-generation hardware products. This role requires deep technical expertise in system architecture, chipset technologies, and wireless integration, combined with strong cross-functional leadership skills to drive strategic product decisions. Key job responsibilities - Define system-level requirements and architecture for next-generation hardware products, evaluating trade-offs in performance, power efficiency, thermal management, and cost - Evaluate and select chipset vendors through technical assessments of capabilities, roadmaps, and competitive positioning - Conduct competitive analysis including product teardowns, performance benchmarking, and market trend identification to inform product strategy - Design product features and system architectures that optimize user experience while meeting
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TITLE: Construction Project Manager
EMPLOYER: Base Power
LOCATION: Austin, TX, Austin, Texas, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-08
APPLY_URL: https://jobs.ashbyhq.com/base-power/4ca7877d-a69b-4c9e-9ea0-3ae83fb065f1
EXCERPT: Construction Project Manager Austin, TX, Austin, Texas, United States About Base Base is America's next-generation power company. We're rebuilding the foundation of modern civilization-electricity-by deploying a vast network of distributed batteries that is transforming today's fragile, centralized grid into a resilient and abundant system. We are engineers, operators, and creatives solving some of the most complex, interdisciplinary challenges of our time. About the Role The Construction Project Manager serves as Base Power's owner's representative across assigned capital construction projects. This role is responsible for the full project lifecycle - from design coordination through construction closeout - with direct accountability for schedule, budget, and scope performance. The position operates within the Infrastructure & Development team and manages external project stakeholders including general contractors, architects, engineers of record, and specialty consultants. The Construction Project Manager does not perform field construction work directly; instead, they are responsible for contractor oversight, design management, and ensuring project delivery meets Base Power's operational and business requirements. This role requires strong technical judgment, disciplined project controls, and the ability to communicate complex construction issues clearly to internal leadership and cross-functional teams. What You'll Do - Serve as Base Power's primary owner's representative on assigned construction projects, managing contractor performance, design consultant deliverables, and vendor relationships through all project phases - Develop and maintain project schedules, budgets, and scope documentation; track variance, review change orders, and report project status to the Infrastructure & Development Lead on a regular cadence - Manage design and engineering consultant activities, including review
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TITLE: IC Package Integration Lead
EMPLOYER: Apple
LOCATION: Austin Metro Area, United States of America (unspecified)
SALARY: $257K-$386K
POSTED: 2026-03-31
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200654858/ic-package-integration-lead?team=HRDWR
EXCERPT: IC Package Integration Lead Austin Metro Area, United States of America Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result? Envision what you could do here! At Apple, we believe new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! We are looking for a hardworking, and passionate IC Packaging Engineering Lead to join our team. • Work with cross-functional teams and lead package integration and architecture efforts. • Work with 3rd party and OSAT to bring packaging solution from concept to HVM Drive industry with advanced package solutions and specs. • Work to bring innovative packaging solutions from concept to mass production, including package, module, and technology development. • People managerial skills highly desirable. • Travel - 5-10% Lead package co-design efforts with Silicon, Packaging, and Systems engineering teams to ensure designed packages meet electrical, mechanical, thermal, reliability and fit requirements. Drive package technology development which has broad impact (new technology, structure development, enhanced performance, lower cost) Co-work with assembly partners on new packages from development, NPI, Qualification to high volume production. Create package design documentation, design rules, technical risk assessment, package checklist for Silicon TO, Development and release to production teams. Minimum Qualifications: BS and 20+ years of relevant industry experience. Preferred Qualifications: We are looking for
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TITLE: Test Specialist, Avionics (Starshield)
EMPLOYER: SpaceX
LOCATION: Hawthorne, CA (unspecified)
SALARY: $33-$39/hr
POSTED: 2026-03-21
APPLY_URL: https://boards.greenhouse.io/spacex/jobs/8473166002?gh_jid=8473166002
EXCERPT: Test Specialist, Avionics (Starshield) Hawthorne, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. TEST SPECIALIST, AVIONICS (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and commercial use, Starshield is designed for government use, with an initial focus on three areas: Earth observation, communications, and hosted payloads. Designed to meet diverse mission requirements, Starshield satellites are capable of integrating a wide variety of payloads, offering unique versatility to users. With the proven ability to iterate rapidly, SpaceX's unique full-stack approach in developing end-to-end systems, from launch vehicles to user terminals, enables the deployment of capabilities at scale with unprecedented speed. Starshield's proliferated low-Earth orbit architecture provides inherent resiliency and constant connectivity to on-orbit assets, while SpaceX's proven rapid launch capability provides expedient and economical access to space. The Test Specialist, Avionics role is responsible for supporting the production of Starshield satellites. This includes designing tooling (electrical checkout racks, vehicle harnessing, DAQ setups etc.) and processes (vehicle checkout software, harness/component integration, troubleshooting procedures, etc.) to build Starshield vehicles at a continually increasing and rapid cadence. Test Specialists are expected to contribute to daily production activities, including dispositioning and troubleshooting issues, providing feedback, and running basic Python-based test software improvements to
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TITLE: Staff Software Engineer, Performance and Optimization
EMPLOYER: Aurora Innovation, Inc.
LOCATION: Pittsburgh, Pennsylvania (unspecified)
SALARY: $171K-$273K
POSTED: 2025-09-30
APPLY_URL: https://aurora.tech/jobs/8190421002?gh_jid=8190421002
EXCERPT: Staff Software Engineer, Performance and Optimization Pittsburgh, Pennsylvania Who we are Aurora's mission is to deliver the benefits of self-driving technology safely, quickly, and broadly. The Aurora Driver will create a new era in mobility and logistics, one that will bring a safer, more efficient, and more accessible future to everyone. At Aurora, you will tackle massively complex problems alongside other passionate, intelligent individuals, growing as an expert while expanding your knowledge. For the latest news from Aurora, visit aurora.tech or follow us on LinkedIn . Aurora hires talented people with diverse backgrounds who are ready to help build a transportation ecosystem that will make our roads safer, get crucial goods where they need to go, and make mobility more efficient and accessible for all. We are looking for a Senior Staff Software Engineer to join our Performance Engineering and Optimization (PeO) team. As a technical leader in this high-impact group, you will spearhead efforts to push the boundaries of our system's efficiency, ensuring our technology remains at the forefront of the industry. This is a rare opportunity to own the performance roadmap for a commercialized product, tackling complex, large-scale engineering challenges that directly influence the reliability and speed of our fielded environment. In this role you will - Lead cross-functional performance initiatives to identify and resolve systemic bottlenecks, significantly improving end-to-end latency and system throughput. - Architect and implement advanced system instrumentation frameworks to provide deep visibility into modern OS-level performance metrics. - Drive the technical strategy for C/C++
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TITLE: Director / Sr. Director, Strategic Defense Programs
EMPLOYER: Seekr
LOCATION: Reston, Virginia, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.seekr.com/careers/?gh_jid=4703914005
EXCERPT: Director / Sr. Director, Strategic Defense Programs Reston, Virginia, United States About the Opportunity: Seekr is an AI technology company building mission-critical AI capabilities for defense and national security customers. Our technology is purpose-built for the operational environment - designed to perform where it matters most, integrated into the platforms, systems, and workflows that the mission depends on. Seekr has established strategic partnerships with the nation's premier defense integrators that operates platforms, integrates advanced sensor and communications payloads, and sustains some of the most complex mission systems and programs. To lead this relationship, we are hiring a Program Director who brings both the executive instincts to steward a strategic partnership and the technical credibility of someone who has actually done the work: standing up mission systems with our partners, integrating Seekr AI technology into sensors and communications architectures on platforms, and driving programs from rapid prototype to program of record. Spanning the full portfolio of airborne ISR, C2, tactical and strategic communications, and mission integration across multiple agencies and classification levels, this role is responsible for aligning all individual program efforts into a coherent strategy that systematically generates demand for Seekr's AI capabilities across the partner's enterprise. Key Responsibilities: Partnership Leadership - Own the end-to-end executive relationship with Seekr's strategic defense partners, serving as the primary interface across business development, program execution, and technical solutioning at all levels of the organization. - Develop and manage a joint partnership governance framework, including program review cadences, escalation paths, IP and NDA structures,
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TITLE: Senior Manager, Strategic Operations & Change Management, Intelligent Talent Acquisition
EMPLOYER: Amazon
LOCATION: Arlington, Virginia, USA (unspecified)
SALARY: $151K-$205K
POSTED: 2026-04-27
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10404162/senior-manager-strategic-operations-change-management-intelligent-talent-acquisition
EXCERPT: Senior Manager, Strategic Operations & Change Management, Intelligent Talent Acquisition Arlington, Virginia, USA We're looking for a strategic leader who will challenge our thinking and reshape how ITA operates. As Senior Manager, Business Operations & Change Management for Intelligent Talent Acquisition, you'll serve as the strategic thought partner to our senior leaders - and the architect of how the organization executes, adapts, and scales. This isn't a traditional BizOps role. You'll own the mechanisms that enable ITA to execute with clarity - but more importantly, you'll own the system that makes organizational change stick. You'll build a closed-loop change management capability that ensures alignment at the top translates into consistent behavior at the team level. Within your first 3-6 months, you'll take ownership of ITA's strategic planning cycle, stand up the change management system, and begin deploying embedded change leads across ITA's key domains. We're looking for someone who has built operating systems from scratch, led change that actually stuck, and delivered measurable results at scale. If you've ever been frustrated by organizations that agree on a direction and then don't follow through - this is the role where you fix that. Key job responsibilities Strategic Operations & Business Rhythm: • Own ITA's strategic planning cycle: OP1 → Goals → Projects → Accountability • Lead the business cadence including weekly, monthly, and quarterly reviews for Director and VP-level leadership • Design and maintain operating mechanisms that enable clear execution and sustainable scaling across all verticals • Monitor org health -
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TITLE: Hardware Engineer
EMPLOYER: Bedrock Robotics
LOCATION: San Francisco, CA, San Francisco, California, United States (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-04
APPLY_URL: https://jobs.ashbyhq.com/bedrock-robotics/add60bb6-9980-44de-abc1-059ca9b73109
EXCERPT: Hardware Engineer San Francisco, CA, San Francisco, California, United States Join the team bringing advanced autonomy to the built world At Bedrock, we're moving AI out of the lab and into the real world. Our team is composed of industry veterans who helped launch Waymo, scaled Segment to a $3.2B acquisition, and grew Uber Freight to $5B in revenue. Today, we're deploying autonomous systems on heavy construction machinery across the country, accelerating project schedules of billion-dollar infrastructure projects and improving safety on job sites. Backed by $350M in funding, we're working quickly to close the gap between America's surging demand for housing, data centers, manufacturing hubs, and the construction industry's growing labor shortage. This is where algorithms meet steel-toed boots. You'll collaborate with construction veterans and world-class engineers to solve physical-world problems that simulations can't touch. If you're ready to apply cutting-edge technology to solve meaningful problems alongside a talented team-we'd love to have you join us. We're growing our sizable fleet of retrofitted autonomous construction machines and we're looking for a talented hardware engineer to help define system architecture, test and integrate modules into the system, and generally provide coverage on critical HW workstreams. You will work alongside senior engineers responsible for designing these systems, and be responsible for delivering highly robust and capable autonomous HW systems to the field. Key Qualifications: - Strong foundational knowledge in traditional HW engineering subjects such as electrical design, testing, and deployment of hardware systems in rugged outdoor environments - Experience leading large
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TITLE: Senior PIC Designer (Switches)
EMPLOYER: PsiQuantum
LOCATION: Palo Alto, California, United States (unspecified)
SALARY: $130K-$170K
POSTED: 2026-06-03
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.psiquantum.com/apply?gh_jid=7762993003
EXCERPT: Senior PIC Designer (Switches) Palo Alto, California, United States PsiQuantum's mission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. Our architecture and approach is based on silicon photonics. By leveraging the advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photons don't feel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. In 2024, PsiQuantum announced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale. PsiQuantum also develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Quantum computing is not an extension of classical computing. It represents a fundamental shift-and a path to mastering challenges that cannot
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TITLE: Senior Customer Architect - AppSec (Enterprise and Federal)
EMPLOYER: Harness
LOCATION: U.S. (Remote) (remote)
SALARY: $160K-$170K
POSTED: 2026-02-26
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
APPLY_URL: https://www.harness.io/company/jobs/apply?gh_jid=5063514007&gh_jid=5063514007
EXCERPT: Senior Customer Architect - AppSec (Enterprise and Federal) U.S. (Remote) Harness is the AI Software Delivery Platform company, led by technologist and entrepreneur Jyoti Bansal (founder of AppDynamics, acquired by Cisco for $3.7B). Harness has raised approximately $570M in funding and is valued at $5.5B, backed by leading investors including Goldman Sachs, Menlo Ventures, IVP, Unusual Ventures, Citi Ventures, and more. As AI accelerates code creation, the real bottleneck has shifted to everything after the code - testing, deployments, application security, reliability, compliance, and cost optimization. Harness brings AI and automation to this “outer loop,” helping teams ship software faster while maintaining security and governance throughout the entire software delivery lifecycle. Powered by Harness AI and the Software Delivery Knowledge Graph, the Harness Platform applies deep context and intelligent automation across the software delivery lifecycle with governance and policy-driven controls embedded throughout the platform. Over the past year, Harness powered over 185M deployments, 82M builds, 18T flag evaluations, 8M security scans, 9.1B optimized tests, 3T protected API calls, and helped manage $2.8B in cloud spend - enabling customers like United Airlines, Morningstar, and Choice Hotels to accelerate releases by up to 75%, reduce cloud costs by up to 60%, and achieve 10x DevOps efficiency. With a global team across 26 offices and 27 countries, Harness is shaping the future of AI software delivery - and we're looking for exceptional talent to help us move even faster. Position Summary We are seeking an experienced, highly technical and customer-centric Customer Architect -
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TITLE: IC Package Design Technical Leader
EMPLOYER: Cisco
LOCATION: San Jose, California, US (unspecified)
SALARY: $211K-$305K
POSTED: 2026-06-11
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/San-Jose-California-US/IC-Package-Design-Technical-Leader_2012260-1
EXCERPT: IC Package Design Technical Leader San Jose, California, US The application window is expected to close on: 07/06/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms-like Silicon One-are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development-from design to qualification to production-is within our team, we're able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your Impact This role offers a unique opportunity to make a significant impact on the future of networking innovation within the Cisco Silicon One initiative. As a technical and team leader, you will drive complex package design programs-from planning and optimization to execution-ensuring the delivery of high-speed, robust, and scalable solutions for global networks. You will lead and grow the San Jose package design team, mentoring engineers and developing future package leads while collaborating closely with layout, SI/PI, silicon architecture, and manufacturing partners. Your leadership will ensure the delivery of high-quality package designs aligned with system-level requirements. Beyond technical leadership, you will help shape methodologies, improve development flows, and strengthen cross functional collaboration across Cisco's
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TITLE: Applied AI Engineer
EMPLOYER: Swerve
LOCATION: Sapien HQ — NYC, New York, United States (unspecified)
SALARY: Not disclosed
POSTED: 2024-12-16
APPLY_URL: https://jobs.ashbyhq.com/sapien/b31a944b-075f-4302-834f-f949cd3db267
EXCERPT: Applied AI Engineer Sapien HQ — NYC, New York, United States Who we are Sapien is rethinking how finance teams operate in the age of AI. We're building toward an autonomous CFO -systems that run company financials end-to-end. Our platform analyzes complex financial data in real time to increase decision cadence, prevent costly mistakes, and surface value. Sapien has caught multi-million-dollar errors, saved thousands of jobs, and returned significant dollars to customers' bottom lines. We partner with traditional businesses-manufacturing, healthcare, restaurants, and large enterprises-to deeply understand and automate their financial workflows. We're HQ'd by Madison Square Park in NYC and backed by General Catalyst, Neo , and top operators from Google, OpenAI, Microsoft, Ramp, and Stripe (over $9M raised). The role You'll build the AI agent capabilities that power Sapien's autonomous finance operations. This means designing novel architectures for reasoning over complex financial data, implementing verifiable and observable agent workflows, and building systems that learn and adapt to each company's unique operations. This is a research-meets-product role. You'll work on cutting-edge agent capabilities-from observability and library learning to semantic search and multi-modal parsing-and ship them directly into production for customers. What you'll do - Design and implement agent architectures that enable observability, human-in-the-loop verification, and precise context control across complex financial workflows. - Build library learning systems that reduce LLM dependencies by learning reusable patterns for planning, code generation, and data localization from customer interactions. - Create graph-based company representations and develop efficient search methods using embeddings, semantic clustering, and
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TITLE: Community Marketing Manager - Figma Weave (New York, United States)
EMPLOYER: Figma, Inc.
LOCATION: New York, NY (unspecified)
SALARY: Not disclosed
POSTED: 2026-01-07
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://boards.greenhouse.io/figma/jobs/5748282004?gh_jid=5748282004
EXCERPT: Community Marketing Manager - Figma Weave (New York, United States) New York, NY Figma is growing our team of passionate creatives and builders on a mission to make design accessible to all. Figma's platform helps teams bring ideas to life-whether you're brainstorming, creating a prototype, translating designs into code, or iterating with AI. From idea to product, Figma empowers teams to streamline workflows, move faster, and work together in real time from anywhere in the world. If you're excited to shape the future of design and collaboration, join us! We're building the next chapter of AI-native craft and creativity - where craft and technology meet. Figma Weave platform bridges the gap between AI capabilities and human creativity, and lets professional creatives and designers harness the power of the world's leading AI models without losing precision, expression, or soul. We're seeking a Community Manager to cultivate and energize our artist community-the core of our mission. In this hands-on, people-first role, you'll manage our daily presence on Discord, bringing our Collective, community programs, and creative partnerships to life through events, collaborations, and meaningful engagement. You'll connect with artists, educators, and creators who use Weavy, ensuring they feel supported and inspired, while channeling their feedback into ideas that shape and strengthen the platform. This is a full time role that can be held from our New York Hub. What you'll do at Figma Weave: - Define and evolve the community growth model - programming cadence, tier structures, health metrics - Manage day-to-day life
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TITLE: Senior Software Engineer, XR DevX Infra
EMPLOYER: Google
LOCATION: San Jose, CA, USA (unspecified)
SALARY: $174K-$253K
POSTED: 2026-06-10
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckV3bXzrgunVV_zwNKZlijPfHcfPrOHhcbdwJKP6MwnULEjsACxwdTJG0UW2ilp7AOBO3cyqcwhm9ucgHDp4GvXF-k7gdV-vtMlxQR-gsZq9nUTBGFljfrIkQaqM4oA%3D%3D_V2&loc=US&title=Senior+Software+Engineer
EXCERPT: Senior Software Engineer, XR DevX Infra San Jose, CA, USA Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. Google's XR Team is responsible for building and maintaining Android XR, a Platform, supporting Augmented Reality (AR) and Virtual Reality (VR) technologies that can see and sense the world from the same vantage point as you, and interweave digital information onto the world around you. Our goal is to give people superhuman capabilities by making computing more perceptive, immersive, and accessible. The XR DevX Infra team is developing systems, tools and processes to improve developer experience and velocity for Android XR. We support developers, partners and stakeholders to deliver on a regular cadence, with maximum velocity and trust. The Platforms and Devices
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TITLE: SoC Hardware Architect
EMPLOYER: NXP Semiconductors
LOCATION: Austin (Oakhill, Office) (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-05
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/SoC-Hardware-Architect_R-10063821
EXCERPT: SoC Hardware Architect Austin (Oakhill, Office) posted: Posted 7 Days Ago
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TITLE: Test Engineer, Avionics (Starship)
EMPLOYER: SpaceX
LOCATION: Starbase, TX (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
APPLY_URL: https://boards.greenhouse.io/spacex/jobs/8582141002?gh_jid=8582141002
EXCERPT: Test Engineer, Avionics (Starship) Starbase, TX SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. TEST ENGINEER, AVIONICS (STARSHIP) We are building the highest-volume wire harness production operations in aerospace history to build thousands of Starship vehicles per year. In this role, you will design, build, and scale the test equipment, processes, and automation that sit between harness production and vehicle integration. You'll create the systems that prove every harness is defect-free and capable of withstanding extreme reuse, directly enabling Starship's rapid flight cadence and making life multi-planetary. This is a highly hands-on, multidisciplinary role for someone who enjoys solving problems across electrical, mechanical, and software domains while owning real hardware and seeing their work directly impact vehicles flying to orbit. RESPONSIBILITIES: - Design and develop production test equipment, test racks, and automation systems to verify wire harnesses and electromechanical assembly quality at scale - Define and validate test methods that ensure harnesses meet extreme reuse requirements while remaining flight-worthy, while driving root-cause analysis and corrective actions on test failures - Scale test capacity and throughput to support production rates of thousands of vehicles per year and own the transition of new test capabilities into sustained production use BASIC QUALIFICATIONS: - Bachelor's degree in electrical, mechanical, aerospace, or manufacturing engineering - 1+
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TITLE: Silicon Validation and Automation Engineer
EMPLOYER: Google
LOCATION: Tel Aviv, Israel; +1 more (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-01
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckXE8Yp27kgEeVrebkRDNg_Bw0Usxh7qVMX8uydfHYVstEjsACxwdTGCuTAErXRfcyBAAGPhHaOi_ZUJEnRpKTFf2-7ZbfsEq8eXb70PmLS4mHLnHmcYd6H7L0JqogA%3D%3D_V2&loc=IL&title=Silicon+Validation+and+Automation+Engineer
EXCERPT: Silicon Validation and Automation Engineer Tel Aviv, Israel; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers. Run, monitor, and analyze nightly Continuous Integration (CI) regression results. Design and implement new regression methods and supporting infrastructure/Graphical User Interface (GUI). Identify, debug, and report issues while performing initial root cause analysis and routing to IP owners. Develop and maintain tools for silicon validation and debug. Maintain and enhance automation infrastructure for various regression cadences. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience. 1 year of experience in post-silicon validation, SoC debug, or a similar role. Experience with Continuous
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TITLE: Sr. Product Designer, Enterprise Platform
EMPLOYER: Databricks
LOCATION: Mountain View, California; San Francisco, California (unspecified)
SALARY: $145K-$199K
POSTED: 2026-03-23
NON_BIRTH_PARENT_LEAVE_WEEKS: 12 (not source-backed)
APPLY_URL: https://databricks.com/company/careers/open-positions/job?gh_jid=8476061002
EXCERPT: Sr. Product Designer, Enterprise Platform Mountain View, California; San Francisco, California RDQ227R1069 At Databricks, we are passionate about enabling data teams to solve the world's toughest problems - from making the next mode of transportation a reality to accelerating the development of medical breakthroughs. We do this by building and running the world's best data and AI infrastructure platform so our customers can use deep data insights to improve their business. More about the team: The Enterprise platform UX team is responsible for driving the user experience across critical enterprise concerns, specifically focusing on governance , security , and platform observability . This includes ensuring that platform admins have intuitive controls for managing access and compliance, maintaining a secure and trustworthy environment for their data and AI operations, and providing clear, actionable insights into platform health and usage. The impact you will have: - Help design best in class monitoring and governance experiences at scale. - Design unique interactions that will help administrators understand vast amounts of telemetry data. - Explore new ways in which Generative AI can enhance the platform experience and developer workflows. - Develop a deep understanding of Databricks business objectives, the cloud and big data space, its users, and competition. - Conduct user research to identify customer needs and pain points related to data science and platform usage. What we look for: - 5+ years of product design work experience. - A bachelor's degree or equivalent, with specialization in HCI, Interaction Design, graphic design, computer science,
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TITLE: Manager, Package Design Engineering
EMPLOYER: Astera Labs
LOCATION: San Jose, California, United States (unspecified)
SALARY: $230K-$265K
POSTED: 2026-03-26
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/asteralabs/jobs/4678037005
EXCERPT: Manager, Package Design Engineering San Jose, California, United States Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview Astera Labs is seeking a Manager, Package Design Engineering to lead and scale our Package Design team in San Jose. In this high-impact role, you'll own the end-to-end delivery of advanced IC packaging solutions-from early architecture definition through production ramp-enabling the next generation of AI infrastructure and connectivity products. As the semiconductor industry races toward chiplet-based architectures, 2.5D/3D integration, and ever-increasing bandwidth demands, packaging has become a critical differentiator. You'll build and mentor a high-performing team while driving cross-functional execution with silicon architecture, SIPI, PCB, validation, manufacturing, and external partners including substrate vendors and OSATs. Your work will directly impact Astera Labs' ability to deliver industry-leading PCIe, CXL, and Ethernet connectivity solutions to the world's most demanding hyperscale and AI customers. This role offers the opportunity to shape design methodology, establish scalable standards, and enable chip-package-board co-design frameworks across multiple product lines in a fast-moving, innovation-driven
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TITLE: Manager, Software Engineering (France)
EMPLOYER: Ametek
LOCATION: Manager, Software Engineering (France) | Work Location (Country) France | Remote/Onsite Onsite (remote)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.ametek.com/job/Gennevilliers-Cedex-Manager%2C-Software-Engineering-%28France%29-J-92622/1383647600/
EXCERPT: Manager, Software Engineering (France) Manager, Software Engineering (France) | Work Location (Country) France | Remote/Onsite Onsite Reporting to the R&D Director, the Manager of Software Engineering is responsible for leading the end-to-end software engineering activities for the product line. The role safeguards the long-term technical competitiveness, scalability, and industrial robustness of software platforms. It combines: Strategic Software Design Authority in France, Scalable Software Delivery Factory in India, Strong governance aligned with CAMECA NPI / Stage-Gate processes, Transformation of legacy instrument software into a modular, hardware-agnostic platform. Software is treated as a strategic product asset and a key differentiator for CAMECA's business model. Responsibilities: The manager of Software Engineering will ensure: Global Software Engineering Leadership Lead and structure the global SIMS Software Engineering organization (France + India). Define and deploy the target software operating model in line with the SIMS R&D transformation. Own software delivery performance (Quality, Cost, Delivery). Establish clear governance, Key performance Indicators, and cross-site performance cadence. Act as final escalation authority for major technical and delivery matters. Develop technical leadership, succession plans, and engineering capability maturity. Software Design Authority - Gennevilliers Own end-to-end software system architecture across the portfolio. Define and enforce modular, hardware-agnostic architectural principles. Ensure system-level integration (software / electronics / physics /
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TITLE: Senior Electrical Design Validation Engineer
EMPLOYER: Waymo
LOCATION: Mountain View, California (unspecified)
SALARY: $230K-$242K
POSTED: 2026-05-27
APPLY_URL: https://careers.withwaymo.com/jobs?gh_jid=7954639
EXCERPT: Senior Electrical Design Validation Engineer Mountain View, California Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver™-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Hardware Engineering is an innovative and collaborative group of electrical, mechanical, reliability, software and vehicle engineers. We design, build, and perfect the products which are the eyes and ears of Waymo's autonomous driving technology, and integrate those products into vehicle platforms. We're seeking curious and talented teammates to keep us moving in the right direction. This role follows a 100% onsite work schedule and you will report to a Hardware Engineering Manager You will: - Develop and execute comprehensive PCB-level and module-level validation test plans for Waymo hardware, by working closely with EE and software teams - Execute electrical validation test for silicon, board and system, covering voltage regulators, power delivery network (PDN), low-speed / high-speed interfaces, cover thermal and voltage corners - Drive and execute validation to meet key deadlines
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TITLE: Senior Technical Project Manager
EMPLOYER: Sully.AI
LOCATION: US - Bay Area (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-26
APPLY_URL: https://jobs.ashbyhq.com/sully-ai/ba47d434-f735-4b4c-a5fc-892e0b4eac51
EXCERPT: Senior Technical Project Manager US - Bay Area About Us At Sully.ai , We're Building the Most Impactful Healthcare Company on Earth We believe that access to a great doctor is a basic human right. Today, that's not a reality. Delays, misdiagnoses, administrative chaos, and burnout plague the system. Our Mission One Human, One Doctor . We enable our customers to staff 30% of their workforce with AI by creating a shared agent architecture for scale and efficiency. All powered by our own patented, world-class models and deployed in real-world care. About the Role - We're hiring a Technical Project Manager to own Sully's technical project delivery across all areas of business. You will build processes around sprint cadence, delivery standards, and communicate technical milestones to non-technical stakeholders. Key Responsibilities - Build and enforce end-to-end project governance across Sully.ai 's agents and teams. - Define sprint cadence and delivery standards to accelerate cross-functional execution. - Implement and optimize CI/CD pipelines for rapid, high-quality releases. - Translate complex technical milestones into clear stakeholder communication. - Establish playbooks and repeatable frameworks for engineering delivery. Hard Requirements - 7+ years in technical project/program management, with at least 3 in early-stage startups. - Strong command of Agile methodologies (JIRA, retrospectives, sprint planning). - Hands-on experience with CI/CD systems (e.g., Jenkins, GitHub Actions). - Working knowledge of SQL/NoSQL databases and scripting in Python/Bash. - Proven ability to influence and align cross-functional stakeholders. Key Results (First 90 Days) - Establish a repeatable delivery framework adopted across
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TITLE: CAD Engineer - Staff (PDK)
EMPLOYER: Skywater Technology Inc
LOCATION: 2401 E 86th St, Bloomington, MN 55425, USA (remote)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.dayforcehcm.com/en-US/skywater/CANDIDATEPORTAL/jobs/11084
EXCERPT: CAD Engineer - Staff (PDK) 2401 E 86th St, Bloomington, MN 55425, USA CAD Engineer - Staff (PDK) 2401 E 86th St, Bloomington, MN 55425, USA Posted Friday, June 12, 2026 Position Summary: This is a full-time permanent position ideally based in the Minneapolis, Minnesota area, though consideration will be given to remote location. The Electronic Design Automation (EDA) engineer will collaborate effectively with cross-functional teams providing design enablement collateral for semiconductor integrated circuit (IC) technologies . The EDA engineer will be a significant technical contributor to a broad array of IC development projects, including IP development and integration, and Process Design Kit (PDK) development and release. The ideal candidate will have strong skills in DRC coding, Calibre SVRF, or similar EDA tools and methodologies. Major Area of Accountability: •Development and release of PDK Design Rule checks using industry-standard EDA tools. •Technical liaison activities between internal teams, design houses, customers, and foundries to ensure successful development, tape-out, and manufacture of customer ICs. •Technical support for customers using SkyWater PDKs and IP collateral. •Management of 3rd party PDK and IP developers to ensure correct collateral and accuracy necessary for IC development partners to effectively design into SkyWater technologies. •Enablement and improvement of front to back-end IC design flows and manufacturing through DRC development, analysis, validation, and release. •Working closely with design, layout, and process engineers to understand and incorporate semiconductor technology requirements into PDKs. •Performing other duties as assigned. Required Qualifications: Education: BS or MS (preferred) in Electrical Engineering. Experience and/or
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TITLE: Systems Engineer
EMPLOYER: MORSE Corp
LOCATION: Cambridge, MA (unspecified)
SALARY: $90K-$210K
POSTED: 2026-05-28
K401_MATCH: yes (not source-backed)
APPLY_URL: https://boards.greenhouse.io/morsecorp/jobs/7750711003?gh_jid=7750711003
EXCERPT: Systems Engineer Cambridge, MA MORSE Corp is an employee owned, small business based in Cambridge, MA, Arlington, VA, and Seattle, WA with a history of fielding cutting-edge technology. MORSE boasts a specially selected team of scientists, engineers, and software developers to deliver best-in-class technical solutions that solve difficult multidisciplinary problems faced by the US National Security Ecosystem. We are seeking a Systems Engineer to provide leadership and direction in designing and deploying mission systems for airborne platforms for the US National Security Ecosystem. This is an exceptional opportunity for an engineer with a combination of technical expertise, program leadership experience, and the ability to interface with customers to drive innovation, collaboration, and excellence in a fast-paced, growing organization. Responsibilities - Provide guidance and technical leadership in the design, integration, and testing of complex aircraft mission systems with both hardware and software - Elicit, synthesize, and decompose high-level operational requirements into derived subsystem-level requirements; manage traceability throughout the systems lifecycle - Perform trade studies to evaluate commercial-off-the-shelf (COTS) and government-off-the-shelf (GOTS) components against mission capabilities, cost, and schedule constraints - Evaluate design alternatives for impact on cost, schedule Requirements - Bachelor's degree in Aerospace Engineering, Electrical Engineering, Systems Engineering, Computer Science, or a related technical discipline (Master's degree preferred). - US Citizenship required and the ability to obtain a U.S. Security Clearance - 5+ years of experience designing complex mission systems, including integrated hardware and software mission systems - Demonstrated ability to elicit, synthesize, and decompose requirements with a focus on
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TITLE: FS Operations Analyst
EMPLOYER: Scansource Inc
LOCATION: SC-Greenville (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-08
APPLY_URL: https://recruiting.ultipro.com/SCA1004SCSO/JobBoard/220bcab6-cf46-46e3-8fd5-181b273b0628/OpportunityDetail?opportunityId=af793ab8-5d65-4802-bdf7-45ec654ededf
EXCERPT: FS Operations Analyst SC-Greenville The Operations Analyst is responsible for data analytics to provide business intelligence and designing, implementing, maintaining, and enhancing new and existing system applications of ScanSource, Inc.'s (“ScanSource”) Financial Services (“FS”) team worldwide. The individual in this position will work closely with FS, business unit personnel, and Information Technology (“IT”) personnel to determine relevant requirements and be involved in design reviews, systems testing, and data modeling on complex projects. This person will stay current with emerging technologies and apply prior experience to design and develop new applications, including enhancing FS tools through the integration of AI-driven capabilities and operational efficiencies across systems, processes, and risk assessments.
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TITLE: Hardware Dev Engineer , Velocity
EMPLOYER: Amazon
LOCATION: Westboro, Wisconsin, USA (unspecified)
SALARY: $97K-$160K
POSTED: 2026-04-16
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10393833/hardware-dev-engineer-velocity
EXCERPT: Hardware Dev Engineer , Velocity Westboro, Wisconsin, USA As a Hardware Development Engineer within the (RDPI) team, you will design, develop, and deliver mechanical components and systems for Amazon's next generation of products. You will work with cross-functional teams to transform concepts into manufacturable designs that meet customer needs and business requirements. Key job responsibilities - Deliver mechanical design projects from concept through production, ensuring designs meet functional requirements, cost targets, and manufacturing constraints - Create 3D CAD models, engineering drawings, and specifications for mechanical components and assemblies - Conduct engineering analyses including tolerance stack-ups, Geometric Dimensioning and Tolerancing (GD&T), and Finite Element Analysis (FEA) - Develop and execute test plans to validate mechanical designs against product requirements - Collaborate with industrial designers, electrical engineers, and manufacturing partners to integrate mechanical designs with other subsystems. - Identify and resolve technical issues during development and production phases - Document design decisions, test results, and engineering changes - Support Design for Manufacturing (DFM) and Design for Assembly (DFA) activities Basic Qualifications: - 4+ years of hardware design and validation of components, subsystems and systems experience - Bachelor's degree in robotics, mechanical/mechatronics engineering, systems engineering or related field Preferred Qualifications: - Knowledge of SolidWorks or similar CAD experience and understanding of best practices for part design, and advanced assemblies - Experience in the design of complex mechanical products and equipment from prototyping to implementation Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or
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TITLE: AWS Sales Ops Intern - Shenzhen
EMPLOYER: Amazon
LOCATION: Shenzhen, CHN (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3178489/aws-sales-ops-intern-shenzhen
EXCERPT: AWS Sales Ops Intern - Shenzhen Shenzhen, CHN Amazon Web Services, Inc. ("AWS") enables customers of all sizes to run their applications on Amazon's industry-leading cloud computing infrastructure re. AWS is growing very rapidly with hundreds of thousands of companies in over 190 countries on the platform. We are looking for a highly motivated intern to support the team to meet organizational goals by designing and implementing a best-in-class business management system, conducting advancing data analysis for business insights and recommendations, and operating critical sales and customer related processes or programs to accelerate business growth and optimize customer obsession. This person should have demonstrated ability to thrive and achieve objectives in a highly matrix-oriented environment, creating and supporting productive cross-team working relationships and interacting with high performing team members. The position requires both the ability to implement formal cadence and process controls, as well as the ability to think and react quickly to changing conditions. The ideal candidate will have a Bachelor's or Master's degree in Finance, Computer Science or other Data analysis fields. This role reports into the AWS GCR (Great China Region) Sales Strategy, Operations and Enablement (SSOE) organization. Key job responsibilities · Data Processing: Validate, correct and consolidate raw data; adjust data format… etc. Support data analysis which covers Forecast, Pipeline and Revenue…etc. · Template and file cleanup / refinement: Refine analysis templates to align with the evolving reporting structure; streamline processes which cover forecast, pipeline, revenue management. · Cross Team Coordination: Drive regular communication, follow up
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TITLE: ASIC Design Engineer (Onsite)
EMPLOYER: Cisco
LOCATION: San Jose, California, US (onsite)
SALARY: $165K-$241K
POSTED: 2026-05-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/San-Jose-California-US/ASIC-Design-Engineer--Onsite-_2011335
EXCERPT: ASIC Design Engineer (Onsite) San Jose, California, US The application window is expected to close on: 05/29/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . This position requires that you live within commuting distance of our San Jose, CA office and commute to the office 5 days per week. MEET THE TEAM Cisco Silicon One (#CiscoSiliconOne) is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world's most complex networks and carry over 90% of IP traffic. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates use the latest 2.5D fanout technologies for large-scale integration, using the latest signaling and data transfer technologies. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry! YOUR IMPACT Define, design and take end to end Front-End ownership of ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet
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TITLE: Senior Staff Signal Integrity Engineer
EMPLOYER: Aurora Innovation, Inc.
LOCATION: Mountain View, California (unspecified)
SALARY: $197K-$285K
POSTED: 2026-05-28
APPLY_URL: https://aurora.tech/jobs/8526675002?gh_jid=8526675002
EXCERPT: Senior Staff Signal Integrity Engineer Mountain View, California Who we are Aurora's mission is to deliver the benefits of self-driving technology safely, quickly, and broadly. The Aurora Driver will create a new era in mobility and logistics, one that will bring a safer, more efficient, and more accessible future to everyone. At Aurora, you will tackle massively complex problems alongside other passionate, intelligent individuals, growing as an expert while expanding your knowledge. For the latest news from Aurora, visit aurora.tech or follow us on LinkedIn . Aurora hires talented people with diverse backgrounds who are ready to help build a transportation ecosystem that will make our roads safer, get crucial goods where they need to go, and make mobility more efficient and accessible for all. We're searching for a Senior Staff Signal Integrity Engineer. In this role you will - Lead Signal Integrity(SI), Power Integrity(PI) implementation in advanced autonomous driving hardware systems, Sensors and hardnesses. - Develop and implement simulation methodology for PCB, high speed channel and SOC to optimize SI/PI performance. - Model complex 3D structures, such as PCB Connector and cables - Extract and characterize high speed channel and compliance against industry standards - Lead high speed interfaces validation in lab with high end scope, VNA and spectrum analyzer Required qualifications - MS (PhD preferred) in Electrical Engineering or related Engineering Degree, with 8 + years of industry experience - Experience with design and implementation of high speed electrical interfaces, such as PCIE Gen4/Gen5, high speed or automotive
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TITLE: Hardware Systems Engineering
EMPLOYER: Apple
LOCATION: Austin, United States of America (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-19
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200647863/hardware-systems-engineering?team=HRDWR
EXCERPT: Hardware Systems Engineering Austin, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The people here at Apple donʼt just create products - they create the kind of wonder thatʼs revolutionized entire industries. Itʼs the diversity of those people and their ideas that inspires the innovation that runs through everything we do, from amazing technology to industry-leading environmental efforts. Join Apple, and help us leave the world better than we found it. SOFTWARE AND SERVICES At Apple, our software engineers are the brains behind some of the industryʼs biggest breakthroughs. macOS, Siri, Apple Maps, iOS and iCloud - not to mention the system-level software for iPhone and Apple TV - all started here. These teams are on the front line of our constant charge toward innovation. MACHINE LEARNING AND AI Within Appleʼs Artificial Intelligence and Machine Learning organization (AIML), you can take part in the ongoing revolution that machine learning plays in daily life. Appleʼs fully-integrated hardware and software provide unique opportunities to deliver amazing experiences, all while prioritizing user privacy. We do work in all fields of Machine Learning, including large language models, diffusion models and reinforcement learning, as well as other related areas such as accessibility, privacy, and fairness. HARDWARE Hardware Engineering and Product RF Design Engineers support electrical, system design, wireless and antenna design
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TITLE: AWS Sales Ops Intern - Shanghai
EMPLOYER: Amazon
LOCATION: Shanghai, CHN (unspecified)
SALARY: Not disclosed
POSTED: 2026-02-11
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3178457/aws-sales-ops-intern-shanghai
EXCERPT: AWS Sales Ops Intern - Shanghai Shanghai, CHN Amazon Web Services, Inc. ("AWS") enables customers of all sizes to run their applications on Amazon's industry-leading cloud computing infrastructure re. AWS is growing very rapidly with hundreds of thousands of companies in over 190 countries on the platform. We are looking for a highly motivated intern to support the team to meet organizational goals by designing and implementing a best-in-class business management system, conducting advancing data analysis for business insights and recommendations, and operating critical sales and customer related processes or programs to accelerate business growth and optimize customer obsession. This person should have demonstrated ability to thrive and achieve objectives in a highly matrix-oriented environment, creating and supporting productive cross-team working relationships and interacting with high performing team members. The position requires both the ability to implement formal cadence and process controls, as well as the ability to think and react quickly to changing conditions. The ideal candidate will have a Bachelor's or Master's degree in Finance, Computer Science or other Data analysis fields. This role reports into the AWS GCR (Great China Region) Sales Strategy, Operations and Enablement (SSOE) organization. Key job responsibilities · Data Processing: Validate, correct and consolidate raw data; adjust data format… etc. Support data analysis which covers Forecast, Pipeline and Revenue…etc. · Template and file cleanup / refinement: Refine analysis templates to align with the evolving reporting structure; streamline processes which cover forecast, pipeline, revenue management. · Cross Team Coordination: Drive regular communication, follow up
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TITLE: Tech Staff Engineer - Firmware
EMPLOYER: Microchip Technology Incorporated
LOCATION: Roseville, CA, United States (unspecified)
SALARY: $88K-$232K
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/Microchip/744000130570110-tech-staff-engineer-firmware
EXCERPT: Tech Staff Engineer - Firmware Roseville, CA, United States Company Description: Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Please follow the link to apply (select Microchip Recruiter as
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TITLE: SoC Display Subsystem Validation Engineering Program Manager
EMPLOYER: Apple
LOCATION: Cupertino, United States of America (unspecified)
SALARY: $172K-$306K
POSTED: 2026-01-15
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200641560/soc-display-subsystem-validation-engineering-program-manager?team=HRDWR
EXCERPT: SoC Display Subsystem Validation Engineering Program Manager Cupertino, United States of America Do you want to apply your engineering background to make big things happen? Can you influence, connect, get results, and communicate effectively? Come to Apple and work within a dynamic team to deliver innovative technologies to our customers. This is an excellent opportunity to engage in groundbreaking display technologies and add to the development of new Apple SoCs and products year after year. SoC Display Subsystem Validation Engineering Program Manager (EPM) is a system integration role within the Hardware Technologies Team, that will lead the strategic planning and execution of end to end validation of the SoCs display subsystem. The subsystem is comprised of: display pixel pipeline in the SoC, the display module and driver IC, as well as the FW/SW to enable the display features at the system level. This EPM will be responsible for pulling together an architecture guided highly multi-functional feature enablement, de-risk and validation plan at both SoC and System level (running OS), and tuning to optimize display image quality. The EPM will also drive cross-functional debugs and critical de-risk plans to minimize risk of late SoC revisions in enabling pioneering display technologies across all Apple product lines. Work with multi-functional teams to ensure end-to-end validation plan and de-risk strategy of the SoC display subsystem is established early in the SoC Concept phase. Collaborate with systems, software, module, and SoC integration teams to plan and track “Golden C-model” development and validation, early software driver
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TITLE: Hardware Design Engineer
EMPLOYER: Rambus INC
LOCATION: Hillsboro, OR, US (hybrid)
SALARY: $107K-$198K
POSTED: 2026-04-09
K401_MATCH: yes (not source-backed)
APPLY_URL: https://careers-rambus.icims.com/jobs/22326/hardware-design-engineer/job
EXCERPT: Hardware Design Engineer Hillsboro, OR, US Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional HW Design Engineer to join our MCG team in Hillsboro. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer. Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. Responsibilities Design architecting and trade-off analysis RTL coding and verification Memory Controller + PHY integration and verification Customer delivery and support Qualifications Strong System Verilog/Verilog RTL design expertise Questa/Incisive/VCS simulator experience Python/Perl/Tcl scripting experience Significant ASIC and/or FPGA design experience Ability to learn quickly and work independently Solid communication and project management skills 5+ years of logic design experience BSEE Definite Plus: ASIC synthesis, timing constraint, CDC/RDC experience Verification experience Memory (HBM, GDDR, LPDDR, DDR) expertise AMBA AXI or CHI design experience Located in the Hillsboro, Oregon area Training: Provided as needed About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our
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TITLE: AWS Sales Ops Intern - Beijing
EMPLOYER: Amazon
LOCATION: Beijing, CHN (unspecified)
SALARY: Not disclosed
POSTED: 2025-12-29
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/3149530/aws-sales-ops-intern-beijing
EXCERPT: AWS Sales Ops Intern - Beijing Beijing, CHN Amazon Web Services, Inc. ("AWS") enables customers of all sizes to run their applications on Amazon's industry-leading cloud computing infrastructure re. AWS is growing very rapidly with hundreds of thousands of companies in over 190 countries on the platform. We are looking for a highly motivated intern to support the team to meet organizational goals by designing and implementing a best-in-class business management system, conducting advancing data analysis for business insights and recommendations, and operating critical sales and customer related processes or programs to accelerate business growth and optimize customer obsession. This person should have demonstrated ability to thrive and achieve objectives in a highly matrix-oriented environment, creating and supporting productive cross-team working relationships and interacting with high performing team members. The position requires both the ability to implement formal cadence and process controls, as well as the ability to think and react quickly to changing conditions. The ideal candidate will have a Bachelor's or Master's degree in Finance, Computer Science or other Data analysis fields. This role reports into the AWS GCR (Great China Region) Sales Strategy, Operations and Enablement (SSOE) organization. Key job responsibilities · Data Processing: Validate, correct and consolidate raw data; adjust data format… etc. Support data analysis which covers Forecast, Pipeline and Revenue…etc. · Template and file cleanup / refinement: Refine analysis templates to align with the evolving reporting structure; streamline processes which cover forecast, pipeline, revenue management. · Cross Team Coordination: Drive regular communication, follow up
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TITLE: Hardware Systems Design Electrical Engineer, iPhone
EMPLOYER: Apple
LOCATION: Cupertino, United States of America (unspecified)
SALARY: $147K-$272K
POSTED: 2026-02-24
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.apple.com/en-us/details/200648413/hardware-systems-design-electrical-engineer-iphone?team=HRDWR
EXCERPT: Hardware Systems Design Electrical Engineer, iPhone Cupertino, United States of America Imagine the world without Apple devices! Does it feel strange? Apple products might even be one of the reasons you wanted to BE a Hardware Design Engineer. Now, imagine yourself designing future Apple products. The iPhone team is looking for engineers who are driven by the opportunity to take on big challenges. Engineers, who like to immerse themselves in systems hardware design, creating magic in the palm of their hand on a device that will affect millions of iPhone users. Big challenges? I'd say that's pretty close. Our team is collaborative, creative and passionate about what we do and the products we make. Come join us! This is a unique hardware design position that starts at product concept and continues all the way through to mass production. You will own the design, integration, and validation of rigid boards, printed flexible circuits, and overall system-level solutions that push the boundaries of technology.Work daily with multi-functional technology teams in a fast-paced environment. There will be opportunities for international travel. Minimum Qualifications: BS Electrical/Computer Engineering or equivalent Strong electrical engineering fundamentals including analog and digital design Experience working with dynamic multi-functional teams Preferred Qualifications: MS Electrical/Computer Engineering or equivalent Minimum 2 years of industry experience is preferred High speed digital design experience Schematic capture and PCB layout Hands-on lab experience with hardware bring-up and debug Fundamentals of signal and power integrity Understanding of low voltage power regulation solutions Integration of hardware into
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TITLE: Director, Imaging Hardware Engineering
EMPLOYER: Anduril
LOCATION: Waltham, Massachusetts, United States (unspecified)
SALARY: $254K-$336K
POSTED: 2026-04-09
APPLY_URL: https://boards.greenhouse.io/andurilindustries/jobs/5100868007?gh_jid=5100868007
EXCERPT: Director, Imaging Hardware Engineering Waltham, Massachusetts, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE TEAM The Anduril Imaging team develops state-of-the-art imaging systems across both hardware and software, deployed to tackle the most significant security challenges of America and its allies. The team is heavily involved in utilizing computer vision, perception, electro-optical, infrared, and sensor data to give our war fighters and allies an advantage. ABOUT THE JOB We are looking for a Director, Imaging Hardware Engineering to join our rapidly growing team. You will own the coordination of all resources and the build out of the team for successful execution across programs and internal R&D efforts. You will guide the team through product development, establish long term goals, as well as be own the technical architecture for the group. You will be involved in developing cutting-edge optical hardware to support mission-critical needs within the DOD
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TITLE: Digital Engineer Intern
EMPLOYER: Renesas Electronics
LOCATION: Lviv, , Ukraine (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-10
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.smartrecruiters.com/RenesasElectronics/744000107698600-digital-engineer-intern
EXCERPT: Digital Engineer Intern Lviv, , Ukraine Company Description: Job Description: We are looking for a highly motivated Intern/ Working Student who will join our team as an Intern Digital Engineer in Lviv office. The role: Design of basic digital circuits meeting performance and area. Simulation, verification, and lab evaluation of digital circuits. Demonstrates an ability to learn new tool features and procedures. Attend training courses. Build up your knowledge and improve your skills using your own research. Qualifications: University students at Electrical Engineering or related disciplines. Preferably university experience in design of analog/digital circuits. Knowledge of electrical properties, digital circuits, behavioral modeling and simulation and Unix. Understanding of HW design workflow. Ability to prioritize work, set goals and meet deadlines. Self-motivated and take full responsibility for solutions. Good written, communication and teamwork skills. Pre-intermediate English level. Will be a plus: Knowledge of transistor-level integrated circuits and semiconductor physics. Experience with protocols (UART, I2C, SPI, JTAG, etc.). Knowledge of PCB design, FPGA, Microcontrollers, Arduino. Programming/scripting (Verilog-A/AMS, TCL, Python, Bash, Perl, C/C++). Familiarity with Cadence IC design Tools (ex.: ADE, Spectre, Layout Suite), Calibre. Additional Information: Fixed-Term Contract - duration approx. 6 months. Friendly and highly professional team. 14 calendar days paid vacation. Flexible working hours. Professional & personal growth. Renesas is an embedded semiconductor solution provider driven by its Purpose ' To Make Our Lives Easier .' As the industry's leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions
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TITLE: Mechanical Designer - Electronics Packaging (Future Opportunities)
EMPLOYER: Syntronic
LOCATION: Kanata, ON (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
APPLY_URL: https://jobs.lever.co/syntronic/53e5a698-1f35-4c29-a21f-2327cd865f20
EXCERPT: Mechanical Designer - Electronics Packaging (Future Opportunities) Kanata, ON Join Syntronic: Where Your Innovation Shapes the Future At Syntronic, we don't just follow industry trends-we set them! Join us in partnering with visionary companies and the brightest minds to turn ground-breaking ideas into reality. Imagine working on cutting-edge telecom advancements, pioneering automotive tech, life-saving healthcare innovations, and next-gen industrial automation. Our projects are diverse, impactful, and at the forefront of technological innovation. Be a part of something extraordinary! Who are we?: Syntronic is a global leader in design and development, specializing in electronics, electro-mechanics, and software. We're not just a company; we're a community of innovators. Our teams work on projects that define the future-from creating state-of-the-art communication systems and autonomous vehicles to advancing IoT solutions that revolutionize everyday life. At Syntronic, your work will make a real difference. What we're looking for: We are seeking individuals who want to: · Collaborate with top-tier clients on transformative, cutting-edge projects. · Engage with and learn from industry leaders · Innovate from concept to completion, ensuring high standards. · Gain international experience on global projects. · Thrive in an entrepreneurial environment that supports new ideas. · Explore multiple sectors like telecommunications, automotive, healthcare, and industrial automation. We're looking for a highly motivated Mechanical Designer who designs mechanical systems supporting electro-mechanical products. You will be involved in the development of mechanical design solutions for electronics products supporting Syntronic's cross-industry customer base: Telecom, Industrial, Medical, Defense-Aerospace, Consumer, etc. Minimum 5-8 years of applicable work
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TITLE: TPU RTL Design Engineer, Networking, Inter-Chip Interconnects
EMPLOYER: Google
LOCATION: Sunnyvale, CA, USA (unspecified)
SALARY: $138K-$198K
POSTED: 2026-06-09
PARENTAL_LEAVE_WEEKS: 18 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 18 (not source-backed)
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckUSKvvD_oVc1L302C62KP4BWNDOBf9W9Ii0uVn5PjykrEjsACxwdTDFsjBMz3oadbd2ROj52wkt8pjqP6DTIWOIScTkWJ8Icwz1CMaOBg96i_LO4TKOMazY7x1AAdw%3D%3D_V2&loc=US&title=TPU+RTL+Design+Engineer
EXCERPT: TPU RTL Design Engineer, Networking, Inter-Chip Interconnects Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. Join the team designing and developing the core components of Google's next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in data centers. As a member of the inter-chip interconnect team, you will play an important role in designing ASIC/SoC hardware for AI and networking accelerators that drive the computational workloads behind Google's most important products. Our hardware accelerators power nearly every product Google offers. Our primary focus is AI acceleration. You will design RTL IP with a focus on chip-to-chip high-speed interconnect subsystems. You will have dynamic, multi-faceted responsibilities in areas such as project definition, RTL design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators. You will have the opportunity to solve challenging technical problems at the forefront of AI hardware, working in a dynamic and collaborative environment. The AI and Infrastructure
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TITLE: Senior/ Staff Package Design Engineer
EMPLOYER: Astera Labs
LOCATION: Israel (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-18
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/asteralabs/jobs/4674501005
EXCERPT: Senior/ Staff Package Design Engineer Israel Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Package Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, Driving the physical implementation strategy for chips that power the world's largest AI clusters. As a Package Design Engineer, you will be a core technical contributor in the development of advanced IC packaging solutions for high-performance connectivity silicon. You will execute the package flow, design, and qualification from concept through production, working closely with silicon, signal integrity, power integrity, mechanical, manufacturing, and external OSAT partners. You will be responsible for implementing package technologies that meet aggressive electrical, thermal,
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TITLE: Staff Engineer - Embedded System Engineer
EMPLOYER: Netradyne
LOCATION: Bangalore (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-07
K401_MATCH: yes (not source-backed)
APPLY_URL: https://www.netradyne.com/company/careers?gh_jid=4693140005
EXCERPT: Staff Engineer - Embedded System Engineer Bangalore Netradyne harnesses the power of Computer Vision and Edge Computing to revolutionize the modern-day transportation ecosystem. We are a leader in fleet safety solutions. With growth exceeding 4x year over year, our solution is quickly being recognized as a significant disruptive technology. Our team is growing, and we need forward-thinking, uncompromising, competitive team members to continue to facilitate our growth. Job Title: Staff Engineer - Embedded System Engineer Department: Device Experience: 6 to 12 Years About Netradyne: Netradyne provides AI-powered technologies for fleet management and safer roads. An award-winning industry leader in fleet safety and video telematics solutions, Netradyne empowers thousands of commercial fleet customers across North America, Europe, and Asia to enhance their driver performance, reduce risk, and optimize operations. Netradyne sets the standard among transportation technology companies for enhancing and sustaining road safety, with an industry-leading 25+ billion miles vision-analyzed for risk and an industry-first driver scoring system that reinforces safe behaviors. Founded in 2015, Netradyne is headquartered in San Diego with offices in San Francisco, Nashville, the UK and Bangalore. For more details visit: www.netradyne.com Role Overview We are looking for an experienced Embedded System Software Engineer to design, develop, and optimize software solutions for embedded platforms. The ideal candidate will have strong expertise in Linux-based systems, device drivers, and middleware, and will contribute to building innovative, high-performance embedded and IoT products. Essential Skills - Linux, Device Drivers, Middleware - Ability to develop software in C, C++ - Good understanding
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TITLE: Senior Robotic Hardware Engineer
EMPLOYER: Applied Intuition
LOCATION: Fort Walton Beach, Florida, United States (unspecified)
SALARY: $100K-$150K
POSTED: 2026-05-03
K401_MATCH: yes (not source-backed)
APPLY_URL: https://jobs.ashbyhq.com/applied/36df3851-dd50-4f07-a8e2-5b0e845258b5
EXCERPT: Senior Robotic Hardware Engineer Fort Walton Beach, Florida, United States About Applied Intuition Applied Intuition, Inc. is powering the future of physical AI. Founded in 2017 and now valued at $15 billion, the Silicon Valley company is creating the digital infrastructure needed to bring intelligence to every moving machine on the planet. Applied Intuition services the automotive, defense, trucking, construction, mining and agriculture industries in three core areas: tools and infrastructure, operating systems, and autonomy. Eighteen of the top 20 global automakers, as well as the United States military and its allies, trust the company's solutions to deliver physical intelligence. Applied Intuition is headquartered in Sunnyvale, California, with offices in Washington, D.C.; San Diego; Ft. Walton Beach, Florida; Ann Arbor, Michigan; London; Stuttgart; Munich; Stockholm; Bangalore; Seoul; and Tokyo. Learn more at applied.co . We are an in-office company, and our expectation is that employees primarily work from their Applied Intuition office 5 days a week. However, we also recognize the importance of flexibility and trust our employees to manage their schedules responsibly. This may include occasional remote work, starting the day with morning meetings from home before heading to the office, or leaving earlier when needed to accommodate family commitments. About the Role As a Senior Robotics Hardware Engineer at Applied Intuition, you will serve as the primary technical link between hardware design, GNC, and software teams to deliver integrated, flight-ready systems. You will lead the critical hardware-software bring-up process, driving initial validation of flight systems from the bench
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TITLE: Product Design Manager - Dashboard
EMPLOYER: Plaid
LOCATION: New York City Office, New York, United States, Seattle Office, San Francisco HQ (unspecified)
SALARY: Not disclosed
POSTED: 2026-03-19
NON_BIRTH_PARENT_LEAVE_WEEKS: 16 (not source-backed)
APPLY_URL: https://jobs.ashbyhq.com/plaid/110a7bbd-7583-488d-afb2-d6e02fcce533
EXCERPT: Product Design Manager - Dashboard New York City Office, New York, United States, Seattle Office, San Francisco HQ We believe that the way people interact with their finances will drastically improve in the next few years. We're dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid's network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Washington D.C., London and Amsterdam. The design team at Plaid is made up of product designers, researchers, and content strategists who work with our cross-functional partners to create Plaid's products. Please visit https://designedbyplaid.com/ to learn more about the Design team. As a Product Design Manager on the Dashboard team, you will manage a multidisciplinary team of product designers and a researcher, leading design efforts across multiple product areas at Plaid. As a member of each area's cross-functional leadership team, you will partner closely with product and engineering to shape direction and outcomes. Your day-to-day responsibilities will include coaching individual contributors, driving high-quality design execution, and collaborating with PM leads
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TITLE: Business Analyst, AMZL Capacity Planning
EMPLOYER: Amazon
LOCATION: Osasco, Sao Paulo, BRA (unspecified)
SALARY: Not disclosed
POSTED: 2026-05-21
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10426665/business-analyst-amzl-capacity-planning
EXCERPT: Business Analyst, AMZL Capacity Planning Osasco, Sao Paulo, BRA The AMZL Capacity Planning Team provides Ops with solutions for in-station and on-the-road operations, year-round and during seasonal peaks. We are seeking an experienced Business Analyst to drive the metrics strategy and data infrastructure for Amazon's Last and First Mile planning activities. This role will define, build, and own the key performance metrics that measure planning effectiveness and map process opportunities. The ideal candidate will independently identify underlying data sources, design new metrics frameworks where none exist, and deliver actionable insights to the overall planning activities. You will partner with Operations, Tech, Science, and Program teams to align on metric definitions, data requirements, and reporting cadences. Strong analytical judgment, deep SQL proficiency, and experience working with large data-sets are essential. This role requires the ability to operate independently in ambiguous, fast-moving environments where data definitions and measurement approaches must be built from the ground up. Key job responsibilities The successful candidate will: - Define and own the end-to-end metrics framework for the Last Mile and First Mile, including identifying gaps in existing measurement, creating new metrics, and establishing baselines and targets - Independently identify, evaluate, and onboard underlying data sources to build a comprehensive data foundation for planning analytics - Design and build dashboards and reporting mechanisms that provide real-time visibility - Independently collaborate across cross-functional teams - Operations, Science, Tech, ACES, Program teams - to align on metric definitions, data requirements, and reporting cadences - Provide data-driven and actionable insights
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TITLE: Design Engineer
EMPLOYER: Eagle Bancorp
LOCATION: New York City | [OnSite] (onsite)
SALARY: Not disclosed
POSTED: 2026-06-12
APPLY_URL: https://jobs.ashbyhq.com/eagle/b5dd7b60-24d5-4053-a753-463cf7140822
EXCERPT: Design Engineer New York City | [OnSite]
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TITLE: Sr. Design Program Manager, Communications & Content, Amazon Design Excellence
EMPLOYER: Amazon
LOCATION: Seattle, Washington, USA (unspecified)
SALARY: $130K-$175K
POSTED: 2026-05-07
PARENTAL_LEAVE_WEEKS: 6 (not source-backed)
NON_BIRTH_PARENT_LEAVE_WEEKS: 6 (not source-backed)
K401_MATCH: yes (not source-backed)
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
ADOPTION_ASSISTANCE_OFFERED: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
CHILDCARE_SUBSIDY: yes (not source-backed)
APPLY_URL: https://www.amazon.jobs/en/jobs/10414292/sr-design-program-manager-communications-content-amazon-design-excellence
EXCERPT: Sr. Design Program Manager, Communications & Content, Amazon Design Excellence Seattle, Washington, USA Amazon Design Excellence is seeking a talented, creative and experienced Sr. Design Program Manager of Communications & Content to join our team as we work to create thriving conditions for design and creative excellence at Amazon. This role will own and evolve the communications strategy for Amazon's design community, driving the full lifecycle of internal and external communications - from producing the monthly design newsletter and managing the Amazon.Design website, to identifying and launching new channels that expand our reach and activate our community. The right candidate will be equal parts operator and strategist: someone who can ship a polished newsletter in the morning and pitch a bold new content strategy in the afternoon. Key job responsibilities Communications Operations & Execution - Own the end-to-end production of the Amazon Design monthly newsletter, including content sourcing, writing/editing, formatting, and distribution to the design community - Draft and send regular communications (emails, announcements, updates) to designers across Amazon - Develop and execute event communications strategy - Manage updates to the Amazon Design internal hub and external website, coordinating directly with partners to scope, prioritize, and ship changes - Maintain and evolve communications templates, distribution lists, and operational cadences to ensure consistency and reliability Strategic Channel Expansion - Develop and execute a communications strategy that expands ADX's reach beyond existing channels - identifying new internal and external marketing opportunities to engage designers where they are - Evaluate and recommend new
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TITLE: FPGA Design Engineer
EMPLOYER: Northrop Grumman Corporation
LOCATION: United States-Illinois-Rolling Meadows (unspecified)
SALARY: Not disclosed
POSTED: 2026-06-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://ngc.eightfold.ai/careers/job/1340071236135
EXCERPT: FPGA Design Engineer United States-Illinois-Rolling Meadows
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TITLE: Principal Digital Design Engineer
EMPLOYER: Astera Labs
LOCATION: San Jose, CA (unspecified)
SALARY: $185K-$230K
POSTED: 2026-03-12
K401_MATCH: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/asteralabs/jobs/4672627005
EXCERPT: Principal Digital Design Engineer San Jose, CA Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview Join Astera Labs as a Principal Digital Design Engineer to architect and implement next-generation digital designs for high-performance AI connectivity solutions. You'll own complex blocks from micro-architecture through silicon bring-up, driving RTL implementation and collaborating with verification, physical design, and DFT teams to deliver production-quality silicon supporting PCIe Gen 6/7, CXL, UALink, UCI, Ethernet, and DDR4/DDR5 protocols. This role offers the opportunity to work on cutting-edge technology at the forefront of AI infrastructure, taking ownership of critical design challenges in a fast-paced, collaborative environment where your contributions directly impact products deployed by the world's leading hyperscalers. Key Responsibilities - Design Ownership & Execution - Develop and implement complex digital blocks and subsystems by defining micro-architecture and driving RTL implementation with an exceptional power, performance and area trade-off using silicon technologies better than 7nm. - Lead efforts to achieve timing closure and implement Design-for-Test (DFT) features for optimal design
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TITLE: Product Design Mechanical Engineer
EMPLOYER: Verkada
LOCATION: San Mateo, CA United States (unspecified)
SALARY: $170K-$220K
POSTED: 2023-11-12
FERTILITY_FAMILY_BUILDING_BENEFITS: yes (not source-backed)
MENTAL_HEALTH_SUPPORT: yes (not source-backed)
LEARNING_BUDGET_OFFERED: yes (not source-backed)
APPLY_URL: https://job-boards.greenhouse.io/verkada/jobs/4135168007
EXCERPT: Product Design Mechanical Engineer San Mateo, CA United States Who We Are Verkada is transforming how organizations protect their people and places with an integrated, privacy-sensitive AI-powered platform that includes solutions for video security, access control, air quality sensors, alarms, intercoms, and visitor management. We've got serious momentum in the market: more than 30,000 customers (including 100+ of the Fortune 500), a $5.8B valuation , more than $1 billion in annualized bookings, and backing from CapitalG, Sequoia Capital, General Catalyst, Felicis Ventures, Next47 and more. Physical AI is one of the most consequential technology shifts of our time, and Verkada is at the center of it. You can look at all kinds of communities to see our platform's impact in the world. It's the retailer that uses our agentic AI to deter theft before it happens. The warehouse that uses AI-powered alerts to make sure its team is protected on the floor with proper PPE. The school that's alerted to a threat in real-time and triggers a lockdown in seconds, not minutes. We're rapidly scaling this impact: today, more than 2 million Verkada devices are deployed across 170+ countries. About the Role As a Product Design Mechanical Engineer at Verkada, you'll play a key role in designing and bringing to market our next generation of enterprise intercom products, owning the mechanical design from early concept through mass production. What You'll Do - Generate mechanical solutions for a wide variety of product requirements relevant to enterprise hardware (audio, cameras, buttons, mounting,
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