# FewerJobs export - 100 curated jobs
Generated: 2026-10-03T14:38:52.749Z
Source: https://fewerjobs.com

## Filters applied
- **q**: Socket
- **quality_floor**: default
- **match_401k_strict**: true
- **parental_strict**: true
- **non_birth_strict**: true
- **pto_strict**: true
- **include_older**: false
- **verified_benefits_only**: true
- **apply_url_verified**: false
- **page**: 1
- **per_page**: 100
- **sort**: relevance

## Jobs
### Principal Engineer, Ethernet Systems Design/Architecture - Analog Devices
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-NC-Durham/Principal-Engineer--Ethernet-Systems-Design-Architecture_R260160
- Excerpt: Principal Engineer, Ethernet Systems Design/Architecture 3 Locations posted: Posted 30+ Days Ago

### [Bluetooth] Software/Senior Software/Principal Software Engineer - NXP Semiconductors
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/XMLNAME--Bluetooth--Software-Senior-Software-Principal-Software-Engineer_R-10029318
- Excerpt: [Bluetooth] Software/Senior Software/Principal Software Engineer 2 Locations posted: Posted 30+ Days Ago

### EARC Network Engineer - Baker Hughes
- Location: GB-AC-ABERDEEN-BAKER HUGHES BUILDING (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://bakerhughes.wd5.myworkdayjobs.com/BakerHughes/job/GB-AC-ABERDEEN-BAKER-HUGHES-BUILDING/EARC-Network-Engineer_R165199
- Excerpt: EARC Network Engineer GB-AC-ABERDEEN-BAKER HUGHES BUILDING posted: Posted 2 Days Ago

### Connectivity Service Lead - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Connectivity-Service-Lead_R-10062416
- Excerpt: Connectivity Service Lead Noida posted: Posted 30+ Days Ago

### Senior Software Engineer (SMTS) — Ultra Messaging - Salesforce
- Location: Illinois - Chicago (unspecified)
- Salary: $148K-$224K
- Posted: 2026-05-20
- Parental leave: 26 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://careers.salesforce.com/en/jobs/jr340226/senior-software-engineer-smts-ultra-messaging/
- Excerpt: Senior Software Engineer (SMTS) — Ultra Messaging Illinois - Chicago Role Overview The Senior Software Engineer SMTS role is part of the Ultra Messaging (UM) team, a small, specialized group of engineers building and maintaining one of the industry's most demanding real-time messaging middleware platforms. Ultra Messaging is mission-critical infrastructure for some of the world's largest financial institutions - including major global banks, trading firms, market makers, and exchanges - where microseconds matter and reliability is non-negotiable. The team works remotely with a preference for candidates in the Chicago area, where several team members are based. You'll be working on a mature, production-grade, system-level C codebase that has been powering real-time financial data flows since 2004. If you're a low-level systems programmer who loves performance, concurrency, and working on software that has to work right, every time - this is your role. Responsibilities Analyze requirements for new features, enhancements, and bug fixes; produce clear requirements documents. Evaluate the existing codebase to determine optimal design approaches; produce design documents. Implement changes primarily in the core C layer, with occasional work in Java (via JNI) and .NET (C#) API wrappers for cross-platform support. Write and execute development-level tests to validate correctness and performance. Collaborate with and support QA and customer support engineers throughout the development lifecycle. Occasionally engage directly with customers on technically complex issues when escalation is warranted. Required Skills You have 5+ years of experience writing production-quality C or C++ code. You have hands-on experience with multi-threaded programming , including

### Principal Engineer - IP Verification - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063833
- Excerpt: Principal Engineer - IP Verification Noida posted: Posted Today

### Software Engineer II, Service Network - Slack - Slack
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-28
- Parental leave: 26 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://salesforce.wd12.myworkdayjobs.com/Slack/job/Virginia---Herndon/Software-Engineer-II--Service-Network---Slack_JR341704
- Excerpt: Software Engineer II, Service Network - Slack 2 Locations posted: Posted 15 Days Ago

### Alarm & Accessories - Embedded SDE , Ring - Amazon
- Location: Sunnyvale, California, USA (unspecified)
- Salary: $165K-$224K
- Posted: 2026-04-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10391331/alarm-accessories-embedded-sde-ring
- Excerpt: Alarm & Accessories - Embedded SDE , Ring Sunnyvale, California, USA As a Software Development Engineer, you will be responsible for defining, building and supporting the system design, architecture, and software for Ring IoT products. As a member of our team, you will be interacting closely with the business and cross-functional engineering teams across different organizations to gather engineering requirements, design and implement new features. You will contribute to all aspects of an agile software & systems development life cycle including design, architecture, development, documentation, testing and operations. You are the engineer that works with your team on solving the hard problems; you are technical, you attack every problem with enthusiasm. Key job responsibilities • Dive deep and works to help solve critical design issues involving algorithm, develop hardware/firmware interfaces, IoT interfaces, etc • Participate in design reviews for complex embedded systems, simulations, algorithms and software development owned by your team and partner teams • Influences within your team and partner teams to help drive and develop the technical implementation for overall system designs • Identify and implement process improvements which improve your team's agility. This may include improvements to design, automation, development, test or operations. • Define and/or refine system requirements, participate in the development and delivery of Interoperability-related features such as system health monitoring, diagnostics, repair, and other self-healing automation. • Develop embedded software in C/C++ A day in the life Your work is very hands-on and multi-disciplinary. You will be working closely with vendors, engineers, and product

### Senior Electronic Hardware Engineer - GE Vernova
- Location: Stafford (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Stafford/Senior-Electronic-Hardware-Engineer_R5039517-2
- Excerpt: Senior Electronic Hardware Engineer Stafford posted: Posted 30+ Days Ago

### Principal Mixed-Signal Hardware Engineer - Medtronic
- Location: Galway, County Galway, Ireland (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-03
- Parental leave: 24 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://medtronic.wd1.myworkdayjobs.com/medtroniccareers/job/Galway-County-Galway-Ireland/Principal-Electronics-Hardware-Engineer_R63493-1
- Excerpt: Principal Mixed-Signal Hardware Engineer Galway, County Galway, Ireland posted: Posted 9 Days Ago

### Defect/Integration Engineer - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-26
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Defect-Integration-Engineer_R262760
- Excerpt: Defect/Integration Engineer Ireland, Limerick posted: Posted 17 Days Ago

### [WiFi] Software Engineer / Senior Software Engineer / Principal Software Engineer - NXP Semiconductors
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/XMLNAME--WiFi--Software-Engineer---Senior-Software-Engineer---Principal-Software-Engineer_R-10029317
- Excerpt: [WiFi] Software Engineer / Senior Software Engineer / Principal Software Engineer 2 Locations posted: Posted 30+ Days Ago

### Electronics Hardware Engineer - GE Vernova
- Location: Niskayuna (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Niskayuna/Electronics-Hardware-Engineer_R5041321-1
- Excerpt: Electronics Hardware Engineer Niskayuna posted: Posted 30+ Days Ago

### Principal Hardware Engineer - Raytheon Technologies
- Location: Glenrothes, Fife (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-13
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/Glenrothes-Fife/Principal-Hardware-Engineer_01843574
- Excerpt: Principal Hardware Engineer Glenrothes, Fife posted: Posted 30 Days Ago

### Service Engineer - NXP Semiconductors
- Location: Bangkok (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-25
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangkok/Service-Engineer_R-10060889
- Excerpt: Service Engineer Bangkok posted: Posted 18 Days Ago

### Tape Out Engineer - NXP Semiconductors
- Location: Hsinchu (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/Tape-Out-Engineer_R-10063230
- Excerpt: Tape Out Engineer Hsinchu posted: Posted 30+ Days Ago

### Junior Signal Processing Engineer - Leidos
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Arlington-VA/Junior-Signal-Processing-Engineer_R-00185090
- Excerpt: Junior Signal Processing Engineer 2 Locations posted: Posted Yesterday

### Sr. Hardware Engineer - Leidos
- Location: Oklahoma City, OK (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-04
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Oklahoma-City-OK/Sr-Hardware-Engineer_R-00184849
- Excerpt: Sr. Hardware Engineer Oklahoma City, OK posted: Posted 8 Days Ago

### Lead Hardware Engineer - GE Vernova
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-29
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Wilmington-NC-USA/Lead-Hardware-Engineer_R5043083-2
- Excerpt: Lead Hardware Engineer 3 Locations posted: Posted 14 Days Ago

### Staff Software Engineer, Data Infrastructure - Slack
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-27
- Parental leave: 26 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://salesforce.wd12.myworkdayjobs.com/Slack/job/California---San-Francisco/Staff-Software-Engineer--Data-Infrastructure_JR339840
- Excerpt: Staff Software Engineer, Data Infrastructure 3 Locations posted: Posted 16 Days Ago

### Hardware Engineer - GE Vernova
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-28
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Wilmington-NC-USA/Hardware-Engineer_R5043091-2
- Excerpt: Hardware Engineer 3 Locations posted: Posted 15 Days Ago

### Full Stack Engineer - GO/Java - Comcast Corporation
- Location: TX - Plano, 7900 Windrose Avenue 8th Floor (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-21
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://comcast.wd5.myworkdayjobs.com/Comcast_Careers/job/TX---Plano-7900-Windrose-Avenue-8th-Floor/Full-Stack-Engineer---GO-Java_R437437
- Excerpt: Full Stack Engineer - GO/Java TX - Plano, 7900 Windrose Avenue 8th Floor posted: Posted 22 Days Ago

### Sr. Network Engineer - Core IP Engineering - Comcast Corporation
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://comcast.wd5.myworkdayjobs.com/Comcast_Careers/job/NJ---Mount-Laurel-1800-Bishops-Gate/Sr-Network-Engineer---Core-IP-Engineering_R438664-1
- Excerpt: Sr. Network Engineer - Core IP Engineering 2 Locations posted: Posted Yesterday

### Sr. Network Engineer - Leidos
- Location: Odenton, MD (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Odenton-MD/Sr-Network-Engineer_R-00181592-1
- Excerpt: Sr. Network Engineer Odenton, MD posted: Posted 30+ Days Ago

### Senior Silicon ATE Development Test Engineer, Amazon Leo Silicon Team - Amazon
- Location: Sunnyvale, California, USA (unspecified)
- Salary: $183K-$248K
- Posted: 2026-05-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10420341/senior-silicon-ate-development-test-engineer-amazon-leo-silicon-team
- Excerpt: Senior Silicon ATE Development Test Engineer, Amazon Leo Silicon Team Sunnyvale, California, USA Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role: As Senior Silicon ATE Development Test Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with an internal inter-disciplinary team, and third party suppliers to drive key aspects of product definition, execution and optimization. You must be responsive, flexible and able to succeed within an open collaborative peer environment. You'll be responsible for development and engineering of high-volume production test methodology for custom SoCs for Leo. You'll be part of the team that creates a chip and system test infrastructure and methodology applicable to transmit and receive communication systems. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities In this role you will: - Write test plans and test programs for SoCs tested on Teradyne and Advantest equipment. - Develop and review load board, socket, and probe card designs and simulation results for best layout practices and possible signal / power integrity issues. - Convert test patterns from the DFT team into tester-suitable formats (e.g. ATP). - Run

### Network Engineer - Leidos
- Location: Fort Meade, MD (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Fort-Meade-MD/Network-Engineer_R-00182962
- Excerpt: Network Engineer Fort Meade, MD posted: Posted 30+ Days Ago

### Mechanic I - BASF
- Location: Country / Location United States (unspecified)
- Salary: $33K-$33K
- Posted: 2026-06-12
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://basf.jobs/dark_blue_NA/job/Mechanic-I/128733-en_US/
- Excerpt: Mechanic I Country / Location United States Now hiring! Mechanic I Attapulgus, GA We are looking for a Mechanic I to join our Catalyst team in Attapulgus, GA. Come create chemistry with us! BASF's Catalysts division is the global market leader in catalyst technologies. The division develops and produces mobile emissions catalysts as well as process catalysts and offers precious metals trading, recycling and related products and services. The BASF Attapulgus, Georgia site manufactures catalyst for the global refining industry. The incumbent in this position will provide maintenance mechanical support to BASF Attapulgus Operations with a Safety First mindset. The incumbent will be responsible for installing, maintaining, troubleshooting, and repairing industrial equipment. They will use a variety of hand tools, such as hammers, wrenches, sockets, pliers, and impacts for equipment repair; equipment for welding and cutting for fabrication; as well as calipers, measuring tapes, torque wrenches and lasers for precision maintenance. During your shift as a Mechanic I, you will Diagnose troubleshoot, plan and perform all mechanical operations necessary to modify, dismantle, repair industrial equipment Overhaul and repair all types of difficult and complicated plant machinery and equipment including centrifugal pumps, gearboxes, filter belts, fans and other machinery Process and special equipment involving layout and development Perform work in the mechanic's skill area such as fabrication, assembly, welding, burning, cutting an

### Tier 3, Engineer 4 – Network Solutions Engineer - Comcast Corporation
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://comcast.wd5.myworkdayjobs.com/Comcast_Careers/job/TX---Plano-7900-Windrose-Avenue-8th-Floor/Tier-3--Engineer-4---Network-Solutions-Engineer_R438620
- Excerpt: Tier 3, Engineer 4 – Network Solutions Engineer 2 Locations posted: Posted Yesterday

### Network Implementation Engineer - Leidos
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Chantilly-VA/Network-Implementation-Engineer_R-00175723
- Excerpt: Network Implementation Engineer 2 Locations posted: Posted 30+ Days Ago

### Network Engineer - Mid - Leidos
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Washington-DC/Network-Engineer---Mid_R-00185042
- Excerpt: Network Engineer - Mid 2 Locations posted: Posted 2 Days Ago

### Hardware Engineer - Raytheon Technologies
- Location: CA-AB-CALGARY-111 ~ 919 72nd Ave NE ~ 72ND AVE, Ste A (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/CA-AB-CALGARY-111--919-72nd-Ave-NE--72ND-AVE-Ste-A/Hardware-Engineer_01834341
- Excerpt: Hardware Engineer CA-AB-CALGARY-111 ~ 919 72nd Ave NE ~ 72ND AVE, Ste A posted: Posted 30+ Days Ago

### M&D Hardware Engineer - GE Vernova
- Location: Lisburn (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Lisburn/Hardware-Engineer_R5036398-2
- Excerpt: M&D Hardware Engineer Lisburn posted: Posted 30+ Days Ago

### Sr. Reliability Engineer - Hardware / Electrical - Medtronic
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 24 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://medtronic.wd1.myworkdayjobs.com/medtroniccareers/job/Mounds-View-Minnesota-United-States-of-America/Sr-Reliability-Engineer---Hardware---Electrical_R69254-1
- Excerpt: Sr. Reliability Engineer - Hardware / Electrical 2 Locations posted: Posted 2 Days Ago

### Global Ultrasound Hardware Engineering Leader - Baker Hughes
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://bakerhughes.wd5.myworkdayjobs.com/BakerHughes/job/DE-NW-HURTH-ROBERT-BOSCH-STRASSE-3/Global-Ultrasound-Hardware-Engineering-Leader_R162029-1
- Excerpt: Global Ultrasound Hardware Engineering Leader 2 Locations posted: Posted 30+ Days Ago

### Wireless Systems & Architecture Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Wireless-Systems---Architecture-Engineer_R-10061689
- Excerpt: Wireless Systems & Architecture Engineer Pune posted: Posted 30+ Days Ago

### Hardware Applications Engineer - NXP Semiconductors
- Location: San Jose (Holger Way) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/San-Jose-Holger-Way/Hardware-Applications-Engineer_R-10061640
- Excerpt: Hardware Applications Engineer San Jose (Holger Way) posted: Posted 30+ Days Ago

### Electrical Engineer - Leidos
- Location: 6314 Remote/Teleworker US (remote)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/6314-RemoteTeleworker-US/Electrical-Engineer_R-00180868
- Excerpt: Electrical Engineer 6314 Remote/Teleworker US posted: Posted 30+ Days Ago

### Senior FPGA Engineer - GE Vernova
- Location: Stafford (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-01
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Stafford/Senior-FPGA-Engineer_R5036639-2
- Excerpt: Senior FPGA Engineer Stafford posted: Posted 11 Days Ago

### Senior Engineer, Equipment Engineering - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-05
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Senior-Engineer--Equipment-Engineering_R261267
- Excerpt: Senior Engineer, Equipment Engineering Ireland, Limerick posted: Posted 7 Days Ago

### Senior/Lead SoC Emulation Engineer - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Lead-SoC--Emulation-Engineer_R-10062762
- Excerpt: Senior/Lead SoC Emulation Engineer Noida posted: Posted 29 Days Ago

### Principal Wireless Systems Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Principal-Wireless-Systems-Engineer_R-10061712
- Excerpt: Principal Wireless Systems Engineer Pune posted: Posted 30+ Days Ago

### Systems Integration Engineering - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Systems-Integration-Engineering_R261061
- Excerpt: Systems Integration Engineering Ireland, Limerick posted: Posted 30+ Days Ago

### Principal Hardware Design Engineer - Raytheon Technologies
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-TEWKSBURY-TB1--50-Apple-Hill-Dr--ASSABET-BLDG/Principal-Hardware-Design-Engineer_01835793
- Excerpt: Principal Hardware Design Engineer 2 Locations posted: Posted 30+ Days Ago

### Relay Settings Engineer - Leidos
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-08
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/6314-RemoteTeleworker-US/Relay-Settings-Engineer_R-00180648
- Excerpt: Relay Settings Engineer 2 Locations posted: Posted 4 Days Ago

### Network Design Engineer - Leidos
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Chantilly-VA/Network-Design-Engineer_R-00175724
- Excerpt: Network Design Engineer 2 Locations posted: Posted 30+ Days Ago

### Senior Radio Frequency Electrical Engineer - Leidos
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Atlanta-GA/Senior-Radio-Frequency-Electrical-Engineer_R-00185241
- Excerpt: Senior Radio Frequency Electrical Engineer 3 Locations posted: Posted Yesterday

### Principal Engineer, Power Architecture - Analog Devices
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/Principal-Engineer--Power-Systems-Engineering_R263013
- Excerpt: Principal Engineer, Power Architecture 3 Locations posted: Posted Today

### Graduate Engineer - Baker Hughes
- Location: GB-AN-MONTROSE-CHARLETON ROAD (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-03
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://bakerhughes.wd5.myworkdayjobs.com/BakerHughes/job/GB-AN-MONTROSE-CHARLETON-ROAD/Graduate-Engineer_R164216
- Excerpt: Graduate Engineer GB-AN-MONTROSE-CHARLETON ROAD posted: Posted 9 Days Ago

### Senior Hardware/Software Co-Design Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer--HW-SW-Co-Design_R-10062895-1
- Excerpt: Senior Hardware/Software Co-Design Engineer Pune posted: Posted 30+ Days Ago

### Staff Engineer - RTL Design - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Staff-Engineer---RTL-Design_R-10063106
- Excerpt: Staff Engineer - RTL Design Noida posted: Posted 30+ Days Ago

### Senior Hardware Design Engineer - Raytheon Technologies
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-TEWKSBURY-TB1--50-Apple-Hill-Dr--ASSABET-BLDG/Senior-Hardware-Design-Engineer_01835792
- Excerpt: Senior Hardware Design Engineer 2 Locations posted: Posted 30+ Days Ago

### Sr Engineer, Systems Design - Network Solutions Engineering - T-Mobile US
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://tmobile.wd1.myworkdayjobs.com/External/job/Overland-Park-Kansas/Sr-Engineer--Systems-Design---Network-Solutions-Engineering_REQ356934-1
- Excerpt: Sr Engineer, Systems Design - Network Solutions Engineering 2 Locations posted: Posted Today

### Engineer - Electrical - GE Vernova
- Location: Chennai (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Chennai/Engineer---Mechanical_R5043877-2
- Excerpt: Engineer - Electrical Chennai posted: Posted 2 Days Ago

### Network Engineer - Rockwell Automation
- Location: Katowice, Poland (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://rockwellautomation.wd1.myworkdayjobs.com/External_Rockwell_Automation/job/Katowice-Poland/Engineer--Firmware-Test_R25-9851-1
- Excerpt: Network Engineer Katowice, Poland posted: Posted 3 Days Ago

### Principal Digital IP Verification Engineer (f/m/d) - NXP Semiconductors
- Location: Munich (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Principal-Digital-IP-Verification-Engineer--f-m-d-_R-10063818
- Excerpt: Principal Digital IP Verification Engineer (f/m/d) Munich posted: Posted Yesterday

### Principal Engineer - FPGA - Baker Hughes
- Location: US-NY-SKANEATELES-721 VISIONS DRIVE (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://bakerhughes.wd5.myworkdayjobs.com/BakerHughes/job/US-NY-SKANEATELES-721-VISIONS-DRIVE/Electrical-Engineer---FPGA_R156053-1
- Excerpt: Principal Engineer - FPGA US-NY-SKANEATELES-721 VISIONS DRIVE posted: Posted 30+ Days Ago

### Electrical Hardware Engineer - Rockwell Automation
- Location: Katowice, Poland (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://rockwellautomation.wd1.myworkdayjobs.com/External_Rockwell_Automation/job/Katowice-Poland/Electrical-Hardware-Engineer_R26-467
- Excerpt: Electrical Hardware Engineer Katowice, Poland posted: Posted 30+ Days Ago

### Semiconductor Equipment Engineer - 4th shift - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---4th-shift_01851612
- Excerpt: Semiconductor Equipment Engineer - 4th shift US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 2 Days Ago

### FPGA Engineer - Leidos
- Location: San Diego, CA (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-26
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/San-Diego-CA/FPGA-Engineer_R-00181805
- Excerpt: FPGA Engineer San Diego, CA posted: Posted 17 Days Ago

### Power Hardware Engineer - Rockwell Automation
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://rockwellautomation.wd1.myworkdayjobs.com/External_Rockwell_Automation/job/Mequon-Wisconsin-United-States/Power-Hardware-Engineer_R26-2737
- Excerpt: Power Hardware Engineer 2 Locations posted: Posted 30+ Days Ago

### Drill Bits Application Engineer - Baker Hughes
- Location: US-AK-ANCHORAGE-795 EAST 94TH AVENUE (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://bakerhughes.wd5.myworkdayjobs.com/BakerHughes/job/US-AK-ANCHORAGE-795-EAST-94TH-AVENUE/Drill-Bits-Application-Engineer_R164995
- Excerpt: Drill Bits Application Engineer US-AK-ANCHORAGE-795 EAST 94TH AVENUE posted: Posted Yesterday

### Principal Digital IP Design Engineer (f/m/d) - NXP Semiconductors
- Location: Munich (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Principal-Digital-IP-Design-Engineer--f-m-d-_R-10063823
- Excerpt: Principal Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday

### Network Engineer III - Leidos
- Location: Bluemont, VA (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Bluemont-VA/Network-Engineer-III_R-00185291
- Excerpt: Network Engineer III Bluemont, VA posted: Posted Yesterday

### Staff Mixed-Signal Design Engineer - Analog Devices
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Cork/Staff-Mixed-Signal-Design-Engineer_R260356
- Excerpt: Staff Mixed-Signal Design Engineer 3 Locations posted: Posted 29 Days Ago

### Staff Engineer, Power Systems Applications - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Staff-Engineer--Systems-Applications_R260323
- Excerpt: Staff Engineer, Power Systems Applications Ireland, Limerick posted: Posted 30+ Days Ago

### Senior Hardware Verification Engineer - NXP Semiconductors
- Location: Hyderabad (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Hardware-Verification-Engineer_R-10062078
- Excerpt: Senior Hardware Verification Engineer Hyderabad posted: Posted 30+ Days Ago

### Wireless Systems Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Wireless-Systems-Engineer_R-10061711
- Excerpt: Wireless Systems Engineer Pune posted: Posted 30+ Days Ago

### Principal Electrical Engineer - FPGA Design - Raytheon Technologies
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-TEWKSBURY-TB1--50-Apple-Hill-Dr--ASSABET-BLDG/Principal-Electrical-Engineer---FPGA-Design_01834832
- Excerpt: Principal Electrical Engineer - FPGA Design 2 Locations posted: Posted 30+ Days Ago

### Staff Power Applications Engineer - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Senior-Engineer--Product-Applications_R261172-1
- Excerpt: Staff Power Applications Engineer Ireland, Limerick posted: Posted 30+ Days Ago

### Senior Network Engineer - Plex - Rockwell Automation
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://rockwellautomation.wd1.myworkdayjobs.com/External_Rockwell_Automation/job/Troy-Michigan-United-States/Senior-Network-Engineer---Plex_R26-1686
- Excerpt: Senior Network Engineer - Plex 3 Locations posted: Posted 30+ Days Ago

### Senior Network Engineer - Leidos
- Location: Chantilly, VA (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Chantilly-VA/Senior-Network-Engineer_R-00183112
- Excerpt: Senior Network Engineer Chantilly, VA posted: Posted 30+ Days Ago

### Principal Engineer - IP Verification - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063216
- Excerpt: Principal Engineer - IP Verification Noida posted: Posted 30+ Days Ago

### SoC Hardware Architect - NXP Semiconductors
- Location: Austin (Oakhill, Office) (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-05
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/SoC-Hardware-Architect_R-10063821
- Excerpt: SoC Hardware Architect Austin (Oakhill, Office) posted: Posted 7 Days Ago

### Staff Mixed-Signal Design Engineer - Analog Devices
- Location: 5 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-01
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-TX-Austin-Plaza-on-the-Lake/Staff-Mixed-Signal-Design-Engineer_R262382
- Excerpt: Staff Mixed-Signal Design Engineer 5 Locations posted: Posted 11 Days Ago

### Staff Mixed-Signal Design Engineer - Analog Devices
- Location: 5 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/Staff-Mixed-Signal-Design-Engineer_R261671
- Excerpt: Staff Mixed-Signal Design Engineer 5 Locations posted: Posted 30+ Days Ago

### Staff Android Engineer - CVS Health Corporation
- Location: IRL - Galway (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://cvshealth.wd1.myworkdayjobs.com/CVS_Health_Careers/job/IRL---Galway/Staff-Android-Engineer_R0941833
- Excerpt: Staff Android Engineer IRL - Galway posted: Posted Today

### Senior DfT Engineer - NXP Semiconductors
- Location: Caen (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Caen/Senior-DfT-Engineer_R-10062175
- Excerpt: Senior DfT Engineer Caen posted: Posted 30+ Days Ago

### Graduate Engineer - Facilities Department - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Associate-Engineer--Facilities-Engineering_R257004
- Excerpt: Graduate Engineer - Facilities Department Ireland, Limerick posted: Posted 30+ Days Ago

### Senior Digital IP Verification Engineer (f/m/d) - NXP Semiconductors
- Location: Munich (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Verification-Engineer--f-m-d-_R-10063820
- Excerpt: Senior Digital IP Verification Engineer (f/m/d) Munich posted: Posted Yesterday

### Equipment Engineer - NXP Semiconductors
- Location: Kuala Lumpur (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kuala-Lumpur/Equipment-Engineer_R-10062577-1
- Excerpt: Equipment Engineer Kuala Lumpur posted: Posted 30+ Days Ago

### Staff Firmware Engineer - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Staff-Firmware-Engineer_R262138-1
- Excerpt: Staff Firmware Engineer Ireland, Limerick posted: Posted 30+ Days Ago

### Senior Manager, IP Network Engineering - Verizon Communications
- Location: Limerick, Ireland (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-25
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://verizon.wd12.myworkdayjobs.com/verizon-careers/job/Limerick-Ireland/Senior-Manager--IP-Network-Engineering_R-1095518-1
- Excerpt: Senior Manager, IP Network Engineering Limerick, Ireland posted: Posted 18 Days Ago

### Staff / Principal Semiconductor Device Engineer (FinFET Technologies) - NXP Semiconductors
- Location: Hsinchu (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/Staff---Principal-Semiconductor-Device-Engineer--FinFET-Technologies-_R-10063867
- Excerpt: Staff / Principal Semiconductor Device Engineer (FinFET Technologies) Hsinchu posted: Posted 3 Days Ago

### Principal Engineer - IP Verification - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063215
- Excerpt: Principal Engineer - IP Verification Noida posted: Posted 29 Days Ago

### Data Loss Prevention Engineer - NXP Semiconductors
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-31
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Data-Loss-Prevention-Engineer_R-10063667
- Excerpt: Data Loss Prevention Engineer 2 Locations posted: Posted 12 Days Ago

### Reliability Engineer I - Hardware / Electrical - Medtronic
- Location: Mounds View, Minnesota, United States of America (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 24 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://medtronic.wd1.myworkdayjobs.com/medtroniccareers/job/Mounds-View-Minnesota-United-States-of-America/Reliability-Engineer-I---Hardware---Electrical_R68475-1
- Excerpt: Reliability Engineer I - Hardware / Electrical Mounds View, Minnesota, United States of America posted: Posted 2 Days Ago

### Network Systems Engineer - Leidos
- Location: Odenton, MD (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Odenton-MD/Network-Systems-Engineer_R-00182513
- Excerpt: Network Systems Engineer Odenton, MD posted: Posted 30+ Days Ago

### Lead Control Automation Hardware Engineer - GE Vernova
- Location: Stafford (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Stafford/Lead-Control-Automation-Hardware-Engineer_R5043970-2
- Excerpt: Lead Control Automation Hardware Engineer Stafford posted: Posted Yesterday

### Senior Digital IP Design Engineer (f/m/d) - NXP Semiconductors
- Location: Munich (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Design-Engineer--f-m-d-_R-10063822
- Excerpt: Senior Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday

### Staff Engineer, Product Applications - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Staff-Engineer--Product-Applications_R261911
- Excerpt: Staff Engineer, Product Applications Ireland, Limerick posted: Posted 30+ Days Ago

### Senior Network Tool Engineer - Leidos
- Location: Chantilly, VA (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Chantilly-VA/Senior-Network-Tool-Engineer_R-00172543
- Excerpt: Senior Network Tool Engineer Chantilly, VA posted: Posted 30+ Days Ago

### Controls Hardware Engineer - GE Vernova
- Location: Stafford (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-13
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Stafford/Controls-Hardware-Engineer_R5041378
- Excerpt: Controls Hardware Engineer Stafford posted: Posted 30 Days Ago

### Digital IP Engineer - NXP Semiconductors
- Location: Bangalore (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Digital-IP-Engineer_R-10063817
- Excerpt: Digital IP Engineer Bangalore posted: Posted 3 Days Ago

### Hardware Engineering - Lab Lead II - Raytheon Technologies
- Location: US-MA-ANDOVER-AN2 ~ 352 Lowell St ~ AN2 HAMPSHIRE BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AN2--352-Lowell-St--AN2-HAMPSHIRE-BLDG/Hardware-Engineering---Lab-Lead-II_01848150
- Excerpt: Hardware Engineering - Lab Lead II US-MA-ANDOVER-AN2 ~ 352 Lowell St ~ AN2 HAMPSHIRE BLDG posted: Posted Yesterday

### Full Stack Engineer, Staff Platform DevXP - Slack
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 26 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://salesforce.wd12.myworkdayjobs.com/Slack/job/California---San-Francisco/Staff-Full-Stack-Engineer--Platform-DevXP_JR332802
- Excerpt: Full Stack Engineer, Staff Platform DevXP 2 Locations posted: Posted 2 Days Ago

### Network Switch Engineer - Verizon Communications
- Location: Wall Township, New Jersey (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-27
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://verizon.wd12.myworkdayjobs.com/verizon-careers/job/Wall-Township-New-Jersey/Network-Switch-Engineer_R-1095598
- Excerpt: Network Switch Engineer Wall Township, New Jersey posted: Posted 16 Days Ago

### Senior Principal Hardware Design Engineer - Raytheon Technologies
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-TEWKSBURY-TB1--50-Apple-Hill-Dr--ASSABET-BLDG/Senior-Principal-Hardware-Design-Engineer_01832932
- Excerpt: Senior Principal Hardware Design Engineer 2 Locations posted: Posted 30+ Days Ago

### Mulesoft Engineer - Amgen
- Location: India - Hyderabad (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://amgen.wd1.myworkdayjobs.com/Careers/job/India---Hyderabad/Mulesoft-Engineer_R-220054
- Excerpt: Mulesoft Engineer India - Hyderabad posted: Posted 30+ Days Ago

### Transport Network Engineer II - Leidos
- Location: Stuttgart, Germany (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Stuttgart-Germany/Transport-Network-Engineer-II_R-00185124
- Excerpt: Transport Network Engineer II Stuttgart, Germany posted: Posted 3 Days Ago

### Audio Algorithm Engineer F/M - NXP Semiconductors
- Location: Sophia-Antipolis (Valbonne) (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-04
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Sophia-Antipolis-Valbonne/Audio-Algorithm-Engineer-F-M_R-10060962
- Excerpt: Audio Algorithm Engineer F/M Sophia-Antipolis (Valbonne) posted: Posted 8 Days Ago

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Source-backed benefit claims include source links; other benefit values are labeled separately.