# FewerJobs export - 100 curated jobs
Generated: 2026-08-13T02:16:41.349Z
Source: https://fewerjobs.com

## Filters applied
- **q**: Navitas Semiconductor
- **quality_floor**: default
- **match_401k_strict**: true
- **parental_strict**: true
- **non_birth_strict**: true
- **pto_strict**: true
- **include_older**: false
- **verified_benefits_only**: true
- **apply_url_verified**: false
- **page**: 1
- **per_page**: 100
- **sort**: relevance

## Jobs
### SOC L3 Analyst - NXP Semiconductors
- Location: Bucharest (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bucharest/SOC-L3-Analyst_R-10061886-1
- Excerpt: SOC L3 Analyst Bucharest posted: Posted 30+ Days Ago

### Semiconductor Assembler - NXP Semiconductors
- Location: Kuala Lumpur (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kuala-Lumpur/Semiconductor-Assembler_R-10057883
- Excerpt: Semiconductor Assembler Kuala Lumpur posted: Posted 30+ Days Ago

### CVD PM Machinist - Semiconductor Maintenance - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---EPI_R-10060359
- Excerpt: CVD PM Machinist - Semiconductor Maintenance Chandler (Manufacturing) posted: Posted 30+ Days Ago

### SYSTEMS VALIDATION - NXP Semiconductors
- Location: Bangalore (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/SYSTEMS-VALIDATION_R-10062972
- Excerpt: SYSTEMS VALIDATION Bangalore posted: Posted 30+ Days Ago

### Semiconductor Maintenance Technician – Diffusion/Cleans - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Diffusion-Cleans_R-10062137-1
- Excerpt: Semiconductor Maintenance Technician – Diffusion/Cleans Chandler (Manufacturing) posted: Posted 30+ Days Ago

### Semiconductor Maintenance Technician - CVD - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-19
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---CVD_R-10063494
- Excerpt: Semiconductor Maintenance Technician - CVD Chandler (Manufacturing) posted: Posted 24 Days Ago

### Semiconductor Maintenance Technician – Etch PM Machinist - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-22
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Etch-PM-Machinist_R-10063545
- Excerpt: Semiconductor Maintenance Technician – Etch PM Machinist Chandler (Manufacturing) posted: Posted 21 Days Ago

### Semiconductor Maintenance Technician – Etch/Metals - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Etch-Metals_R-10062909
- Excerpt: Semiconductor Maintenance Technician – Etch/Metals Chandler (Manufacturing) posted: Posted 30+ Days Ago

### Semiconductor Maintenance Technician – Etch/Metals - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-30
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Etch-Metals_R-10063543-1
- Excerpt: Semiconductor Maintenance Technician – Etch/Metals Chandler (Manufacturing) posted: Posted 13 Days Ago

### Semiconductor Design Engineer (Teradyne, Costa Rica) - Teradyne
- Location: Semiconductor Design Engineer (Teradyne, Costa Rica) (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://jobs.teradyne.com/Teradyne/job/Alajuela-Semiconductor-Design-Engineer-%28Teradyne%2C-Costa-Rica%29/1397296700/
- Excerpt: Semiconductor Design Engineer (Teradyne, Costa Rica) Semiconductor Design Engineer (Teradyne, Costa Rica) We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive. Opportunity Overview We're looking for a highly experienced Senior Analog Layout Engineer to join our semiconductor design team. In this role, you will lead the physical layout and verification of complex analog and mixed-signal ASICs in advanced FinFET technologies, helping deliver the next generation of Teradyne's test and automation platforms. You'll collaborate closely with circuit designers, physical design engineers, and cross-functional partners to create high-quality, manufacturable layouts that meet demanding performance, reliability, and schedule targets. Key Responsibilities Lead the layout design and integration of complex analog and mixed-signal ASIC blocks using Cadence Virtuoso. Develop floorplans, placement, routing, and top-le

### Semiconductor Maintenance Technician - CMP - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---CMP_R-10063918
- Excerpt: Semiconductor Maintenance Technician - CMP Chandler (Manufacturing) posted: Posted Yesterday

### Semiconductor Maintenance Technician - Photo - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Photo_R-10060144
- Excerpt: Semiconductor Maintenance Technician - Photo Chandler (Manufacturing) posted: Posted 30+ Days Ago

### Chip Architect - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-26
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Chip-Architect_R-10062865
- Excerpt: Chip Architect Pune posted: Posted 17 Days Ago

### Senior Lead Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-27
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Lead-Engineer_R-10063517
- Excerpt: Senior Lead Engineer Pune posted: Posted 16 Days Ago

### Service Engineer - NXP Semiconductors
- Location: Bangkok (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-25
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangkok/Service-Engineer_R-10060889
- Excerpt: Service Engineer Bangkok posted: Posted 18 Days Ago

### Semiconductor Maintenance Technician – Machine Shop - NXP Semiconductors
- Location: Chandler (Office) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Office/Semiconductor-Maintenance-Technician---Machine-Shop_R-10061682
- Excerpt: Semiconductor Maintenance Technician – Machine Shop Chandler (Office) posted: Posted 30+ Days Ago

### Network SME - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Lead-Network-and-Connectivity-Engineer_R-10062422
- Excerpt: Network SME Noida posted: Posted 30+ Days Ago

### Senior Principle Engineer - SoC Design Verification - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principle-Engineer---SoC-Design-Verification_R-10061929
- Excerpt: Senior Principle Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago

### Principal DFT Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Principle-DFT-Engineer_R-10062708-1
- Excerpt: Principal DFT Engineer Pune posted: Posted 30+ Days Ago

### Senior Engineer - SoC Design Verification - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer---SoC-Design-Verification_R-10062405
- Excerpt: Senior Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago

### Senior Principal Engineer - SoC Design Verification - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principle-Engineer---SoC-Design-Verification_R-10062973
- Excerpt: Senior Principal Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago

### Director/Chip Architect - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Director-Chip-Architect_R-10062315
- Excerpt: Director/Chip Architect Pune posted: Posted 30+ Days Ago

### Senior Analog IC Design F/M - NXP Semiconductors
- Location: Catania (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Senior-Analog-IC-Design-F-M_R-10063803
- Excerpt: Senior Analog IC Design F/M Catania posted: Posted Yesterday

### Senior/Lead SoC Emulation Engineer - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Lead-SoC--Emulation-Engineer_R-10062762
- Excerpt: Senior/Lead SoC Emulation Engineer Noida posted: Posted 29 Days Ago

### Senior Engineer - SoC Design Engineering - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer---SoC-Design-Engineering_R-10062288
- Excerpt: Senior Engineer - SoC Design Engineering Pune posted: Posted 30+ Days Ago

### Embedded Systems Engineer - NXP Semiconductors
- Location: Roznov (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Roznov/Embedded-Systems-Engineer_R-10060346-1
- Excerpt: Embedded Systems Engineer Roznov posted: Posted 30+ Days Ago

### Senior Principal Engineer, Analog Validation/Characterization - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-19
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Principal-Engineer--Analog-Validation-Characterization_R-10062839
- Excerpt: Senior Principal Engineer, Analog Validation/Characterization Noida posted: Posted 24 Days Ago

### Principal Design Engineer - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Design-Engineer_R-10061782
- Excerpt: Principal Design Engineer Noida posted: Posted 30+ Days Ago

### Precision Analog Data Converter Design - NXP Semiconductors
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-25
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Precision-Analog-Data-Converter-Design_R-10063473
- Excerpt: Precision Analog Data Converter Design 2 Locations posted: Posted 18 Days Ago

### Touch Sensor Hardware Engineer, Consumer Hardware - Google
- Location: New Taipei, Banqiao District, New Taipei City, Taiwan (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-03
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckRioIquBPIKy6ifFQ-h5Kq8Q0nhQ1TqIC5OCddVY28WZEjsACxwdTLz7lvbeg7obp0AtjJy4KhId6yMIpltz9az38JAJYZCDQcf8OXCMN4yiJOspB61sMOsJgIcGYA%3D%3D_V2&loc=TW&title=Touch+Sensor+Hardware+Engineer
- Excerpt: Touch Sensor Hardware Engineer, Consumer Hardware New Taipei, Banqiao District, New Taipei City, Taiwan Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Lead the development and integration of on-cell touch solutions, focusing on the interaction between touch sensors and Thin Film Encapsulation (TFE) for plastic Organic Light Emitting Diode (OLED). Partner with vendors to optimize Touch IC architecture (Analog Front End (AFE)/Microcontroller Unit (MCU)) and firmware algorithms to ensure high-levels of noise immunity and system performance. Define Engineering Requirements Specifications (ERS) and execute validation plans, including testing during early-stage development (Proto/EVT) and deep-dive failure analysis on complex modes. Manage technical dependencies between display driving and touch sensing to mitigate noise interference and ensure signal integrity in high-proximity architectures. Oversee physical engineering design layouts and manage display/touch vendors to ensure quality and perform root cause diagnosis for system-level issues during high-volume production ramps. Minimum qualifications: Bachelor's degree in Electrical Engineering, Physics, Materials Science, or a related field or equivalent practical experience. 2 years of experience in touch sensor module development, including

### Principal SOC Verification Engineer - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-SOC-Verification-Engineer_R-10063252
- Excerpt: Principal SOC Verification Engineer Noida posted: Posted 29 Days Ago

### Semiconductor Maintenance Technician – CMP Rebuild/PM Machinist - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---CMP-Rebuild-PM-Machinist_R-10063128
- Excerpt: Semiconductor Maintenance Technician – CMP Rebuild/PM Machinist Chandler (Manufacturing) posted: Posted 30+ Days Ago

### Staff / Principal Semiconductor Device Engineer (FinFET Technologies) - NXP Semiconductors
- Location: Hsinchu (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/Staff---Principal-Semiconductor-Device-Engineer--FinFET-Technologies-_R-10063867
- Excerpt: Staff / Principal Semiconductor Device Engineer (FinFET Technologies) Hsinchu posted: Posted 3 Days Ago

### Senior Hardware Verification Engineer - NXP Semiconductors
- Location: Hyderabad (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Hardware-Verification-Engineer_R-10062078
- Excerpt: Senior Hardware Verification Engineer Hyderabad posted: Posted 30+ Days Ago

### Principal Engineer - IP Verification - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063833
- Excerpt: Principal Engineer - IP Verification Noida posted: Posted Today

### CMP SEMICONDUCTOR EQUIPMENT TECHNICIAN - NXP Semiconductors
- Location: Austin (Ed Bluestein, Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Ed-Bluestein-Manufacturing/CMP-SEMICONDUCTOR-EQUIPMENT-TECHNICIAN_R-10063018
- Excerpt: CMP SEMICONDUCTOR EQUIPMENT TECHNICIAN Austin (Ed Bluestein, Manufacturing) posted: Posted 30+ Days Ago

### IP Design Engineer - NXP Semiconductors
- Location: Bangalore (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/IP-Design-Engineer_R-10063815
- Excerpt: IP Design Engineer Bangalore posted: Posted 3 Days Ago

### NVM Engineer - NXP Semiconductors
- Location: Kuala Lumpur (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-28
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kuala-Lumpur/NVM-Engineer_R-10063134
- Excerpt: NVM Engineer Kuala Lumpur posted: Posted 15 Days Ago

### Semiconductor Maintenance Technician – Etch PM Machinist - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Etch-PM-Machinist_R-10062911
- Excerpt: Semiconductor Maintenance Technician – Etch PM Machinist Chandler (Manufacturing) posted: Posted 30+ Days Ago

### Senior Principal SoC Design Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principal-SoC-Design-Engineer_R-10062451
- Excerpt: Senior Principal SoC Design Engineer Pune posted: Posted 30+ Days Ago

### CVD PM Machinist - Semiconductor Maintenance Technician - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---CVD_R-10062136
- Excerpt: CVD PM Machinist - Semiconductor Maintenance Technician Chandler (Manufacturing) posted: Posted 30+ Days Ago

### Principal Analog Design engineer - NXP Semiconductors
- Location: Hyderabad (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Principal-Analog-Design-engineer_R-10062401
- Excerpt: Principal Analog Design engineer Hyderabad posted: Posted 30+ Days Ago

### Candidature Spontanée / Spontaneous Application – NXP Semiconductors France - NXP Semiconductors
- Location: 5 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Toulouse/General-Job-Application-Candidature-Spontane_R-10014465
- Excerpt: Candidature Spontanée / Spontaneous Application – NXP Semiconductors France 5 Locations posted: Posted 30+ Days Ago

### Semiconductor Maintenance Technician – Diffusion Quartz & PM Machinist - NXP Semiconductors
- Location: Chandler (Manufacturing) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-26
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Manufacturing/Semiconductor-Maintenance-Technician---Diffusion-Quartz---PM-Machinist_R-10063646
- Excerpt: Semiconductor Maintenance Technician – Diffusion Quartz & PM Machinist Chandler (Manufacturing) posted: Posted 17 Days Ago

### Principle Engineer - SoC Design Verification - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Principle-Engineer---SoC-Design-Verification_R-10062408-1
- Excerpt: Principle Engineer - SoC Design Verification Pune posted: Posted 30+ Days Ago

### NPU Accelerator SW Engineer - NXP Semiconductors
- Location: Bucharest (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bucharest/NPU-Accelerator-SW-Engineer_R-10063989
- Excerpt: NPU Accelerator SW Engineer Bucharest posted: Posted Today

### Semiconductor Assembler - The Boeing Company
- Location: USA - Sylmar, CA (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://boeing.wd1.myworkdayjobs.com/External_Careers/job/USA---Sylmar-CA/Semiconductor-Assembler_00000267573
- Excerpt: Semiconductor Assembler USA - Sylmar, CA posted: Posted 30+ Days Ago

### Semiconductor Materials Section Manager 2 - Northrop Grumman
- Location: United States-California-Manhattan Beach (unspecified)
- Salary: $161K-$242K
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.northropgrumman.com/careers/job/1340072086975
- Excerpt: Semiconductor Materials Section Manager 2 United States-California-Manhattan Beach RELOCATION ASSISTANCE: No relocation assistance available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. The Semiconductor Materials group of Northrop Grumman Mission Systems (NGMS) is seeking a Semiconductor Materials Section Manager for Advanced Semiconductor Materials Development, reporting to the Department Manager for our Space Park Foundry (SPF). Located in Manhattan Beach, Los Angeles, we design, manufacture, and test semiconductor products for internal and commercial production customers, as well as emerging technology programs. Northrop Grumman's SPF semiconductor foundry is a unique capability supporting a range of production microelectroni

### Senior Hardware ASIC Arch/Design Engineer - NXP Semiconductors
- Location: Hyderabad (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Hardware-ASIC-Arch-Design-Engineer_R-10061529
- Excerpt: Senior Hardware ASIC Arch/Design Engineer Hyderabad posted: Posted 30+ Days Ago

### Distribution Sales - IoT - NXP Semiconductors
- Location: Seoul (Jung-gu) (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Seoul-Jung-gu/Distribution-Sales---IoT_R-10061507
- Excerpt: Distribution Sales - IoT Seoul (Jung-gu) posted: Posted 3 Days Ago

### Sales Representative for Semiconductor Business - 3M
- Location: JP, OSAKA, VIRTUAL (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://3m.wd1.myworkdayjobs.com/Search/job/JP-OSAKA-VIRTUAL/Sales-Representative-for-Semiconductor-Business_R01164211
- Excerpt: Sales Representative for Semiconductor Business JP, OSAKA, VIRTUAL posted: Posted 30+ Days Ago

### Mergers & Acquisition, Lead Transaction Principal - Teradyne
- Location: North Reading, MA (unspecified)
- Salary: $220K-$352K
- Posted: 2026-06-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://jobs.teradyne.com/Teradyne/job/North-Reading-Mergers-&-Acquisition%2C-Lead-Transaction-Principal-MA/1389582400/
- Excerpt: Mergers & Acquisition, Lead Transaction Principal North Reading, MA ABOUT TERADYNE Teradyne is a global leader in automated test equipment and industrial automation, enabling customers across the semiconductor, electronics, and advanced manufacturing ecosystem to accelerate innovation and deliver high-quality products at scale. Across semiconductor test, system-level and wafer-level test, photonics, and adjacent semiconductor capital equipment, Teradyne operates at the intersection of deep engineering, complex supply chains, and long investment cycles. Strategic M&A plays a critical role in expanding Teradyne's served markets and strengthening long-term technology leadership. OPPORTUNITY OVERVIEW Teradyne is seeking a Lead Transaction Principal to own and execute mergers, acquisitions, divestitures, and strategic technology transactions across its semiconductor and semiconductor capital equipment businesses. This role carries end-to-end accountability for transactions from early assessment through execution, signing, and close, and requires close partnership with engineering, product, operational, and executive leadership. KEY RESPONSIBILITIES Own end-to-end M&A and strategic transactions across semiconductor test, wafer-level test, system-level test, and adjacent semiconductor capital equipment segments. Lead deal strategy, valuation framing, and execution from early evaluation through closing. Lead cross-functional deal teams spanning engineering, product management, operations, finance, legal, tax, HR, and IT. Evaluate target technologies,

### Staff Analog Validation Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Staff-Analog-Validation-Engineer_R-10062934
- Excerpt: Staff Analog Validation Engineer Pune posted: Posted 30+ Days Ago

### 3M 기술연구소 테크니션(Technician, Semiconductor lab) - 3M
- Location: KR, Gyeonggi-do, Hwaseong (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-23
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://3m.wd1.myworkdayjobs.com/Search/job/KR-Gyeonggi-do-Hwaseong/XMLNAME-3M---Technician---Semiconductor-lab-_R01165539
- Excerpt: 3M 기술연구소 테크니션(Technician, Semiconductor lab) KR, Gyeonggi-do, Hwaseong posted: Posted 20 Days Ago

### Electronics Hardware Engineer - GE Vernova
- Location: Niskayuna (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Niskayuna/Electronics-Hardware-Engineer_R5041321-1
- Excerpt: Electronics Hardware Engineer Niskayuna posted: Posted 30+ Days Ago

### Semiconductor Equipment Engineer - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer_01851347
- Excerpt: Semiconductor Equipment Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 3 Days Ago

### Senior Mixed Signal Verification Engineer - NXP Semiconductors
- Location: Catania (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-04
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Senior-Mixed-Signal-Verification-Engineer_R-10063611
- Excerpt: Senior Mixed Signal Verification Engineer Catania posted: Posted 8 Days Ago

### Semiconductor Equipment Engineer - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer_01835317
- Excerpt: Semiconductor Equipment Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago

### Senior Wet Etch Equipment Engineer, Raxium - Google
- Location: Fremont, CA, USA (unspecified)
- Salary: $144K-$209K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckcooGbS6K6Xp3QclKMmcQg6IQ2zEa6i_KRHwZDProXg3EjsACxwdTBzoMGryBawcP7ITZT1KIIOvVTzHn0An9SjgnmXxoFxTMi0Bn7Snc9TSvOft-ByKcOpi8GxdSw%3D%3D_V2&loc=US&title=Senior+Wet+Etch+Equipment+Engineer
- Excerpt: Senior Wet Etch Equipment Engineer, Raxium Fremont, CA, USA The Raxium Facility and Equipment team maintains a broad range of semiconductor and facility equipment and cleanroom infrastructure. Our expertise lies in understanding the relationship between semiconductor processing and its support equipment, enabling us to troubleshoot problems, execute tasks and collaborate on installing, modifying, maintaining and repairing cleanroom and facility support equipment. As a Senior Equipment Engineer, you will support our microLED and AR development. You will focus on expert-level maintenance, support and optimization of our semiconductor wet processing equipment. Supporting advanced wet processing equipment, you will assist with other critical tool sets if needed, including but not limited to automated wet benches, chemical handling, ECP, CMP, SRDs and CDUs. You will support installations, troubleshoot complex issues and perform preventive maintenance to maximize the reliability and performance of our toolsets.Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $144000 - $209000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Support semiconductor equipment

### Senior Hardware Engineer - ESSM Launcher - Raytheon Technologies
- Location: US-RI-PORTSMOUTH-PS3 ~ 1847 W Main Rd ~ NIMITZ WEST BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-RI-PORTSMOUTH-PS3--1847-W-Main-Rd--NIMITZ-WEST-BLDG/Senior-Hardware-Engineer---ESSM-Launcher_01833557
- Excerpt: Senior Hardware Engineer - ESSM Launcher US-RI-PORTSMOUTH-PS3 ~ 1847 W Main Rd ~ NIMITZ WEST BLDG posted: Posted 2 Days Ago

### Semiconductor Equipment Engineer - 3rd Shift - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---3rd-Shift_01851618
- Excerpt: Semiconductor Equipment Engineer - 3rd Shift US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 3 Days Ago

### Senior Silicon Validation Engineer, Volume Production and Yield - Google
- Location: New Taipei, Banqiao District, New Taipei City, Taiwan; +1 more (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-03
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckcBv3c-mndogVhEkYE37Mk34x9dzHEEAb_KCUkQpBPgLEjoACxwdTHBQDojrv927YvHFR2nrwyS9Vp6wse0kSP1c0gzMmAi6rg2By5OndeMoQAIalDRWZ-M1S7GZ_V2&loc=TW&title=Senior+Silicon+Validation+Engineer
- Excerpt: Senior Silicon Validation Engineer, Volume Production and Yield New Taipei, Banqiao District, New Taipei City, Taiwan; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. We are seeking a highly motivated and experienced Silicon Engineer to drive our Volume Production and Yield efforts. In this pivotal role, you will be the primary technical owner for the transition of our silicon designs into high-volume factory manufacturing, delivering screening packages to factory partners and driving continuous silicon yield monitoring, failure analysis, voltage margin characterization, and improvement across the product lifecycle. You will leverage AI-driven data analytics and machine learning techniques to optimize yield, accelerate failure debug, and enhance overall silicon quality. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Provide technical guidance and expertise for volume productization and post-silicon yield enhancement. Define and deliver silicon screening packages to factory organizations. Execute and refine the silicon yield management strategy, leading failure analysis, root cause debug of limiters, and production data analysis. Leverage AI/ML tools

### Section Lead - Semiconductor Fab, Test and Inspection - Raytheon Technologies
- Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-29
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Section-Lead---Semiconductor-Fab--Test-and-Inspection_01848054
- Excerpt: Section Lead - Semiconductor Fab, Test and Inspection US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 14 Days Ago

### Principal Engineer - IP Verification - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063216
- Excerpt: Principal Engineer - IP Verification Noida posted: Posted 30+ Days Ago

### Semiconductor Equipment Engineer - 4th shift - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---4th-shift_01851612
- Excerpt: Semiconductor Equipment Engineer - 4th shift US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 2 Days Ago

### Sr Principal Firmware Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Sr-Principal-Firmware-Engineer_R-10062497
- Excerpt: Sr Principal Firmware Engineer Pune posted: Posted 30+ Days Ago

### Semiconductor Equipment Engineer - Dielectrics Lead - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---Dielectrics-Lead_01837532
- Excerpt: Semiconductor Equipment Engineer - Dielectrics Lead US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago

### Senior Principal Analog design engineer - NXP Semiconductors
- Location: Hyderabad (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hyderabad/Senior-Principal-Analog-design-engineer_R-10062156
- Excerpt: Senior Principal Analog design engineer Hyderabad posted: Posted 30+ Days Ago

### 4th Shift Technical Lead – Semiconductor Fab - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-29
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/XMLNAME-4th-Shift-Technical-Lead---Semiconductor-Fab_01848717
- Excerpt: 4th Shift Technical Lead – Semiconductor Fab US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 14 Days Ago

### Principal Engineer - IP Verification - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Principal-Engineer---IP-Verification_R-10063215
- Excerpt: Principal Engineer - IP Verification Noida posted: Posted 29 Days Ago

### Senior Principal Semiconductor Tech Lead Engineer - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Principal-Semiconductor-Tech-Lead-Engineer_01829265
- Excerpt: Senior Principal Semiconductor Tech Lead Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago

### ATE Test Hardware Design - Director - NXP Semiconductors
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Hsinchu/ATE-Test-Hardware-Design---Director_R-10062616-1
- Excerpt: ATE Test Hardware Design - Director 2 Locations posted: Posted 30+ Days Ago

### Senior Section Lead - Semiconductor Fab Test and Inspection - Raytheon Technologies
- Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-29
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Senior-Section-Lead---Semiconductor-Fab-Test-and-Inspection_01848055
- Excerpt: Senior Section Lead - Semiconductor Fab Test and Inspection US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 14 Days Ago

### Lead Silicon Validation Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-25
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Silicon-Validation-Engineer_R-10063514
- Excerpt: Lead Silicon Validation Engineer Pune posted: Posted 18 Days Ago

### Senior Principal Semiconductor Equipment & Process Integration Engineer - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-29
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Principal-Semiconductor-Equipment---Process-Integration-Engineer_01848723-1
- Excerpt: Senior Principal Semiconductor Equipment & Process Integration Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 14 Days Ago

### SoC Verification Lead Engineer - NXP Semiconductors
- Location: Bangalore (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/SoC-Verification-Lead-Engineer_R-10062966
- Excerpt: SoC Verification Lead Engineer Bangalore posted: Posted 30+ Days Ago

### Senior Semiconductor Facilities Engineer (Onsite - Andover MA) - Raytheon Technologies
- Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (onsite)
- Salary: Not disclosed
- Posted: 2026-06-08
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Senior-Semiconductor-Facilities-Engineer--Onsite---Andover-MA-_01847675
- Excerpt: Senior Semiconductor Facilities Engineer (Onsite - Andover MA) US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 4 Days Ago

### Raytheon Fulltime 2026 - Semiconductor Foundry Engineer II - Raytheon Technologies
- Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Raytheon-Fulltime-2026---Semiconductor-Foundry-Engineer-II_01837192
- Excerpt: Raytheon Fulltime 2026 - Semiconductor Foundry Engineer II US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 30+ Days Ago

### Senior Principal Analog Validation Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principal-Analog-Validation-Engineer_R-10061227-1
- Excerpt: Senior Principal Analog Validation Engineer Pune posted: Posted 30+ Days Ago

### Raytheon Full Time 2026 - Semiconductor Foundry Engineer I - Raytheon Technologies
- Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-14
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Raytheon-Full-Time-2026---Semiconductor-Foundry-Engineer-I_01837187
- Excerpt: Raytheon Full Time 2026 - Semiconductor Foundry Engineer I US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 29 Days Ago

### Senior Semiconductor Foundry Engineer – Actively Growing Our Engineering Team! - Raytheon Technologies
- Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Semiconductor-Foundry-Engineer---Actively-Growing-Our-Engineering-Team-_01837604
- Excerpt: Senior Semiconductor Foundry Engineer – Actively Growing Our Engineering Team! US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago

### Senior Hardware/Software Co-Design Engineer - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Engineer--HW-SW-Co-Design_R-10062895-1
- Excerpt: Senior Hardware/Software Co-Design Engineer Pune posted: Posted 30+ Days Ago

### Principal/Sr Principal Engineer Microelectronic Semiconductors - Northrop Grumman
- Location: United States-California-Manhattan Beach (unspecified)
- Salary: $114K-$171K
- Posted: 2026-06-05
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Relocation assistance: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-California-Manhattan-Beach/Principal-Sr-Principal-Engineer-Microelectronic-Semiconductors_R10231255
- Excerpt: Principal/Sr Principal Engineer Microelectronic Semiconductors United States-California-Manhattan Beach RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. The Northrop Grumman Microelectronics Center (NGMC) has an opening for a Microelectronics Device Engineer to join our team of qualified, diverse individuals at our Space Park Foundry (SPF) location in Redondo Beach, CA. In the NGMC we design, manufacture, and test semiconductor products for internal and commercial production customers as well as emerging technology programs. The SPF semiconductor foundry has unique capabilities supporting a range of production microelectronics technologies (Gallium Arsenide, Indium Phosphide, and Gallium Nitride). SPF provides leading edge technology development in semiconductor materials, processes, devices, and 3D

### 2026 Campus - Emulation Engineer - NXP Semiconductors
- Location: Tianjin (Teda) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Tianjin-Teda/XMLNAME-2026-Campus---Emulation-Engineer_R-10059146
- Excerpt: 2026 Campus - Emulation Engineer Tianjin (Teda) posted: Posted 30+ Days Ago

### Sr. HiTech/Semiconductor Partner Solutions Architect, AMER Partner Industry & Solutions - Amazon
- Location: Seattle, Washington, USA (unspecified)
- Salary: $154K-$208K
- Posted: 2026-05-15
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10421102/sr-hitech-semiconductor-partner-solutions-architect-amer-partner-industry-solutions
- Excerpt: Sr. HiTech/Semiconductor Partner Solutions Architect, AMER Partner Industry & Solutions Seattle, Washington, USA Amazon Web Services (AWS) is looking for a Senior Partner Solutions Architect (PSA) with domain expertise in the Semiconductor and High-Tech Electronics industry. As a HiTech PSA, you will have the opportunity to deliver on our strategy of accelerating adoption of AWS cloud computing services through our consulting and technology partners and their semiconductor and electronics customers. AWS partners include the largest systems integrators, EDA tool providers, foundries, and innovative technology companies who are using AWS as their cloud platform of choice. This role will focus on working with multiple strategic consulting and technology partners to define and build technical solutions that drive top-of-funnel pipeline creation and deal progression. The ideal candidate will possess deep technical skill in semiconductor design workflows, EDA tool architectures, high-performance computing, storage architectures, and cloud computing, as well as customer-facing and technical sales skills at all levels of a sales organization. The ideal candidate should also have a demonstrated ability to think strategically about business, product, and technical challenges in the semiconductor industry. The ideal candidate is an influencer by nature and must be seen as someone partners and customers are eager to engage with and have a strong hands-on approach. They will be the subject matter expert for the Semiconductor/HiTech industry to become a trusted advisor to sales teams and customers, driving customer outcomes through partners. They will be responsible for accelerating customers' cloud adoption in the semiconductor industry, including chip

### Principal Digital IP Design Engineer (f/m/d) - NXP Semiconductors
- Location: Munich (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Principal-Digital-IP-Design-Engineer--f-m-d-_R-10063823
- Excerpt: Principal Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday

### Senior Equipment Engineer, Raxium (Night Shift) - Google
- Location: Fremont, CA, USA (unspecified)
- Salary: $144K-$209K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckfZfN3CJbqjRr6sDaF4wQWA7zsCi4n9fNxLz35hzS5DuEjsACxwdTC1eWDloxfD3UW1in8gl0dwdhtJ1kdONKHqxz6DDzDXuDNmZype_tSuX3ge_gAD7tdc5dI59mw%3D%3D_V2&loc=US&title=Senior+Equipment+Engineer
- Excerpt: Senior Equipment Engineer, Raxium (Night Shift) Fremont, CA, USA The Raxium Facility and Equipment team maintains a broad range of semiconductor/facility equipment and clean room infrastructure. Our expertise lies in understanding the relationship between semiconductor processing and its support equipment, enabling us to troubleshoot problems, execute tasks, and collaborate on installing, modifying, maintaining, and repairing clean room and facility support equipment. In this role, you will focus on expert-level maintenance, support, and optimization of semiconductor processing equipment, with a specific emphasis on advanced vacuum systems used in Chemical Vapor Deposition (CVD), Inductively Coupled Plasma (ICP), and Reactive Ion Etching (RIE). You will bring a broad understanding of semiconductor manufacturing to support other critical tool sets as needed, including Electrochemical Plating (ECP), Chemical Mechanical Polishing (CMP), lithography, and wet etch. You will leverage your experience to lead installations, troubleshoot complex issues, and execute preventative maintenance programs that maximize the reliability and performance of our tool sets.Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $144000 - $209000 (USD) + 15% bonus target

### Senior Digital IP Design Engineer (f/m/d) - NXP Semiconductors
- Location: Munich (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Senior-Digital-IP-Design-Engineer--f-m-d-_R-10063822
- Excerpt: Senior Digital IP Design Engineer (f/m/d) Munich posted: Posted Yesterday

### Senior Lead Engineer Analog Validation - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-27
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Lead-Engineer-Analog-Validation_R-10063515
- Excerpt: Senior Lead Engineer Analog Validation Pune posted: Posted 16 Days Ago

### 倉儲作業員 - NXP Semiconductors
- Location: Kaohsiung (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kaohsiung/_R-10061232-1
- Excerpt: 倉儲作業員 Kaohsiung posted: Posted 30+ Days Ago

### Senior Principal Foundry Engineer - NXP Semiconductors
- Location: Singapore (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Singapore/Senior-Principal-Foundry-Engineer_R-10062691
- Excerpt: Senior Principal Foundry Engineer Singapore posted: Posted 30+ Days Ago

### 進出口人員 - NXP Semiconductors
- Location: Kaohsiung (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-19
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Kaohsiung/_R-10062685-1
- Excerpt: 進出口人員 Kaohsiung posted: Posted 24 Days Ago

### PRODUCTION PLANNER - NXP Semiconductors
- Location: Bangkok (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangkok/PRODUCTION-PLANNER_R-10063439
- Excerpt: PRODUCTION PLANNER Bangkok posted: Posted Today

### Sr. Principal Engineer -STA - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Sr-Principal-Engineer--STA_R-10062125
- Excerpt: Sr. Principal Engineer -STA Noida posted: Posted 30+ Days Ago

### SoC Hardware Architect - NXP Semiconductors
- Location: Austin (Oakhill, Office) (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-05
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/SoC-Hardware-Architect_R-10063821
- Excerpt: SoC Hardware Architect Austin (Oakhill, Office) posted: Posted 7 Days Ago

### Technician - NXP Semiconductors
- Location: Nijmegen (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Nijmegen/Technician_R-10060783-1
- Excerpt: Technician Nijmegen posted: Posted 30+ Days Ago

### Technician - NXP Semiconductors
- Location: Nijmegen (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-06
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Nijmegen/Technician_R-10063190-1
- Excerpt: Technician Nijmegen posted: Posted 6 Days Ago

### Non-Volatile Memory IP Platform Lead - NXP Semiconductors
- Location: Bangalore (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Bangalore/Non-Volatile-Memory-IP-Platform-Lead_R-10061650
- Excerpt: Non-Volatile Memory IP Platform Lead Bangalore posted: Posted 30+ Days Ago

### High Speed Analog Design Engineer - NXP Semiconductors
- Location: Chandler (Office) (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-15
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Office/High-Speed-Analog-Design-Engineer_R-10062964
- Excerpt: High Speed Analog Design Engineer Chandler (Office) posted: Posted 28 Days Ago

### SW TEST/VALIDATION - NXP Semiconductors
- Location: Pune (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/SW-TEST-VALIDATION_R-10062531
- Excerpt: SW TEST/VALIDATION Pune posted: Posted 30+ Days Ago

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Source-backed benefit claims include source links; other benefit values are labeled separately.