# FewerJobs export - 100 curated jobs
Generated: 2026-08-11T13:51:02.586Z
Source: https://fewerjobs.com

## Filters applied
- **q**: Advanced Micro Devices
- **quality_floor**: default
- **match_401k_strict**: true
- **parental_strict**: true
- **non_birth_strict**: true
- **pto_strict**: true
- **include_older**: false
- **verified_benefits_only**: true
- **apply_url_verified**: false
- **page**: 1
- **per_page**: 100
- **sort**: relevance

## Jobs
### Staff Engineer, Advanced Cores Design Evaluation Engineering - Analog Devices
- Location: 3 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/Staff-Engineer--Advanced-Cores-Design-Evaluation-Engineering_R262371
- Excerpt: Staff Engineer, Advanced Cores Design Evaluation Engineering 3 Locations posted: Posted 3 Days Ago

### MicroLED Display Reliability Engineer, Augmented Reality, Raxium - Google
- Location: Fremont, CA, USA (unspecified)
- Salary: $188K-$275K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2Fckfh8cBxLbH7zVPLdDutBKn16S1NPFKnodnkDUxbTuBXcEjsACxwdTOq4fUadcySndYIT5d-SD4FaqN7z4F5Ab-vpAqpVDZ4tH5KFDLbpzPA-Y0YNIQuuvetu3rgtBQ%3D%3D_V2&loc=US&title=MicroLED+Display+Reliability+Engineer
- Excerpt: MicroLED Display Reliability Engineer, Augmented Reality, Raxium Fremont, CA, USA As a MicroLED Display Reliability Engineer, you will own the direction and execution of reliability initiatives across the product lifecycle. You will drive transformational improvements in reliability for microLED based display products, covering multiple form factors - including on-chip (for Gallium Nitride (GaN)-on-Silicon based micro-LED emitter planes) and on-display. You will shape long-term strategy, and influence executive stakeholders both internally and externally. You will require technical expertise in optoelectronics reliability, cross-functional leadership, and the ability to operate in a dynamic environment. You will collaborate extensively with cross-functional partners in development (e.g., LED, Display Panel), Process Engineering, Manufacturing and Operations to embed design for reliability into the display panel lifecycle.Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $188000 - $275000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Develop and implement reliability programs for various device and display product reliability tests including operational lifetests, device aging, environmental stresses and reliability

### Senior Project Manager – Advanced Energy Devices - Intuitive Surgical, Inc.
- Location: Sunnyvale, CA, United States (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.smartrecruiters.com/Intuitive/744000128719140-senior-project-manager-advanced-energy-devices
- Excerpt: Senior Project Manager – Advanced Energy Devices Sunnyvale, CA, United States Company Description: It started with a simple idea: what if surgery could be less invasive and recovery less painful? Nearly 30 years later, that question still fuels everything we do at Intuitive . As a global leader in robotic-assisted surgery and minimally invasive care , our technologies-like the da Vinci surgical system and Ion -have transformed how care is delivered for millions of patients worldwide. We're a team of engineers, clinicians, and innovators united by one purpose: to make surgery smarter, safer, and more human. Every day, our work helps care teams perform with greater precision and patients recover faster, improving outcomes around the world. The problems we solve demand creativity, rigor, and collaboration. The work is challenging, but deeply meaningful-because every improvement we make has the potential to change a life. If you're ready to contribute to something bigger than yourself and help transform the future of healthcare , you'll find your purpose here. Job Description: Primary Function of Position: The Senior Project Manager - Advanced Energy Devices on the Future Forward PMO team will be responsible for leading the end-to-end development of advanced energy medical devices, including ablation and resection capital equipment. The Senior Project Manager drives innovation and operational excellence within the advanced energy group, ensuring products meet rigorous design, clinical, regulatory requirements and organizational objectives. This position oversees complex product development workstreams specific to advanced energy devices, from initial concept through commercial launch, and ensures

### Industry Technical Consultant - Micro-Electronics (Global High Tech industry) - Ecolab
- Location: 12 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://ecolab.wd1.myworkdayjobs.com/Ecolab_External/job/ESP---Catalonia---Barcelona/Industry-Technical-Consultant---PAC3-Micro-Electronics--GHT-_R00295524
- Excerpt: Industry Technical Consultant - Micro-Electronics (Global High Tech industry) 12 Locations posted: Posted 2 Days Ago

### Micro-Electronic Technician - Level 2 or Level 3 - Northrop Grumman
- Location: United States-Connecticut-East Hartford (unspecified)
- Salary: $56K-$93K
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.northropgrumman.com/careers/job/1340072119217
- Excerpt: Micro-Electronic Technician - Level 2 or Level 3 United States-Connecticut-East Hartford RELOCATION ASSISTANCE: No relocation assistance available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: No Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman's Space Sector is seeking a Micro-Electronic Technician - Level 2 or Level 3 to join our team in East Hartford, CT. This position is 100% onsite and cannot accommodate telecommute work. AOA Xinetics (AOX) , a wholly-owned Northrop Grumman Space Systems Business Unit, is a leading supplier of complex electro-optic and photonic systems and subsystems that control and manipulate light waves for a variety of applications. We are seeking a Microelectronics Technician to support our production team. Learn more about AOX at: https://www.northropgrumman.com/

### Assoc QC Micro Analyst - Regeneron Pharmaceuticals
- Location: Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://regeneron.wd1.myworkdayjobs.com/Careers/job/Limerick/Assoc-QC-Micro-Analyst_R46656
- Excerpt: Assoc QC Micro Analyst Limerick posted: Posted Yesterday

### Corporate Account Manager, SEA (Micro E + Data Center) - Ecolab
- Location: SGP - Singapore - Singapore (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://ecolab.wd1.myworkdayjobs.com/Ecolab_External/job/SGP---Singapore---Singapore/Business-Development-Manager--Data-Center-Industry-_R00278065
- Excerpt: Corporate Account Manager, SEA (Micro E + Data Center) SGP - Singapore - Singapore posted: Posted 30+ Days Ago

### Biosensors & Device Analytics - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-04
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Biosensors---Device-Analytics_R263227
- Excerpt: Biosensors & Device Analytics Ireland, Limerick posted: Posted 8 Days Ago

### Senior Human Resources Business Partner - FAC - Abbott Laboratories
- Location: Algeria > Algiers : Micro-Zone d'activité Hydra (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://abbott.wd5.myworkdayjobs.com/abbottcareers/job/Algeria--Algiers--Micro-Zone-dactivit-Hydra/Head-of-HR---FAC_31136826
- Excerpt: Senior Human Resources Business Partner - FAC Algeria > Algiers : Micro-Zone d'activité Hydra posted: Posted 30+ Days Ago

### Sr Applied Scientist, Device Connectivity - Amazon
- Location: Sunnyvale, California, USA (unspecified)
- Salary: $192K-$260K
- Posted: 2026-05-18
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10422881/sr-applied-scientist-device-connectivity
- Excerpt: Sr Applied Scientist, Device Connectivity Sunnyvale, California, USA Come join the Device connectivity team in building the next generation of innovative wireless solution that create a magical experience on our products and services. We actively engage in strategic initiatives, foster partnerships with industry and academia, leverage foundational artificial intelligence and large language models to stay at the forefront of the technological advancements. Key job responsibilities As a Sr. Applied Scientist in the team, you will: - Seek to understand in depth the Devices and Services offering at Amazon, primarily focused on wireless solutions, and identify areas of opportunities to grow our business using AI solutions. - Design and lead AI roadmaps and solutions aimed at helping our customers have a delightful experience through our devices and service. - Work with our engineering partners and draw upon your experience to meet performance requirements within system constraints. - Identify untapped, high-risk technical and scientific directions, and devise new research directions that you will drive to completion and deliver. - Be responsible for communicating our AI innovations to the broader internal & external scientific community - Mentor and guide the applied scientists in our organization and hold us to a high standard of technical rigor and excellence in ML. About the team Device Connectivity team is empowering possibilities through wireless innovation on our devices and through services, our vision is to design and develop transformative products and services that consistently exceed our customers' expectations. Basic Qualifications: - PhD, or Master's degree and 6+

### Senior Hardware Engineer – Medical Devices - Analog Devices
- Location: US, MA, Wilmington (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/Senior-Engineer--Analog-Design-Engineering_R257681
- Excerpt: Senior Hardware Engineer – Medical Devices US, MA, Wilmington posted: Posted 30+ Days Ago

### Applied Scientist, Devices & Services - Amazon
- Location: Tübingen, Baden-Wurttemberg, DEU (unspecified)
- Salary: Not disclosed
- Posted: 2026-03-24
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10375158/applied-scientist-devices-services
- Excerpt: Applied Scientist, Devices & Services Tübingen, Baden-Wurttemberg, DEU Are you inspired by invention? Is problem solving through teamwork in your DNA? Do you like the idea of seeing how your work impacts millions of people? Answer yes to any of these and you'll fit right in here at Amazon, where you'll apply cutting-edge advances in artificial intelligence, computer vision, machine learning, and robotics to solve real-world challenges that transform customer experiences. You'll collaborate with a team of skilled problem-solvers who are passionate about pushing the frontier of intelligent systems and delivering innovative solutions at scale. We are looking for skilled individuals with a strong bias for action and deep technical knowledge to join our team in Tübingen. As part of Amazon Devices & Services, you'll engage with novel innovative devices and complex, large-scale problems that require both technical depth and creative thinking. Your work will span across computer vision, machine learning, robotics, and AI applications. You'll find yourself navigating ambiguity, collaborating with colleagues across disciplines, and contributing to projects that shape the future of intelligent systems. Beyond your core technical work, you'll participate in cross-functional discussions, share insights with your team, and help establish best practices. We are a collaborative team of doers committed to researching and developing intelligent systems that matter. Our vision is to pioneer the application of AI, computer vision, machine learning, and robotics to create meaningful customer impact. You'll work alongside colleagues who are equally passionate about solving hard problems and thrive in a startup-like environment

### Software Development Manager, Emerging Devices Software - Amazon
- Location: Bengaluru, Karnataka, IND (unspecified)
- Salary: Not disclosed
- Posted: 2026-03-05
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/3196471/software-development-manager-emerging-devices-software
- Excerpt: Software Development Manager, Emerging Devices Software Bengaluru, Karnataka, IND Join us in building the future of personal devices at Amazon! Are you ready to shape the future of how people experience technology in their everyday lives? Join us in building the next generation of personal devices - where hardware, software, and AI converge to create experiences that feel like magic. The Emerging Devices Software (EDS) organization is pioneering intelligent software solutions that power Amazon's Personal Devices, including Smart Eyewear and other emerging wearable categories. Our mission is to create seamless, AI-driven experiences that live at the intersection of hardware, software, and artificial intelligence - redefining how customers interact with technology in their daily lives. We're building the future of personal devices while maintaining Amazon's highest standards for quality, reliability, and customer obsession. The personal devices challenge is a fascinating blend of real-world complexity and technological innovation. We're tackling multidimensional problems that span mobile applications, cloud services, on-device intelligence, and hardware integration - all while delivering best-in-class user experiences to customers around the world. From optimizing low-latency interactions on constrained wearable hardware to building scalable cloud backends and integrating ML/AI capabilities, every problem we solve pushes the boundaries of what's possible. We are looking for a seasoned Software Development Manager to lead an engineering team within EDS, solving these intricate challenges. You'll work on software that span the mobile-cloud stack, own end-to-end delivery of features and experiences, and help shape the long-term technical direction of our products. Key job responsibilities -

### Advanced ASIC Physical Design Lead (Teradyne, North Reading, MA) - Teradyne
- Location: North Reading, MA (unspecified)
- Salary: $192K-$308K
- Posted: 2026-06-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://jobs.teradyne.com/Teradyne/job/North-Reading-Advanced-ASIC-Physical-Design-Lead-%28Teradyne%2C-North-Reading%2C-MA%29-MA/1382950100/
- Excerpt: Advanced ASIC Physical Design Lead (Teradyne, North Reading, MA) North Reading, MA We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive. Our Purpose TERADYNE , where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results. Opportunity Overview Teradyne is seeking an experienced Physical Design Lead to join our Silicon Technology Engineering (STE) organization within the Digital ASIC Group. This team develops advanced-node, large-scale mixed-signal

### Senior Technical Program Manager, Devices Software and Services - Amazon
- Location: Bellevue, Washington, USA (unspecified)
- Salary: $149K-$201K
- Posted: 2026-05-28
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10433564/senior-technical-program-manager-devices-software-and-services
- Excerpt: Senior Technical Program Manager, Devices Software and Services Bellevue, Washington, USA Do you want to drive large-scale programs that deliver measurable infrastructure optimization and peak readiness across hundreds of services powering hundreds of millions of Amazon devices? Do you want to use AI to scale your impact and automate program execution along the way? If so, we want to talk to you. The Devices Software and Services (DS2) team is seeking a Senior Technical Program Manager to lead large-scale, highly visible programs that span every Devices product line and demand cross-org influence at the executive level. These programs are Memory Optimization and Peak Readiness. Memory Optimization reduces memory consumption across Devices fleets through code optimization, JVM tuning, instance-family migration, and rightsizing, using AI to identify opportunities at scale and accelerate the analysis-to-action cycle. Peak Readiness is the cross-Devices Q4 Peak program covering service scaling, resiliency testing, operational readiness campaigns, and coordinated game days across hundreds of services, using AI to scale beyond manual coordination and automate game day execution. DS2 owns the platform layer beneath every Kindle, Echo, Fire TV, and Fire Tablet sold worldwide. We own device identity, registration, OTA updates, telemetry, cloud-to-device messaging, and lifecycle management for hundreds of millions of devices. As the horizontal organization across the Devices portfolio, DS2 also leads flagship programs spanning multiple product lines, including infrastructure optimization and efficiency, next-gen authentication implementations, and software regulatory compliance. If you'd like to join us, here are some skills that are key to success in this

### Design Technologist, Devices & Services Experience Design - Amazon
- Location: Seattle, Washington, USA (unspecified)
- Salary: $132K-$178K
- Posted: 2026-05-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Surrogacy assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10416150/design-technologist-devices-services-experience-design
- Excerpt: Design Technologist, Devices & Services Experience Design Seattle, Washington, USA The Devices & Services Experience Design (DxD) team leads user experience and industrial design innovation across Amazon's device portfolio, including Echo, Fire TV, Fire Tablets, Alexa.com, and related mobile apps. Our team works at the intersection of design, product and engineering, creating meaningful hardware and software experiences that enhance customer lives. We believe in storytelling and thinking holistically to craft the "why" behind everything we ship. Working closely with business and technology partners, we use research, design, and prototyping to guide early product development, bring clarity to engineering goals, and develop a user-centric point of view. This is where you come in. As a Design Technologist, you will play a crucial role in our Design Technology team. Your primary responsibility will be to create complex user interactions that support user research, executive reviews, and other artifacts that effectively communicate design ideas. You will frequently collaborate with product teams, leveraging your technical expertise to solve design challenges. This often involves building functional prototypes at varying levels of fidelity to validate or invalidate the viability of concepts. Ultimately, your goal will be to create technical solutions that delight our customers. Are you a passionate tinkerer who loves consumer electronics? A digital craftsperson excited to transform concepts into working code? Ready to make an impact on millions of customers? If so, we want to hear from you. Key job responsibilities - Build high-quality, functional prototypes that convey, prove, and advance the vision of

### Staff Digital Design Engineer for MEMs ASIC - Analog Devices
- Location: Spain, Valencia, Cortes Valencianas (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Spain-Valencia-Cortes-Valencianas/Staff-Digital-Design-Engineer-for-MEMs-ASIC_R258832
- Excerpt: Staff Digital Design Engineer for MEMs ASIC Spain, Valencia, Cortes Valencianas posted: Posted 30+ Days Ago

### MEMS Layout Engineer P2 - Analog Devices
- Location: US, MA, Wilmington (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/MEMS-Layout-Engineer-P2_R263058
- Excerpt: MEMS Layout Engineer P2 US, MA, Wilmington posted: Posted Today

### Hardware Electrical Engineer, Augmented Reality Glasses - Google
- Location: San Jose, CA, USA (unspecified)
- Salary: $132K-$190K
- Posted: 2026-06-04
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckbIhj5S3pvqmP8VpzgT8K21kOgbSQImg2KXrOMdSWHeQEjsACxwdTGKp7k2hgrgOHiWEychDoSDidKfboTJtR0dh5v5BMNrNecAtQNWQjhK1VWMW9FdtfNUITdTK_w%3D%3D_V2&loc=US&title=Hardware+Electrical+Engineer
- Excerpt: Hardware Electrical Engineer, Augmented Reality Glasses San Jose, CA, USA Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Hardware Engineer on the Google Android XR Hardware team, you will design, implement, and deliver Next Generation hardware systems and AR glasses. You will drive hardware solutions from concepts through production, ensuring robust designs that meet performance, efficiency, reliability and ability to scale. Your work will directly impact how users perceive the power of Android XR and apps/services including Gemini. For decades, the computing revolution has reshaped our world driven by breakthroughs in compute, connectivity, mobile, and now, AI. Google's XR team is at the forefront of the next major leap - the convergence of AI and XR. This is more than just new devices - it's about reimagining how we interact with the world around us. We're building a future where lightweight XR devices like smart glasses and headsets pair with helpful AI to augment human intelligence, offering personalized, conversational, and contextually aware experiences. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $132000 - $190000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Gather system requirements for product management and cross functional

### Touch Sensor Hardware Engineer, Consumer Hardware - Google
- Location: New Taipei, Banqiao District, New Taipei City, Taiwan (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-03
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckRioIquBPIKy6ifFQ-h5Kq8Q0nhQ1TqIC5OCddVY28WZEjsACxwdTLz7lvbeg7obp0AtjJy4KhId6yMIpltz9az38JAJYZCDQcf8OXCMN4yiJOspB61sMOsJgIcGYA%3D%3D_V2&loc=TW&title=Touch+Sensor+Hardware+Engineer
- Excerpt: Touch Sensor Hardware Engineer, Consumer Hardware New Taipei, Banqiao District, New Taipei City, Taiwan Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Lead the development and integration of on-cell touch solutions, focusing on the interaction between touch sensors and Thin Film Encapsulation (TFE) for plastic Organic Light Emitting Diode (OLED). Partner with vendors to optimize Touch IC architecture (Analog Front End (AFE)/Microcontroller Unit (MCU)) and firmware algorithms to ensure high-levels of noise immunity and system performance. Define Engineering Requirements Specifications (ERS) and execute validation plans, including testing during early-stage development (Proto/EVT) and deep-dive failure analysis on complex modes. Manage technical dependencies between display driving and touch sensing to mitigate noise interference and ensure signal integrity in high-proximity architectures. Oversee physical engineering design layouts and manage display/touch vendors to ensure quality and perform root cause diagnosis for system-level issues during high-volume production ramps. Minimum qualifications: Bachelor's degree in Electrical Engineering, Physics, Materials Science, or a related field or equivalent practical experience. 2 years of experience in touch sensor module development, including

### Senior Analog IC Design F/M - NXP Semiconductors
- Location: Catania (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/Senior-Analog-IC-Design-F-M_R-10063803
- Excerpt: Senior Analog IC Design F/M Catania posted: Posted Yesterday

### Senior Product Design Architect, Advanced Architecture - Google
- Location: Chicago, IL, USA (unspecified)
- Salary: $159K-$231K
- Posted: 2026-06-11
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckRkFi3_cW2-pjrxhDFOqAc1mTd3xWS2bLE6vfe6m8PSmEjsACxwdTGSZY5fPCjT6KfiPmG6Y1kMupZ6LRmlDpGrJjcMYHwShbWmKPeJG6F09VVpd5t4B3XKhh7U49g%3D%3D_V2&loc=US&title=Senior+Product+Design+Architect
- Excerpt: Senior Product Design Architect, Advanced Architecture Chicago, IL, USA As a member of a fast-paced multi-disciplinary team, you use your creativity and range of engineering experience to explore solutions to a variety of engineering problems. As a mechanical engineer, you participate in the design, analysis, and prototyping of new concepts. You work in a manufacturing and product oriented development environment and collaborate with vendors and outside sources in order to see parts through to manufacture. The Google Pixel product group focuses on designing and delivering the world's most helpful software and hardware experiences. Our Advanced Architecture team works on shaping the future of Pixel devices by developing some of the most advanced designs, materials, manufacturing techniques, and experiences in consumer electronics. This includes bringing together the best of Google's Artificial Intelligence (AI) with Pixel hardware to create transformative experiences for users around the world. As a Senior Product Design Engineer, you will be laying the groundwork for our future Pixel products. You will work closely with Product Management (PM), Industrial Design (ID), and our leadership team on new product definitions. You will have the technical experience to discuss engineering trade-offs across multiple disciplines including antennas, cameras, sensors, displays, and batteries. You will partner with our global product engineering teams as they bring these future products to market offering ongoing support and bringing lessons learned back into the definition process of next-generation Pixel devices. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000

### SDE II - Multimedia, Hardware Compute Group - Amazon
- Location: Bengaluru, Karnataka, IND (unspecified)
- Salary: Not disclosed
- Posted: 2026-03-20
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10372183/sde-ii-multimedia-hardware-compute-group
- Excerpt: SDE II - Multimedia, Hardware Compute Group Bengaluru, Karnataka, IND Jumpstart your career in advance display technology! Join our innovative team as an SDE-II Display Engineer and work on Dolby Vision integration and HDMI 2.1b standards. As our Display Engineer (SDE-II), you'll have the exciting opportunity to: Work directly with Dolby Vision technology, enhancing visual experiences in embedded systems Gain expertise in HDMI 2.1b compliance under the guidance of senior engineers Collaborate on optimizing display pipelines for the advanced SoC Learn from industry experts and grow your skills in Linux-based display technologies Contribute to projects that will impact millions of devices worldwide This role offers a perfect balance of challenge and support. You'll work on complex display technologies while receiving mentorship from experienced SDE-III engineers. If you're ready to prove your mettle and accelerate your career in embedded display systems, this is your launchpad to success! Key job responsibilities - Assist in the integration and optimization of Dolby Vision technology for embedded display systems, focusing on color accuracy and dynamic tone mapping. - Support the implementation of HDMI 2.1b standards, ensuring compliance and robust integration in our products. - Collaborate with the SoC team to optimize the display pipeline and enable support for new display features. - Develop and maintain display drivers and software for Linux-based embedded systems. - Contribute to panel integration efforts, including bring-up and optimization for MIPI-DSI and HDMI interfaces. - Assist in debugging and resolving display-related issues across various embedded devices and platforms. - Utilize Yocto

### Senior/Lead SoC Emulation Engineer - NXP Semiconductors
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-14
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/Senior-Lead-SoC--Emulation-Engineer_R-10062762
- Excerpt: Senior/Lead SoC Emulation Engineer Noida posted: Posted 29 Days Ago

### Junior System Integration Engineer, SPIV team - Amazon
- Location: Haifa, Haifa, ISR (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10445766/junior-system-integration-engineer-spiv-team
- Excerpt: Junior System Integration Engineer, SPIV team Haifa, Haifa, ISR Ever wondered what powers the world's largest public cloud? Join Annapurna Labs - the silicon team behind AWS - and work at the intersection of cutting-edge hardware and planet-scale infrastructure. Our DRAM solutions are the market leader for public cloud and enterprise, and we're looking for curious, driven engineers to help shape what comes next. No prior DRAM/DDR experience required. We invest heavily in our people - you'll receive hands-on mentorship and structured training to master high-speed memory interfaces from the ground up. What we're looking for is strong engineering fundamentals and the hunger to learn. What Makes This Role Special - Learn from the best - structured ramp-up on DDR4/DDR5/next-gen interfaces; no prior DRAM knowledge expected - Impact at scale - your work touches millions of AWS customers worldwide - Advanced technology - contribute to innovations that push the boundaries of cloud computing and AGI infrastructure - World-class partners - collaborate with leading memory companies shaping the future of DRAM - Career growth - develop deep expertise in one of the most in-demand domains in silicon engineering Key job responsibilities As a System Integration Engineer on our DDR team, you'll own end-to-end interface development and integration across the full product lifecycle - from early concept through silicon bring-up to production debugging at scale. You'll be part of developing the advanced memory technologies that power AWS's AGI fleet. Day-to-day, you will: 1. Shape interface design strategies - influence architectural decisions that

### Applied AI Engineer, Audio, XR - Google
- Location: Mountain View, CA, USA (unspecified)
- Salary: $159K-$231K
- Posted: 2026-06-11
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckVgA1d6IMzCaaB-xKHX8ulT01S4tVaaPDQ18LqKF19QMEjsACxwdTI6IFWxBKRJjC5QX6LPflSzJEZptV9NPryoe6bYpe-2lQ06skvlBAnhDrL2hJKRR8G02P_OAVQ%3D%3D_V2&loc=US&title=Applied+AI+Engineer
- Excerpt: Applied AI Engineer, Audio, XR Mountain View, CA, USA As an Applied AI Engineer in the Audio Applied AI Research and Innovation team, you will be at the forefront of defining the future of audio for the Pixel ecosystem. Our mission is to push the boundaries of audio AI, advancing the state-of-the-art in playback, capture, generation, enhancement, and ambient understanding. This role is defined by research-driven innovation and strong engineering principles, where you will bridge the gap between fundamental AI research and deployment in hardware-constrained environments. You will conduct applied research to solve complex audio challenges, working in a highly collaborative environment with cross-functional hardware and software teams to translate research breakthroughs into impactful features for phones, wearables, and future devices. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Innovate in audio machine

### Senior Hardware Engineer, Electromagnetic and SIPI, Pixel Watch - Google
- Location: Mountain View, CA, USA (unspecified)
- Salary: $159K-$231K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2Fcka8w23EOb7K92rUt3H8yL-TPeMIFn9EbLDO79mLIrEg_EjsACxwdTOeVAUCdoSB4ofet2j0AG-7zQ6jpSQ-QvNnOBsEIIsAqfTGH44w2jTwAzTN3EceoPAMKhbXi2w%3D%3D_V2&loc=US&title=Senior+Hardware+Engineer
- Excerpt: Senior Hardware Engineer, Electromagnetic and SIPI, Pixel Watch Mountain View, CA, USA In this role, you will participate actively across all lifecycle stages of Pixel Watch product development. You will serve as the technical owner for component and system-level Electromagnetic (EM) integrity, signal and power integrity translating data into actionable architecture-level insights. You will require close collaboration with cross-functional teams to predict, debug, and optimize the hardware performance of next-generation wearable technology.The Google Pixel team focuses on designing and delivering the world's most helpful mobile experience. The team works on shaping the future of Pixel devices and services through some of the most advanced designs, techniques, products, and experiences in consumer electronics. This includes bringing together the best of Google's artificial intelligence, software, and hardware to build global smartphones and create transformative experiences for users across the world. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead comprehensive EM simulations at both the component and system levels, with a focus on passive mode extraction and overall system performance analysis. Perform detailed correlation studies between simulation models and bench lab measurements to ensure and maintain high-fidelity simulation accuracy. Deliver targeted simulations and DOEs (Design of Experiments) to assist cross-functional teams with EM-related debugging, root-cause analysis, and hardware optimization. Conduct Pixel Watch Signal Integrity and Power Integrity (SIPI) simulations in the frequency domain,

### Software Dev Engineer II, FireTV Telemetry - Amazon
- Location: Chennai, Tamil Nadu, IND (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-02
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10437611/software-dev-engineer-ii-firetv-telemetry
- Excerpt: Software Dev Engineer II, FireTV Telemetry Chennai, Tamil Nadu, IND FireTV Chennai is looking for passionate, hard-working, and talented software engineers who has experience in building innovative, mission critical, high volume cloud systems that powers our world-class content forward experience for millions of customers. As a software engineer in this team, you are expected to design and implement micro cloud services, EMR distributed systems and APIs serving ultra-high volume transactions. Your cloud services, Data processing system and API's have direct impact to customer experience, be a base for building varied features for FireTV. You identify betterment's to current design, propose improvements, identify impact to dependent systems, implement and rollout changes successfully. You continuously look for improvements that excite our customers, show bias for action and get it done. Key job responsibilities As a Software Engineer, you own micro services, Distributed Data processing systems and components, adopt to latest technologies, build quality guard rails, alarms and monitors. You should be able to take short term and long term trade-off by working backwards on customer experience. You will be the operational experience champion for your team, identify areas to reduce operational overhead, optimize the cost, build best practices for the team. You raises the quality bar for the team with your every code and design artifact. You will help onboard new engineers and mentor them in the role. About the team Amazon FireTV products are revolutionary consumer devices that have become the #1 best-selling Amazon products. They are among the most innovative

### Software Dev Engineer II, FireTV - Amazon
- Location: Chennai, Tamil Nadu, IND (unspecified)
- Salary: Not disclosed
- Posted: 2026-04-16
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10394287/software-dev-engineer-ii-firetv
- Excerpt: Software Dev Engineer II, FireTV Chennai, Tamil Nadu, IND FireTV Chennai is looking for passionate, hard-working, and talented software engineers who has experience in building innovative, mission critical, high volume cloud systems that powers our world-class content forward experience for millions of customers. As a software engineer in this team, you are expected to design and implement micro cloud services and APIs serving ultra-high volume transactions. Your cloud services and API's have direct impact to customer experience, be a base for building varied features for FireTV. You identify betterment's to current design, propose improvements, identify impact to dependent systems, implement and rollout changes successfully. You continuously look for improvements that excite our customers, show bias for action and get it done. Key job responsibilities As a Software Engineer, you own micro services and components, adopt to latest technologies, build quality guard rails, alarms and monitors. You should be able to take short term and long term trade-off by working backwards on customer experience. You will be the operational experience champion for your team, identify areas to reduce operational overhead, optimize the cost, build best practices for the team. You raises the quality bar for the team with your every code and design artifact. You will help onboard new engineers and mentor them in the role. About the team Amazon FireTV products are revolutionary consumer devices that have become the #1 best-selling Amazon products. They are among the most innovative and fastest growing businesses at both Amazon and the entire consumer

### Senior CPU Performance Architect - Google
- Location: Mountain View, CA, USA; +3 more (unspecified)
- Salary: $163K-$237K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckcDcgs4KibHM8gnqti7eRyV-VMbH_5YbBs3u7pKtMsbGEjsACxwdTMcCzwBhN48GztG1hEO3PTvD5y2M7YFpYpMj1zxD8CQ2pqQ5RXWSi3ioNtAkzsU2FfwOHJ9q5A%3D%3D_V2&loc=US&title=Senior+CPU+Performance+Architect
- Excerpt: Senior CPU Performance Architect Mountain View, CA, USA; +3 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $237000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Plan and evaluate ARM's architecture features from both architecture and performance aspects. Develop a performance model for performance analysis and microarchitecture studies. Lead collaboration with design and verification teams to develop efficient CPU implementation. Define and write CPU subsystem architecture specifications. Drive performance correlation between the performance model and RTL implementation, including micro-benchmark development and pre-silicon and post-silicon performance bug triage. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer

### UX Design Intern, Interaction Design - Amazon
- Location: London, England, GBR (unspecified)
- Salary: Not disclosed
- Posted: 2026-02-25
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/3189014/ux-design-intern-interaction-design
- Excerpt: UX Design Intern, Interaction Design London, England, GBR Design at Amazon has been growing steadily in reach and impact-from devices to fashion, delivery logistics to search and streaming video, from voice and sound to physical retail, and more-all while creating and cultivating experiences that touch Amazon customers everywhere, every day. Amazon design teams include every flavour of UI, UX, visual, motion, illustration, brand, and marketing design roles-as well as design technologists, researchers, writers, and more. Check out Amazon.design, and come build the future with us. This internship is 3 months in length, beginning in summer 2026. Please make sure your CV includes a link to your portfolio. Key job responsibilities • Collaborate with the team to deliver user experience designs • Design beautiful, thoughtful interfaces demonstrating visual craft • Create prototypes that demonstrate intuitive interaction patterns and micro-interactions • Develop product visualisations to communicate design concepts • Craft user-centered designs informed by market analysis, customer feedback, and usability findings • Translate business requirements into visual concepts, interaction flows and prototypes • Develop compelling narratives that effectively communicate design decisions to diverse stakeholders Design Functional Competencies: • Visual Design Craft - Typography, colour theory, composition, layout, and accessible design • Prototyping - Creating effective prototypes, user flows, micro-interactions across fidelity levels • Storytelling - Communicating design decisions to diverse audiences • Systems Thinking - Designing within complex digital ecosystems A day in the life As an intern, you will be matched to a mentor. In addition to learning about an impactful

### Senior Algorithm Development (Embedded) - Analog Devices
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-CA-San-Diego-Avenue-of-Science/Algorithm-Development--Embedded-_R253054
- Excerpt: Senior Algorithm Development (Embedded) 2 Locations posted: Posted Today

### Product Manager - Micro-Segmentation Platform and Operational Experience - Akamai Technologies
- Location: Israel (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-07
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://fa-extu-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/requisitions/job/3022
- Excerpt: Product Manager - Micro-Segmentation Platform and Operational Experience Israel We're looking for a Product Manager to join us and own the Platform and Operational Experience aspects of the Guardicore product, ensuring it delivers exceptional experiences to our global enterprise customers. You will drive this through product strategy, innovation, and execution across the product development lifecycle, removing adoption frictions and boosting customer value.

### Principal Product Manager, Personal Devices - Amazon
- Location: Sunnyvale, California, USA (unspecified)
- Salary: $207K-$280K
- Posted: 2026-05-06
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10412751/principal-product-manager-personal-devices
- Excerpt: Principal Product Manager, Personal Devices Sunnyvale, California, USA The next generation of personal devices will not be defined by incremental spec improvements. They will be defined by bold hardware bets that unlock entirely new customer experiences. Sensors that perceive context. Form factors that defy convention. Silicon and system architectures purpose-built for an AI-native world. We are pushing these boundaries, and we need a product leader who can see around corners and ship what's next. As Principal Product Manager - Technical on the Personal Mobile Devices team, you will lead the vision, strategy, and end-to-end execution of one or more next-generation hardware products, defining device architectures, component strategies, and ID directions that will put transformative technology into the hands of millions of customers. This is not stewardship of an already defined roadmap. This is new-to-world device creation where every decision, every choice has to be rooted in delivering features that customers find useful, delightful and are willing to pay for. This is part vision, part curation and 100% responsibility for execution, shipping devices at scale and delighting our customers. Key job responsibilities ● Own the end-to-end product roadmap from early concept through mass production, making disciplined trade-offs across compute, AI, graphics, performance, cost, power, and time-to-market. ● Drive the technology scouting and selection process Evaluate emerging components (chipsets, displays, sensors, batteries, connectivity modules) and make high-conviction bets on the technologies that will define the next product generation. ● Lead cross-functional execution across hardware engineering, industrial design, operations, supply chain, and software

### Senior Product Manager - Micro-Segmentation Platform and Operational Experience - Akamai Technologies
- Location: Israel (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-07
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://fa-extu-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/requisitions/job/2870
- Excerpt: Senior Product Manager - Micro-Segmentation Platform and Operational Experience Israel We're looking for an experienced Product Manager to join us and own the Platform and Operational Experience aspects of the Guardicore product, ensuring it delivers exceptional experiences to our global enterprise customers. You will drive this through product strategy, innovation, and execution across the product development lifecycle, removing adoption frictions and boosting customer value.

### Senior Photonic Engineer, Machine Learning - Google
- Location: Sunnyvale, CA, USA (unspecified)
- Salary: $159K-$231K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckfAbDbl4Gj8ej195QHnpSdzBlh5pulK6eOic9XM9F6BREjsACxwdTGkiMPDphuxRpPK6GjHta6rrefkpHAv7Xl9c0Yfy1Z7ztiYrtbTA9GE9NB9c4PUVUD7I5uCdJA%3D%3D_V2&loc=US&title=Senior+Photonic+Engineer
- Excerpt: Senior Photonic Engineer, Machine Learning Sunnyvale, CA, USA As a Photonic Engineer for machine learning systems, you will be responsible for creating next generation optical interconnect technologies for Tensor Processing Unit (TPU) systems. You will work with both the optics team and machine learning team to lay out the optical technology roadmaps to scale future generation machine learning systems.Our Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power all of Google's services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of Google users. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $159000 - $231000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Design low-cost and high-speed optical transceivers for data center applications. Develop optical systems and architectures to scale Tensor Processing Unit (TPU) and Graphics Processing Unit (GPU) superpods. Identify, research, and evaluate emerging photonic networking technologies. Explore optical technologies to disaggregate and improve the efficiencies of future computing systems. Minimum qualifications: PhD degree in Electrical Engineering, Computer Engineering, Physics, a related field,

### Staff Mechanical Engineer, Advanced Robotics - Analog Devices
- Location: US, MA, Boston (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-22
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Boston/Staff-Mechanical-Engineer--Advanced-Robotics_R262611-1
- Excerpt: Staff Mechanical Engineer, Advanced Robotics US, MA, Boston posted: Posted 21 Days Ago

### Staff Embedded Software Engineer, Audio/Firmware - Google
- Location: San Jose, CA, USA; +1 more (unspecified)
- Salary: $207K-$301K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckVt7Pg_O1mbcb343oIcxBgJ97hNgs2tog9xXJ_zn4QiQEjsACxwdTBX2n6LokB0f_ss82w84jfM_icaY_PqDJxShMSESnllJJ-IRVg9TbJxVLmAM5W0fpyrXXB-wKw%3D%3D_V2&loc=US&title=Staff+Embedded+Software+Engineer
- Excerpt: Staff Embedded Software Engineer, Audio/Firmware San Jose, CA, USA; +1 more Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. Android microXR project aims to build a software platform for AR thin-client smart glasses based on Android. The Android microXR platform requires support for various system level components including drivers and system software for audio, display and other novel consumer hardware devices. Audio, Display and New Technology Introduction (NTI) team's charter is to enable microXR platform to utilize these novel devices to enable thin-client smart AR glasses experience. The work includes enabling various display systems, like microLED, etc., as well as custom hardware audio pipeline support, proximity sensors, Ambient Light Sensors (ALS) and other embedded sensors. For decades, the computing revolution

### Development Engineer - AbbVie Inc.
- Location: Tempe, AZ, United States (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.smartrecruiters.com/AbbVie/3743990013374526-development-engineer
- Excerpt: Development Engineer Tempe, AZ, United States Company Description: AbbVie's mission is to discover and deliver innovative medicines and solutions that solve serious health issues today and address the medical challenges of tomorrow. We strive to have a remarkable impact on people's lives across several key therapeutic areas - immunology, oncology, neuroscience, and eye care - and products and services in our Allergan Aesthetics portfolio. For more information about AbbVie, please visit us at www.abbvie.com . Follow @abbvie on X , Facebook , Instagram , YouTube , LinkedIn and Tik Tok . Job Description: AbbVie is seeking a Development Engineer to join the PDS&T Injection Devices group. In this role, you will contribute to the design, development, characterization, and lifecycle support of drug delivery devices and related combination products. You will work closely with cross-functional teams to advance robust, manufacturable, and patient-centered device solutions. Responsibilities Support design and development activities for injection drug delivery devices Perform mechanical analysis, prototyping, testing, and troubleshooting of device components and assemblies Evaluate device performance, identify failure modes, and support root cause investigations Assist with verification, validation, and technical transfer activities Collaborate with R&D, manufacturing, quality, regulatory, and suppliers to advance device programs Generate and review technical documentation, test reports, specifications, and protocols Support change control, risk assessments, and continuous improvement efforts Contribute to device platform strategy, robustness, and manufacturability Ensure all work is conducted in compliance with safety, quality, and applicable regulatory requirements (e.g. 21 CFR 820 / Design Controls) Qualifications: Bachelor's Degree in Mechanical

### Embedded Firmware Engineer, Digital Signal Processing - Google
- Location: Sunnyvale, CA, USA (unspecified)
- Salary: $192K-$279K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2Fckco0WNuDsazauByPDwx6502g-CjXVCOnvTGWo3eiDEWnEjsACxwdTKbrxkDl9Y3qETpNXn-qY4aiCNjtfJ5qIUge9bPPuVs2HYfz20oxTZoUJ45-O4tT4BD18W8JHQ%3D%3D_V2&loc=US&title=Embedded+Firmware+Engineer
- Excerpt: Embedded Firmware Engineer, Digital Signal Processing Sunnyvale, CA, USA In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will architect the control-plane software for the entire high-speed Physical Layer (PHY). You will lead the development of complex state machines for link training and auto-negotiation that allow Google's AI clusters to communicate reliably at next-generation data rates. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking,

### Mechanical Engineer - AbbVie Inc.
- Location: Tempe, AZ, United States (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.smartrecruiters.com/AbbVie/3743990013309776-mechanical-engineer
- Excerpt: Mechanical Engineer Tempe, AZ, United States Company Description: AbbVie's mission is to discover and deliver innovative medicines and solutions that solve serious health issues today and address the medical challenges of tomorrow. We strive to have a remarkable impact on people's lives across several key therapeutic areas - immunology, oncology, neuroscience, and eye care - and products and services in our Allergan Aesthetics portfolio. For more information about AbbVie, please visit us at www.abbvie.com . Follow @abbvie on X , Facebook , Instagram , YouTube , LinkedIn and Tik Tok . Job Description: AbbVie is seeking a Mechanical Engineer to join the PDS&T Injection Devices group. In this role, you will contribute to the design, development, characterization, and lifecycle support of drug delivery devices and related combination products. You will work closely with cross-functional teams to advance robust, manufacturable, and patient-centered device solutions. Responsibilities Support design and development activities for injection drug delivery devices Perform mechanical analysis, prototyping, testing, and troubleshooting of device components and assemblies Evaluate device performance, identify failure modes, and support root cause investigations Assist with verification, validation, and technical transfer activities Collaborate with R&D, manufacturing, quality, regulatory, and suppliers to advance device programs Generate and review technical documentation, test reports, specifications, and protocols Support change control, risk assessments, and continuous improvement efforts Contribute to device platform strategy, robustness, and manufacturability Ensure all work is conducted in compliance with safety, quality, and applicable regulatory requirements (e.g. 21 CFR 820 / Design Controls) Qualifications: Bachelor's Degree in Mechanical

### Senior FPGA Engineer (Teradyne, North Reading, MA) - Teradyne
- Location: North Reading, MA (unspecified)
- Salary: $111K-$178K
- Posted: 2026-06-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://jobs.teradyne.com/Teradyne/job/North-Reading-Senior-FPGA-Engineer-%28Teradyne%2C-North-Reading%2C-MA%29-MA/1381797100/
- Excerpt: Senior FPGA Engineer (Teradyne, North Reading, MA) North Reading, MA We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive. Our Purpose TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results. Opportunity Overview Teradyne's Integrated Systems Test (IST) Hardware Engineering team is seeking a highly motivated, energetic, technically driven Senior FPGA Engineer to focus on the continuous development of our growing portfo

### UX Designer (Design Systems) - Fire TV/Tablet , Devices and Services Design Team - Amazon
- Location: London, England, GBR (hybrid)
- Salary: Not disclosed
- Posted: 2026-01-08
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/3155477/ux-designer-design-systems-fire-tv-tablet-devices-and-services-design-team
- Excerpt: UX Designer (Design Systems) - Fire TV/Tablet , Devices and Services Design Team London, England, GBR We're seeking a UX Designer with design systems expertise to support Fire TV and Tablet while also designing B2B workflows, enterprise tools for marketing experiences, and developer tools. This hybrid role combines deep design system knowledge (component building, use case documentation, Human Interface Guidelines) with hands-on product design for complex workflow and service design challenges. Key job responsibilities What You'll Do: Design Systems (60-70% of role) • Build Fire TV/Tablet-specific components and patterns (10-foot UI browsing, remote navigation, multi-window layouts) • Write use case documentation for components where micro-interactions differ by device (d-pad navigation, touch interactions, voice shortcuts) • Create Fire TV Human Interface Guidelines covering 10-foot UI patterns, remote navigation, and voice-first interactions • Build 3P developer documentation to enable self-service support • Consult with 18 designers on component usage, governance, and best practices • Build AI-powered Figma plugins to enforce standards and accelerate operations Product Design - B2B/Enterprise/Developer Tools (30-40% of role) • Design B2B workflows for enterprise customers (account management, team collaboration, provisioning) • Create marketing and developer tools experiences (dashboards, reporting, analytics) • Design service experiences spanning multiple touchpoints and user types • Conduct user research and translate insights into workflow improvements • Design complex information architectures for enterprise-scale tools • Collaborate with product managers and engineers on B2B feature prioritization About the team The Devices & Services Experience Design (DXD) team leads user experience and industrial design innovation across

### High-Speed Interface Validation Engineer, Post Silicon Validation - Amazon
- Location: Austin, Texas, USA (unspecified)
- Salary: $144K-$194K
- Posted: 2026-05-29
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10434989/high-speed-interface-validation-engineer-post-silicon-validation
- Excerpt: High-Speed Interface Validation Engineer, Post Silicon Validation Austin, Texas, USA Annapurna Labs, an AWS organization with development centers in the U.S. and Israel, builds custom silicon and software for AWS customers. Our team combines cloud-scale innovation with world-class expertise across silicon engineering, hardware design, verification, software, and operations to tackle technical challenges that have never been seen before. Join our Post-Silicon Validation team to validate the critical high-speed interconnects - HBM, PCIe, UCIe, and chip-to-chip links - that enable massive bandwidth and scaling in AWS's next-generation ML accelerators. You'll ensure link integrity, performance, and reliability at the electrical and protocol layers across the full product lifecycle, from first silicon through production deployment in AWS data centers. You'll work in a fast-paced, startup-like environment alongside some of the brightest minds in the industry on next generation, internet-scale technology that directly impacts how customers use Machine Learning acceleration. Your expertise will be instrumental in validating the I/O technologies that enable our custom silicon to scale beyond what was previously possible. Key job responsibilities Validate high-speed interfaces (HBM, PCIe, UCIe, custom SerDes) end-to-end from PHY training through sustained traffic Perform electrical characterization: eye diagrams, jitter analysis, voltage margin, and equalization tuning Execute protocol-level compliance testing and interoperability validation against industry specifications Stress-test links across PVT (Process, Voltage, Temperature) corners and aging conditions Debug link training failures, bit errors, and performance degradation using lab instrumentation and silicon debug features Collaborate with PHY design teams on equalization optimization, margin improvement, and silicon feedback A day

### ASIC Design Engineer, Amazon Camera ASIC Team - Amazon
- Location: Cambridge, England, GBR (unspecified)
- Salary: Not disclosed
- Posted: 2026-04-09
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10387315/asic-design-engineer-amazon-camera-asic-team
- Excerpt: ASIC Design Engineer, Amazon Camera ASIC Team Cambridge, England, GBR Join the team which delivers highly differentiated silicon into Blink and Ring battery powered devices. Our team works on state-of-the art SoCs in a vertically integrated team environment to deliver products our customers love. Innovators will be delighted with our integrated verification/validation environment that is used to perform architectural modeling to post-silicon validation. The team works backwards from customer requirements to build super-low power, energy efficient designs that include the latest in AI, video processing, low power communications and CMOS fabrication technology. Key job responsibilities - Write micro-architecture specs and solicit feedback/link to KPIs from architecture team - Execute on design specifications to deliver high quality RTL - Evaluate 3rd party IP blocks - Estimate power, performance, and area for significant IPs early in design cycle - Ensure quality by running and tracking results of front-end tools including: Synthesis, Lint (RTL, DFT, UPF), Power Analysis and STA - Work with pre-silicon verification teams to assist in defining test-plans/test-benches - Work with post-silicon validation teams to define and execute on test-plans Basic Qualifications: - Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills - Experience with front-end design tools (Lint, CDC, RDC and lint) - Ability to write detailed micro-architectural specs which work through the design problems before coding (System Verilog, Verilog). Preferred Qualifications: - Bachelor's degree in Electrical or Communications Engineering or a related field - Experience with industry standard tools and scripting languages (Python

### Senior Connectivity Software Developer, Embedded Systems/Firmware, XR - Google
- Location: San Jose, CA, USA; +1 more (unspecified)
- Salary: $174K-$253K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckdERmwiuUDFaGZSNH13v1wMIwOYLlBbo7OwKyQz_DnteEjsACxwdTOnoMc-gryVXc_fo1wpWfOsIT_lFIos91G8LbRceqcJcOmDNsKeIukaZ0pglBJITlYVOzrM57A%3D%3D_V2&loc=US&title=Senior+Connectivity+Software+Developer
- Excerpt: Senior Connectivity Software Developer, Embedded Systems/Firmware, XR San Jose, CA, USA; +1 more Google's software developers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at a massive scale, and extend well beyond web search. We're looking for developers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software developer, you will work on a specific project critical to Google's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our developers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. As a Connectivity Software Developer on the XR Glasses OS System Software team, you will design, implement and maintain the low-level system software that enables next-generation Augmented Reality (AR) reference platforms. In this capacity, you will apply your extensive embedded systems expertise to lead the integration, bring-up, and refinement of low-power WiFi and Bluetooth subsystems. You will collaborate with the MicroXR connectivity, Electrical Engineering (EE), and power/thermal teams to achieve the rigorous performance and power Key Performance Indicator (KPIs) necessary for launching groundbreaking product categories.For decades, the computing revolution has reshaped our world driven by breakthroughs in compute,

### ASIC Digital Design Engineer II, Silicon Engineering - Google
- Location: Bengaluru, Karnataka, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-08
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckcHsrgwWN7Y2d6pNVVICVe2b0jfdsrwKnS2Duw_RfL4yEjsACxwdTM8PdhjKksREzrwUS05bAsHYIsnAM0j18suBmBOP_jXW3Qr7CK8ogRakyjXMqLc743ndvIUFPg%3D%3D_V2&loc=IN&title=ASIC+Digital+Design+Engineer+II
- Excerpt: ASIC Digital Design Engineer II, Silicon Engineering Bengaluru, Karnataka, India Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role you will be a part of the team which designs the Tensor Processing Unit (TPU) core and sub-system. The TPU core is the heart of Google's Tensor SoC. You will be working through all phases of design and implementation. You will be working with Architects to come-up with microarchitecture specifications. You will use your logic design skills to convert the micro-arch into System Verilog code. You will be involved in Power, Performance and Area (PPA) experiments/proto-typing experiments early on to optimize PPA. You will also work closely with the verification team to verify the features implemented in design. You will also work with the Physical design (PD) team to take the design through PD cycle and eventual tape-out. The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world. Use simulation/emulation/power analysis tools and techniques to

### Applied Scientist, Quantum Device Packaging & Environment R&D, Device Team, AWS Center for Quantum Computing, Device Team - Amazon
- Location: Pasadena, California, USA (unspecified)
- Salary: $143K-$193K
- Posted: 2026-03-31
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10379765/applied-scientist-quantum-device-packaging-environment-r-d-device-team-aws-center-for-quantum-computing-device-team
- Excerpt: Applied Scientist, Quantum Device Packaging & Environment R&D, Device Team, AWS Center for Quantum Computing, Device Team Pasadena, California, USA The Amazon Web Services (AWS) Center for Quantum Computing in Pasadena, CA, is looking to hire an Applied Scientist on the Device Team, focused on packaging and environmental R&D for quantum devices. You will join a multi-disciplinary team of theoretical and experimental physicists, materials scientists, and hardware and software engineers working at the forefront of quantum computing. You should have deep expertise in the design, modeling, and testing of packaging and off-chip environments for microelectronic or quantum devices, with a strong understanding of how packaging and environmental factors impact qubit performance at cryogenic operating conditions. Candidates with a track record of original scientific contributions in packaging, microwave engineering, or quantum cryogenic hardware will be preferred. We are looking for candidates with strong scientific and engineering principles, resourcefulness and a bias for action, superior problem solving, and excellent communication skills. Working effectively within a team environment is essential. As an applied scientist at CQC, you will be expected to drive packaging and environmental R&D from concept through hardware demonstration and stay abreast of advances in quantum hardware packaging and cryogenic measurement science. Key job responsibilities In this role, you will develop packaging and environmental R&D for superconducting quantum devices. Your responsibilities will span four interconnected areas: Packaging R&D: Design, model, and test packaging solutions for superconducting quantum devices. Build electromagnetic and mechanical models to predict and optimize packaging performance, and characterize

### Senior Embedded Firmware Engineer - Analog Devices
- Location: India, Bangalore, Nova (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-03
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/India-Bangalore-Nova/Senior-Software-Engineer_R262038
- Excerpt: Senior Embedded Firmware Engineer India, Bangalore, Nova posted: Posted 9 Days Ago

### Software Dev Engineer, Alexa Daily Essentials - Device Software, Alexa Daily Essentails - Device Software - Amazon
- Location: Sunnyvale, California, USA (unspecified)
- Salary: $165K-$224K
- Posted: 2026-05-13
- Parental leave: 20 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10418063/software-dev-engineer-alexa-daily-essentials-device-software-alexa-daily-essentails-device-software
- Excerpt: Software Dev Engineer, Alexa Daily Essentials - Device Software, Alexa Daily Essentails - Device Software Sunnyvale, California, USA Do you like working on industry-defining projects that leverage artificial intelligence (AI) and are used everyday by millions of customers worldwide across Alexa cloud and Echo devices? Then read on! At Amazon, we hire the best minds in technology to innovate and build on behalf of our customers. The focus we have on our customers is why we are one of the world's most beloved brands - customer obsession is part of our company DNA. Our Software Development Engineers (SDEs) use advanced AI technology, deep device-side knowledge and large-scale systems to solve complex problems. We get to see the impact of their work first-hand on millions of Echo devices worldwide. We are looking for individuals who are passionate about creating new products, features, and services from scratch while managing ambiguity and the pace of a company where development cycles are measured in weeks, not years. If this sounds interesting to you, apply and come chart your own path at Amazon. Key job responsibilities - Design & Development: Design, develop, and maintain timer, alarm, and reminder features on Echo devices, ensuring reliability and low-latency performance. Own end-to-end delivery of medium-to-large features across the full software stack including firmware, middleware, and cloud integration. Develop and optimize on-device scheduling logic to ensure accurate triggering across device states including active, standby, and low-power modes. - Technical Leadership: Drive technical design discussions and produce design documents for

### Post Silicon Advanced Packaging Engineer - Google
- Location: Taipei, Taiwan; +1 more (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-26
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckWt1U1jPFLwp1NaN6nSRthRaWTkf0K6f4553J5MCBKHwEjsACxwdTAfQzVWgwXRL5rwhMAIsuXijrZBEqPQQ0s0KUDYj-RkZCvQsQg6WjsadQ1ezE_mNMHW-5nnYLg%3D%3D_V2&loc=TW&title=Post+Silicon+Advanced+Packaging+Engineer
- Excerpt: Post Silicon Advanced Packaging Engineer Taipei, Taiwan; +1 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Post Silicon Advanced Packaging Engineer, you will bridge the gap between post-silicon bring-up, foundry/OSAT manufacturing, and IC design. You will own the mass production yield, quality, and sustaining engineering for high-performance computing and AI products utilizing 2.5D/3D advanced packaging architectures. Your primary focus is maximizing package-level yield, resolving complex multi-die integration failures, and driving cross-functional engineering teams to optimize cost and reliability. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Monitor, analyze, and improve package-level yields for 2.5D/3D architectures. Track yield from

### Internship - MicroLED application engineer - NXP Semiconductors
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Eindhoven/Internship---MicroLED-application-engineer_R-10062875
- Excerpt: Internship - MicroLED application engineer 2 Locations posted: Posted 30+ Days Ago

### Senior CPU Design Verification Engineer, Emulation - Google
- Location: Austin, TX, USA; +3 more (unspecified)
- Salary: $163K-$237K
- Posted: 2026-06-09
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckV-Qg_cjRw75nG8ayY7-bHln_TIUxekLKzww-r2Gn5GVEjsACxwdTOQfWdeWXGJDaS9JMTt5mXniXJngpDM8BaO958zwudw6S4B5NtGBB24FK6Ej_573U700r_k1FQ%3D%3D_V2&loc=US&title=Senior+CPU+Design+Verification+Engineer
- Excerpt: Senior CPU Design Verification Engineer, Emulation Austin, TX, USA; +3 more Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $237000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Act as the critical bridge between Emulation, Design Verification (DV), and Register-Transfer Level (RTL) teams to accelerate root-cause analysis. Correlate DV simulation failures with emulation results by analyzing SystemVerilog/UVM testbenches. Lead post-silicon debug by analyzing lab artifacts (scan dumps, software logs) to reproduce silicon bugs in emulation. Create tools and scripts to automate debug pipelines and bridge software workloads with hardware triggers. Utilize deep micro-architecture knowledge to rapidly isolate complex hardware issues. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in both Design

### Data Scientist, Amazon Devices, Devices Sales & Marketing - Amazon
- Location: Bellevue, Washington, USA (unspecified)
- Salary: $136K-$184K
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10417968/data-scientist-amazon-devices-devices-sales-marketing
- Excerpt: Data Scientist, Amazon Devices, Devices Sales & Marketing Bellevue, Washington, USA The candidate in this role will own delivery of science products and solutions to help Amazon Devices Sales and Marketing org. make better decisions: product recommendations to customers, segmentation, financial incrementality of marketing initiatives, A/B testing etc. Key job responsibilities The Amazon Devices organization designs, produces and markets Echo Speakers, Kindle e-readers, Fire Tablets, Fire TV Streaming Media Players, Ring and Blink Smart Home & Security products. We are constantly looking to innovate on behalf of customers with new devices in existing or new categories or improving customer experience on existing platforms. The Devices Data Services (DDS) team provides Data Science, Analytics and Engineering support to the broader organization to enable Sales and Marketing activities across all these product lines. We are looking for an innovative, hands-on and customer-obsessed Data Scientist who can be a strategic partner to the product managers and engineers on the team. Our projects span multiple organizations and require coordination of experimentation, economic and causal analysis, and building predictive machine learning models. A successful candidate will be a problem solver who enjoys diving into data, is excited by difficult modeling challenges, is motivated to build something that will eventually become a production software system, and possesses strong communication skills to effectively interface between technical and business teams. In this role, you will be a technical expert with massive impact. You will take the lead on developing advanced ML systems that are key to reaching our

### Software development Engineer, Device Management Systems, India - Amazon
- Location: Chennai, Tamil Nadu, IND (unspecified)
- Salary: Not disclosed
- Posted: 2026-03-17
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/3206870/software-development-engineer-device-management-systems-india
- Excerpt: Software development Engineer, Device Management Systems, India Chennai, Tamil Nadu, IND We are the cloud platform solution provider for the Device businesses ranging from the E-Reader to Echo Family of Devices and expanding into third-party devices that connect to Amazon eco-system. Key job responsibilities • Define the long term technical strategy and architecture vision for device management, leveraging new technologies to deliver features to our customers. • Think big and continuously pitch for foundational solutions that will help device businesses to use these solutions, where applicable, instead of building their own. • Define technical approach to ensure data privacy is considered while providing foundational solutions. • Partner with each device team to understand their customer needs and influence adoption of new services. • Possess expert knowledge in performance, scalability, enterprise system architecture, and engineering best practices. • Assist in the career development of others, actively mentoring individuals and the Amazon developer community on advanced technical issues and helping managers guide the career growth of their team members. A day in the life - Communicate with other business teams in E-Reader/Tablet/Fire-TV/Alexa to name a few. - Collect the business requirements, - Help describe software product features, - Build technical designs and architecture. - Write code with at most care for customer data's security and customer's privacy. About the team The Device Management Services (DMS) organization is specialized in building foundational platform solutions that cater to a number of critical customer experiences. Basic Qualifications: - 3+ years of non-internship professional software development

### AC/RF Hardware Design Engineer, New College Graduate, (Teradyne, North Reading, MA) - Teradyne
- Location: Location not specified (unspecified)
- Salary: $69K-$111K
- Posted: 2026-05-01
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- Childcare support: yes (not source-backed)
- Learning budget: yes (not source-backed)
- Apply: https://jobs.teradyne.com/
- Excerpt: AC/RF Hardware Design Engineer, New College Graduate, (Teradyne, North Reading, MA) We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive. Our Purpose TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results. Opportunity Overview Our AC/RF Hardware design group is seeking a highly motivated engineer to join our design team in North Reading, MA. In this role, you will design and release AC and RF solutions consisting of complex instruments. You will integrate across all development functions (Signal Delivery, Mechanical, Systems engineering, Circuit design, Signal Integrity, Project management, etc.) to successfully bring up

### Technical Program Manager, Advanced Architecture, Platforms and Devices - Google
- Location: New Taipei, Banqiao District, New Taipei City, Taiwan (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-03
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckUwQwyGF2_UALvuOJh6_ohEpVYKkAbCCE6q7zF4E9ZmYEjoACxwdTBB_7mvTnk4Pgturw7YDJBTcqD4BIC1cA3GO3ej7PqhXv8u3KRYbHf2PX3cOYzlbmPdQq2eA_V2&loc=TW&title=Technical+Program+Manager
- Excerpt: Technical Program Manager, Advanced Architecture, Platforms and Devices New Taipei, Banqiao District, New Taipei City, Taiwan Google's projects, like our users, span the globe and require managers to keep the big picture in focus while being able to dive into the unique engineering challenges we face daily. As a Technical Program Manager at Google, you lead complex, multi-disciplinary engineering projects using your engineering expertise. You plan requirements with internal customers and usher projects through the entire project lifecycle. This includes managing project schedules, identifying risks and clearly communicating them to project stakeholders. You're equally at home explaining your team's analyses and recommendations to executives as you are discussing the technical trade-offs in product development with engineers. Using your extensive technical and leadership expertise, you manage projects of various size and scope, identifying future opportunities, improving processes and driving the technical directions of your programs. The Advanced Architecture TPgM will bring broad technical expertise coupled with program management experience. Fearless leaders and organizers -they work cross-functionally with internal teams and external suppliers. The Advanced Architecture TPgM sets strategy, streamlines productivity, executes on highly ambiguous early technology projects, and is responsible for managing/communicating status and issues. The Google Pixel team focuses on designing and delivering the world's most helpful mobile experience. The team works on shaping the future of Pixel devices and services through some of the most advanced designs, techniques, products, and experiences in consumer electronics. This includes bringing together the best of Google's artificial intelligence, software, and hardware to build

### Financial Analyst, Devices and Services - Google
- Location: London, UK (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-21
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2Fckduu_1DVC9ooWzpGfhwWisPkbBmvRXZoHQObwdyO9k-eEjsACxwdTNTFqFofMOJTmsdASSFnHTyv1-wx93H7X7MPehrKJNLLQo8JmPdk-AuRgvPwPYVoZdXUsICwKw%3D%3D_V2&loc=GB&title=Financial+Analyst
- Excerpt: Financial Analyst, Devices and Services London, UK Financial Analysts ensure that Google makes sound financial decisions. As a Financial Analyst, your work, whether it's modeling business scenarios or tracking performance metrics, is used by our leaders to make strategic company decisions. While working on multiple projects at a time, you are focused on the details while finding creative ways to solve big picture challenges. In this role, you will have the opportunity to work on one of Google's fastest moving businesses - Devices and Services! As part of the EMEA Devices and Services Finance team you will develop a holistic and in-depth understanding of one of Google's emerging product businesses, services and the ecosystem they operate within. You will be partnering with the EMEA Partnerships, Product, Marketing and GTM teams, in order to shape the strategic direction, while ensuring sound financial decisions for Google. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Partner with the Sales, CBM and Ops teams to inform the economics and risk management of retail/carrier agreements,

### M&D Hardware Engineer - GE Vernova
- Location: Lisburn (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Lisburn/Hardware-Engineer_R5036398-2
- Excerpt: M&D Hardware Engineer Lisburn posted: Posted 30+ Days Ago

### SoC Validation Engineer, Amazon Devices - Amazon
- Location: Bengaluru, Karnataka, IND (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10417469/soc-validation-engineer-amazon-devices
- Excerpt: SoC Validation Engineer, Amazon Devices Bengaluru, Karnataka, IND The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for an SoC Emulation Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. As an SoC Validation Engineer, you will be responsible for enabling the pre-silicon and post-silicon validation verification of next generation SoCs on multiple platforms such as emulation, prototyping and early silicon. You will develop and execute test plans, design test environments and help build emulation and prototype models while working closely with architects, RTL designers, SoC and software development teams. In this role, you will: - Develop/review subsystem testplans and help create the SoC Verification and Validation plan. - Implement tests and scenarios on multiple platforms. - Develop and deploy baremetal drivers to configure SoC subsystems Pre-silicon activities: - Develop test benches, transactors and monitors to work with Emulation systems (ex. Zebu) and Prototyping systems (ex. HAPs) - Develop infrastructure for build and runtime of SoC emulation and prototyping models using vendor tools and Providing training, failure debug support and improving debug capabilities - Maximize efficient utilization of the platforms through automation and other innovations - Debug

### Working Student (f/m/d) MCU Support - NXP Semiconductors
- Location: Munich (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-08
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Working-Student--f-m-d--MCU-Support_R-10063859-1
- Excerpt: Working Student (f/m/d) MCU Support Munich posted: Posted 4 Days Ago

### ASIC RTL Engineer III, Silicon - Google
- Location: Bengaluru, Karnataka, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-19
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckYpGadnwFrCxIRH2UMkhWyNCMxCjVAGVA6aWToBIpAPCEjsACxwdTFV479vqU9F4HM0FiVlOaWHkxUSgmkvseb_SWFfSDxd1pOKmRT3AsUAbimx9BACtuqm2yxWOjw%3D%3D_V2&loc=IN&title=ASIC+RTL+Engineer+III
- Excerpt: ASIC RTL Engineer III, Silicon Bengaluru, Karnataka, India Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will be creating the micro-architecture and design of the critical IPs widely used across multiple mobile SOC's subsystems and running extensive quality checks including Lint, Clock Domain Crossing (CDC), low power checks (VCLP), synthesis, and timing and power analysis. You should be able to timely deliver IPs and work with various cross-functional teams (DV/DFT/PD/power) to ensure quality. The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world. Define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.). Perform Register-Transfer Level (RTL) coding, function/performance simulation debug, and Lint/CDC/FV/UPF checks. Participate in synthesis, timing/power closure, and Field Programmable Gate Array (FPGA)/silicon bring-up. Participate in test plan and coverage analysis of the block and Application Specific Integrated Circuit (ASIC) level verification. Communicate and work with multi-disciplined and multi-site teams. Minimum qualifications: Bachelor's degree in Electrical

### Sr. Firmware Engineer, Annapurna Labs, Machine Learning Acceleration - Power and Performance - Amazon
- Location: Austin, Texas, USA (unspecified)
- Salary: $151K-$262K
- Posted: 2025-11-03
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/3120217/sr-firmware-engineer-annapurna-labs-machine-learning-acceleration-power-and-performance
- Excerpt: Sr. Firmware Engineer, Annapurna Labs, Machine Learning Acceleration - Power and Performance Austin, Texas, USA AWS Utility Computing (UC) provides product Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. We are seeking a Senior Firmware Engineer to join our Power Architecture team, developing firmware algorithms for power and performance management on ML Acceleration Chips. In this role, you will design and implement intelligent control algorithms, optimization strategies, and real-time decision-making systems that maximize performance while managing power and thermal constraints. You will develop sophisticated firmware that monitors system state, makes dynamic trade-offs between power and performance, and implements adaptive control policies. To enable this work, you will also build instrumentation and tracing capabilities that provide the telemetry needed to develop, tune, and validate your algorithms, with collected data optionally post-processed using cloud-based analytics. Key job responsibilities - Design and implement firmware algorithms for power management, thermal control, and performance optimization on ML acceleration hardware - Develop real-time control policies and state machines that dynamically balance power, thermal, and performance constraints - Create optimization algorithms for resource allocation, frequency/voltage scaling, and workload scheduling - Implement efficient data structures and algorithms suitable for embedded, resource-constrained environments - Design

### ASIC RTL Design Engineer III, Silicon - Google
- Location: Bengaluru, Karnataka, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-29
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckctfJ07tUTpQeO5GkYokwYIhZWi6TNbHV7KE4oGmwV8DEjsACxwdTGqmzN6Yd366t4Wp4IUNC6G4RBm2IHsv2hWPhclDdrAb_VB71S9UwT5PBV3j0_GMaBOXXHjE9A%3D%3D_V2&loc=IN&title=ASIC+RTL+Design+Engineer+III
- Excerpt: ASIC RTL Design Engineer III, Silicon Bengaluru, Karnataka, India Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role you will contribute in creating the micro-architecture of the mobile SOC's subsystems, integrating multiple first-party/ third-party components, and running extensive quality checks including Lint, Clock Domain Crossing (CDC), low power checks (VCLP), synthesis, and timing and power analysis. You will be able to timely deliver Subsystems and work with various cross-functional teams ( DV/DFT/PD/Power) to ensure quality. The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world. Define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.). Perform RTL coding, function/performance simulation debug, and Lint/Cyber Defense Center (CDC)/Formal Verification (FV)/ Unified Power Format (UPF) checks. Participate in synthesis, timing/power closure, and FPGA/silicon bring-up. Participate in test plan and coverage analysis of the block and ASIC-level verification. Communicate and work with multi-disciplined and multi-site teams. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer

### AI Scientist I - Axon Enterprise
- Location: Seattle, Washington, United States (unspecified)
- Salary: $130K-$208K
- Posted: 2026-05-21
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://job-boards.greenhouse.io/axon/jobs/7746492003
- Excerpt: AI Scientist I Seattle, Washington, United States Join Axon and be a Force for Good. At Axon, we're on a mission to Protect Life. We're explorers, pursuing society's most critical safety and justice issues with our ecosystem of devices and cloud software. Like our products, we work better together. We connect with candor and care, seeking out diverse perspectives from our customers, communities and each other. Life at Axon is fast-paced, challenging and meaningful. Here, you'll take ownership and drive real change. Constantly grow as you work hard for a mission that matters at a company where you matter. Life at Axon is fast-paced, challenging and meaningful. Here, you'll take ownership and drive real change. Constantly grow as you work hard for a mission that matters at a company where you matter. Your Impact We are seeking a highly skilled and innovative Computer Vision and Machine Learning Scientist to join our AI team, focusing on AI applications in Cloud, Devices and Robotics. As a key member of our research and development efforts, you will play a crucial role in advancing the state-of-the-art in Multimodal Large Language Models (MLLMs), Computer Vision technologies for our cloud, devices and robotics. You will collaborate with cross-functional teams to design, develop, and deploy cutting-edge computer vision algorithms and solutions that enable intelligent perception and understanding of visual data. What You'll Do Location: Seattle, WA Reports to: Senior Manager, Research Science - Research and develop advanced MLLMs, GenAI, and Computer Vision techniques for cloud, devices and

### SW Developer - Microcontrollers - NXP Semiconductors
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Brno/SW-Developer---Microcontrollers_R-10062692
- Excerpt: SW Developer - Microcontrollers 2 Locations posted: Posted 30+ Days Ago

### Principal Embedded Software Engineer - Boston Scientific
- Location: Clonmel (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.bostonscientific.com/job/Clonmel-Principal-Embedded-Software-Engineer-TA/1378994300/
- Excerpt: Principal Embedded Software Engineer Clonmel Diversity - Innovation - Caring - Global Collaboration - Winning Spirit - High Performance At Boston Scientific, we'll give you the opportunity to harness all that's within you by working in teams of diverse and high-performing employees, tackling some of the most important health industry challenges. With access to the latest tools, information and training, we'll help you in advancing your skills and career. Here, you'll be supported in progressing - whatever your ambitions. Advancing possibilities for a brighter tomorrow We are seeking a Principal Embedded Software Engineer on a permanent basis to join our team. Job Purpose: We are looking for a Principal Embedded Software Engineer to develop safety-critical embedded software for active implantable urology devices. In this role, you will design, implement, and verify software that controls implantable functionality, sensing, communication, and device safety. The role requires a strong understanding of embedded systems development in a regulated medical device environment. Key Responsibilities: Design, implement, and test embedded software for active implantable devices. Collaborate with systems and hardware teams to translate requirements into embedded software architecture and design. Develop low-power, real-time software for implantable platforms. Support software integration, bring-up, and system-level debugging. Ensure software development complies with software lifecycle processes and design controls. Conduct software

### Senior Engineer - AbbVie Inc.
- Location: Tempe, AZ, United States (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Parental leave: 12 weeks (not source-backed)
- Non-birth-parent leave: 12 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.smartrecruiters.com/AbbVie/3743990013433716-senior-engineer
- Excerpt: Senior Engineer Tempe, AZ, United States Company Description: About AbbVie AbbVie's mission is to discover and deliver innovative medicines and solutions that solve serious health issues today and address the medical challenges of tomorrow. We strive to have a remarkable impact on people's lives across several key therapeutic areas including immunology, oncology and neuroscience - and products and services in our Allergan Aesthetics portfolio. For more information about AbbVie, please visit us at www.abbvie.com . Follow @abbvie on LinkedIn, Facebook , Instagram , X and YouTube. Job Description: AbbVie is seeking an Engineering Technical Lead to join the PDS&T Injection Device group. In this role, you will provide technical leadership for the development, characterization, transfer, and lifecycle management of injection devices and related combination products. You will guide engineering strategy, drive complex technical decisions, and serve as a key resource for cross-functional partners throughout the product lifecycle. The ideal candidate brings deep device engineering expertise, strong scientific judgment, and the ability to lead technical work with a high degree of autonomy while mentoring others and advancing robust, patient-centered device solutions. Responsibilities Provide technical leadership for injection device development, verification, validation, and troubleshooting Define device engineering strategy and guide execution across development and lifecycle activities Lead root cause investigations and drive solutions for device performance, reliability, and usability issues Analyze multidisciplinary data and translate findings into technical conclusions and next-step actions Support design transfer, scale-up, commercialization, and change control activities Partner with cross-functional teams including R&D, manufacturing, quality, regulatory, and suppliers

### Senior Embedded Applications Developer - Analog Devices
- Location: India, Bangalore, Nova (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/India-Bangalore-Nova/Senior-Embedded-Applications-Developer_R261539
- Excerpt: Senior Embedded Applications Developer India, Bangalore, Nova posted: Posted 30+ Days Ago

### Head of Silicon Systems and Architecture, XR - Google
- Location: San Jose, CA, USA; +1 more (unspecified)
- Salary: $236K-$330K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckSHxMJwIXJOd1maQp4Qx85NWEQolFxyHPqjXaoKqfStFEjsACxwdTAfb3vOLHObr9_YL6YBagpCdZ7k-6ueAF172aQvmnK0GvI1H4ASZD_g2ITjYWXy-v-9agezcWQ%3D%3D_V2&loc=US&title=Head+of+Silicon+Systems+and+Architecture
- Excerpt: Head of Silicon Systems and Architecture, XR San Jose, CA, USA; +1 more The XR team at Google is building the future of immersive and augmented computing. We are a fast moving team with engineers, designers, and research scientists tasked to build the next generation technology to shape people's way of living in new imaginative ways. Through the development of Galaxy XR, Smart Glasses prototypes, and ARCore we are enabling augmented reality experiences around the world. But we aren't stopping there. We are working on really cool, technologies enabling the next generation of immersive and augmented experiences, through collaborations with teams across Google and our third-party partners. As the Head of Silicon Systems and Architecture, you will serve as the primary architect and multiplier for our silicon partnerships. You will define the hardware foundations through silicon for the next generation of headsets and glasses, ensuring that future chipsets are vertically integrated with Google's perception and software stacks to deliver user experiences. For decades, the computing revolution has reshaped our world driven by breakthroughs in compute, connectivity, mobile, and now, AI. Google's XR team is at the forefront of the next major leap - the convergence of AI and XR. This is more than just new devices - it's about reimagining how we interact with the world around us. We're building a future where lightweight XR devices like smart glasses and headsets pair with helpful AI to augment human intelligence, offering personalized, conversational, and contextually aware experiences. Individual pay is determined

### Imaging Systems Simulation Engineer, Pixel - Google
- Location: Mountain View, CA, USA (unspecified)
- Salary: $132K-$190K
- Posted: 2026-06-04
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckeFwsVfUwttbZNn2SnTD6ShStn3jQrupe5w8DuivK996EjsACxwdTD4cK2EauhYc6JdiqhiTckA-e0PovTkj6_8M_jjqtY891WpOS6U_yR2J05wgTerS1lWr_KTRtw%3D%3D_V2&loc=US&title=Imaging+Systems+Simulation+Engineer
- Excerpt: Imaging Systems Simulation Engineer, Pixel Mountain View, CA, USA Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $132000 - $190000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Develop imaging system simulation tools for Google's consumer hardware products. Define simulation workflows, capabilities, and performance goals, and validate against real hardware. Investigate imaging performance goals for multi-camera

### AF Solutions Regional Manager - Dallas, TX - Boston Scientific
- Location: Dallas, TX (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.bostonscientific.com/job/Dallas-AF-Solutions-Regional-Manager-Dallas%2C-TX-TX-75201/1381375000/
- Excerpt: AF Solutions Regional Manager - Dallas, TX Dallas, TX Diversity - Innovation - Caring - Global Collaboration - Winning Spirit - High Performance At Boston Scientific, we'll give you the opportunity to harness all that's within you by working in teams of diverse and high-performing employees, tackling some of the most important health industry challenges. With access to the latest tools, information and training, we'll help you in advancing your skills and career. Here, you'll be supported in progressing - whatever your ambitions. About the role: At Boston Scientific, we are advancing science for life through groundbreaking therapies that transform patient outcomes. As a regional sales manager in our Rhythm Solutions division, you will lead a talented team across multiple territories to drive sales of innovative therapies, including the Watchman™ Left Atrial Appendage Closure (LAAC) device, Electrophysiology (EP), and Access Solutions. The Watchman device offers patients with non-valvular atrial fibrillation a safe, effective alternative to lifelong blood thinner use. This role empowers you to make a measurable difference-both in patients' lives and in the strategic direction of your region. Hear how the Watchman device changed Linda's life: Watch Linda's Story You'll drive strategy, performance, and talent development while influencing business decisions and building strong relationships with physicians, hospital systems, and internal partners. Your responsibilities will include: Develop and execute regional sales strategies to

### Senior Technical Account Manager, Microsegmentation - Mumbai - Akamai Technologies
- Location: India (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-21
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://fa-extu-saasfaprod1.fa.ocs.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/requisitions/job/2868
- Excerpt: Senior Technical Account Manager, Microsegmentation - Mumbai India The Technical Account Manager role involves leveraging technical expertise to optimize Guardicore platform value through micro-segmentation, ZTNA, and DNS Firewall solutions.

### Senior Embedded SW Engineer - Analog Devices
- Location: US, MA, Boston (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Boston/Senior-Embedded-SW-Engineer_R258736
- Excerpt: Senior Embedded SW Engineer US, MA, Boston posted: Posted 30+ Days Ago

### Quantum Applied Scientist, Center for Quantum Computing, Device Team - Amazon
- Location: Pasadena, California, USA (unspecified)
- Salary: $143K-$193K
- Posted: 2026-05-04
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Surrogacy assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10409897/quantum-applied-scientist-center-for-quantum-computing-device-team
- Excerpt: Quantum Applied Scientist, Center for Quantum Computing, Device Team Pasadena, California, USA The Amazon Web Services (AWS) Center for Quantum Computing in Pasadena, CA, is looking to hire an Applied Scientist on the Device Team, focused on integration R&D for superconducting quantum processors. You will join a multi-disciplinary team of theoretical and experimental physicists, materials scientists, and hardware and software engineers working at the forefront of quantum computing. You should have deep expertise in the design, fabrication, and characterization of superconducting quantum devices, with a strong understanding of how materials, process integration, and device architecture impact qubit coherence and performance. Candidates with a track record of original scientific contributions in superconducting qubit coherence, thin film materials, or Josephson junction engineering will be preferred. We are looking for candidates with strong scientific and engineering principles, resourcefulness and a bias for action, superior problem solving, and excellent communication skills. Working effectively within a team environment is essential. As an Applied Scientist at CQC, you will be expected to drive integration R&D from concept through hardware demonstration and stay abreast of advances in superconducting quantum hardware. Key job responsibilities You will work at the unit cell level to integrate and evaluate new fabrication process modules and device design changes for superconducting quantum processors. This includes designing and executing experiments to assess performance impacts, investigating unexpected results through rigorous analysis and follow-on experiments, and leveraging electromagnetic and circuit-level simulations to interpret findings and connect observations to underlying physical mechanisms. You will coordinate with production

### Firmware Engineer, Annapurna Labs, ML Acceleration - Performance Instrumentation & Developer Tools - Amazon
- Location: Austin, Texas, USA (unspecified)
- Salary: $129K-$224K
- Posted: 2025-11-03
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/3120218/firmware-engineer-annapurna-labs-ml-acceleration-performance-instrumentation-developer-tools
- Excerpt: Firmware Engineer, Annapurna Labs, ML Acceleration - Performance Instrumentation & Developer Tools Austin, Texas, USA AWS Utility Computing (UC) provides product Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. We are seeking a Senior Firmware Engineer to join our Power Architecture team, developing firmware algorithms for power and performance management on ML Acceleration Chips. In this role, you will design and implement intelligent control algorithms, optimization strategies, and real-time decision-making systems that maximize performance while managing power and thermal constraints. You will develop sophisticated firmware that monitors system state, makes dynamic trade-offs between power and performance, and implements adaptive control policies. To enable this work, you will also build instrumentation and tracing capabilities that provide the telemetry needed to develop, tune, and validate your algorithms, with collected data optionally post-processed using cloud-based analytics. Key job responsibilities - Design and implement firmware algorithms for power management, thermal control, and performance optimization on ML acceleration hardware - Develop real-time control policies and state machines that dynamically balance power, thermal, and performance constraints - Create optimization algorithms for resource allocation, frequency/voltage scaling, and workload scheduling - Implement efficient data structures and algorithms suitable for embedded, resource-constrained environments - Design

### Director, Engineering, Gemini on Devices, DeepMind - DeepMind
- Location: Mountain View, CA, USA (unspecified)
- Salary: $307K-$428K
- Posted: 2026-06-05
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckTpZXNY80gvZ74daZyIcuEPUCtLEO2mhTyJJvENbBKRAEjsACxwdTJYhu4ZL7J11xWROKaaOftZ0ztGTBv_kClO2-nqUGOUonpSo7wNkZ4Yg-Wavyu-uzTT7oKalbg%3D%3D_V2&loc=US&title=Director
- Excerpt: Director, Engineering, Gemini on Devices, DeepMind Mountain View, CA, USA As the Director of Engineering for the Gemini Device Platform, you will lead the centralized hub responsible for pulling all on-device Gemini efforts together into a cohesive ecosystem. Reporting to the Senior Director of Engineering for Android & Chrome Integrations, you will oversee a specialized platform team and provide senior leadership for the multi-site devices organization. You are a platform visionary and a builder of organizations. You will move the organization beyond one-on-one integrations by establishing common APIs and shared componentry that allow Gemini to scale across Watch, TV, Auto, Glasses, and Buds with high velocity. Artificial intelligence will be one of humanity's most transformative inventions. At Google DeepMind, we are a pioneering AI lab with exceptional interdisciplinary teams focused on advancing AI development to solve complex global challenges and accelerate high-quality product innovation for billions of users. We use our technologies for widespread public benefit and scientific discovery, ensuring safety and ethics are always our highest priority. We are pushing the boundaries across multiple domains. Our global teams offer diverse learning opportunities and varied career pathways for those driven to achieve exceptional results through collective effort. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $307000 - $428000 (USD) + 30% bonus target + bonus + equity + benefits Learn more about benefits at Google . Drive the roadmap for shared on-device componentry, ensuring new form factors can be onboarded quickly. Build

### SoC Digital Physical Design Engineer - MCU - NXP Semiconductors
- Location: Catania (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Catania/SoC-Digital-Physical-Design-Engineer---MCU_R-10061277
- Excerpt: SoC Digital Physical Design Engineer - MCU Catania posted: Posted 30+ Days Ago

### Senior Embedded Engineer, Audio SW Systems - Analog Devices
- Location: Korea, Seoul, Gangnam-gu (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Korea-Seoul-Gangnam-gu/Embedded-Engineer--Audio-SW-Systems_R261512
- Excerpt: Senior Embedded Engineer, Audio SW Systems Korea, Seoul, Gangnam-gu posted: Posted 30+ Days Ago

### Silicon Micro-architecture and RTL Lead, Google Cloud - Google
- Location: Bengaluru, Karnataka, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-04-28
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckXiAZPQspEkwABvZ6BujZJltNS3E2m7WTxg4dUcXd9YtEjsACxwdTOYq9JSIqkGURs04FP8E5uhd97AQRZrIk6iLNW1H1k9NQg2lg39195nHmwKBIQxKVHgGCZBpRA%3D%3D_V2&loc=IN&title=Silicon+Micro-architecture+and+RTL+Lead
- Excerpt: Silicon Micro-architecture and RTL Lead, Google Cloud Bengaluru, Karnataka, India In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. In this role, you will be part of a team developing Application-Specific Integrated Circuits (ASIC) used to accelerate and improve traffic efficiency in data centers. You will collaborate with members of architecture, verification, power and performance, physical design, etc. to specify and deliver high quality designs for next generation data center accelerators. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind. The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to

### Software Dev Engineer - Amazon
- Location: Sunnyvale, California, USA (unspecified)
- Salary: $165K-$224K
- Posted: 2026-04-13
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10390344/software-dev-engineer
- Excerpt: Software Dev Engineer Sunnyvale, California, USA Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced popular devices like Fire tablets, Fire TV, Amazon Echo and Amazon Echo Show. The Amazon Devices group delivers delightfully unique Amazon experiences, giving customers instant access to everything, digital or physical. Key job responsibilities Design, develop, and optimize the cellular telephony framework and services layer on Android-based devices, delivering reliable voice, data, messaging, and connectivity experiences. This role owns the application processor side of the mobile telephony stack, integrating carrier requirements, platform telephony APIs, and cellular service features across various devices. - Architect and implement core telephony framework components including calling, data connectivity, messaging, and advanced features such as Wi-Fi calling, eSIM provisioning, and 5G integration. - Optimize telephony stack performance for call setup latency, network registration, and power efficiency across diverse carrier networks and device configurations. - Partner with product management to translate customer experience goals into technical designs and implementation. - Collaborate cross-functionally with modem/baseband, OS platform, QA/certification, and cloud services teams to deliver differentiated telephony features end-to-end. - Lead and participate in design reviews, taking ownership of critical architectural decisions and driving resolution of complex technical issues. About the team We own the cellular services on various devices, building the software that connects people through voice, data, and messaging every day. We

### Senior Embedded Software Engineer - Advanced Energy - Intuitive Surgical, Inc.
- Location: Sunnyvale, CA, United States (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.smartrecruiters.com/Intuitive/744000126304439-senior-embedded-software-engineer-advanced-energy
- Excerpt: Senior Embedded Software Engineer - Advanced Energy Sunnyvale, CA, United States Company Description: It started with a simple idea: what if surgery could be less invasive and recovery less painful? Nearly 30 years later, that question still fuels everything we do at Intuitive . As a global leader in robotic-assisted surgery and minimally invasive care , our technologies-like the da Vinci surgical system and Ion -have transformed how care is delivered for millions of patients worldwide. We're a team of engineers, clinicians, and innovators united by one purpose: to make surgery smarter, safer, and more human. Every day, our work helps care teams perform with greater precision and patients recover faster, improving outcomes around the world. The problems we solve demand creativity, rigor, and collaboration. The work is challenging, but deeply meaningful-because every improvement we make has the potential to change a life. If you're ready to contribute to something bigger than yourself and help transform the future of healthcare , you'll find your purpose here. Job Description: Primary Function of Position The Senior Embedded Software Engineer brings a key contribution to a team responsible for the architectural design and implementation of software to support novel electrosurgical systems for surgery being developed by the Sunnyvale Engineering group. Roles and Responsibilities Develop software applications for electrosurgical and robotic products for minimally invasive surgery. Develop software and firmware in object-oriented C++, C, Verilog and Python for embedded systems. Develop software to acquire, process, store, and analyze energy data in real-time. Develop software

### Staff AI Embedded Software Engineer - Connected Devices - Axon Enterprise
- Location: Seattle, Washington, United States (unspecified)
- Salary: $169K-$270K
- Posted: 2026-01-27
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://job-boards.greenhouse.io/axon/jobs/7605877003
- Excerpt: Staff AI Embedded Software Engineer - Connected Devices Seattle, Washington, United States Join Axon and be a Force for Good. At Axon, we're on a mission to Protect Life. We're explorers, pursuing society's most critical safety and justice issues with our ecosystem of devices and cloud software. Like our products, we work better together. We connect with candor and care, seeking out diverse perspectives from our customers, communities and each other. Life at Axon is fast-paced, challenging and meaningful. Here, you'll take ownership and drive real change. Constantly grow as you work hard for a mission that matters at a company where you matter. Your Impact As a Staff Embedded Software Engineer, you will lead critical software engineering initiatives and set the strategic technical direction across multiple embedded product lines, including body-worn cameras, in-car cameras, stationary cameras, drones, and emerging connected device solutions. Your role involves defining and significantly advancing embedded software architectures and ensuring system-wide excellence in stability, scalability, security, and performance. You will proactively identify technical opportunities and risks, guiding architectural decisions to future-proof our products against complex operational environments. Your strategic oversight will involve collaboration with executives, directors, managers and cross-functional teams, deeply influencing Axon's broader software engineering organization. Your mentorship will uplift engineers across multiple teams, driving Axon's mission-critical standards and technical excellence. In this role, you will also shape Axon's approach to applied artificial intelligence on connected devices, influencing how AI models are trained, deployed, evaluated, and deployed across the device and cloud ecosystem. You

### Senior FPGA Engineer - GE Vernova
- Location: Stafford (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-01
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Stafford/Senior-FPGA-Engineer_R5036639-2
- Excerpt: Senior FPGA Engineer Stafford posted: Posted 11 Days Ago

### Applied Scientist, Edge AI and Science - Amazon
- Location: Cambridge, England, GBR (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-08
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10442934/applied-scientist-edge-ai-and-science
- Excerpt: Applied Scientist, Edge AI and Science Cambridge, England, GBR Amazon Devices is an inventive research and development company that designs and engineers high-profile devices like the Kindle family of products, Fire Tablets, Fire TV, Health & Wellness, Amazon Echo, and Astro products. This is an exciting opportunity to bring generative AI to Amazon's consumer products, both on-device at the edge and in the cloud. Our compression platform delivers 20x to 100x neural network compression, but using it well still takes weeks of hands-on learning and expert intuition. The Edge AI Model Studio team exists to change that. We become the expert users so partner teams don't have to: we turn compression science into reliable, production workflows, and we package the results into a library of compression-ready student architectures that partners can run on their own. Our north star is simple. Training-to-deployment should feel like pushing a button, not a month-long science project. We are looking for an Applied Scientist to join Model Studio and help compress the next generation of models for edge and cloud deployment across modalities, including large language models, vision-language models, speech and audio models, and omni models that reason jointly over text, audio, and video. You will apply and extend state-of-the-art compression recipes to real models, define the benchmarks and evaluation methodology that make trade-offs explicit, and build the reference implementations that let other teams deploy compressed models without our help. You will work backwards from deployment constraints such as memory, latency, throughput, power, and cost,

### Systems Design/Architecture Engineering - Analog Devices
- Location: US, MA, Wilmington (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/US-MA-Wilmington/Systems-Design-Architecture-Engineering_R262324
- Excerpt: Systems Design/Architecture Engineering US, MA, Wilmington posted: Posted Today

### Senior Applied Scientist (Computer Vision), Camera and Sensors - Amazon
- Location: Cambridge, England, GBR (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-26
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10429601/senior-applied-scientist-computer-vision-camera-and-sensors
- Excerpt: Senior Applied Scientist (Computer Vision), Camera and Sensors Cambridge, England, GBR The Camera and Sensors team is looking for a passionate, talented, and inventive Applied Scientist with a strong deep learning background, to help build industry-leading technology with computer vision and multimodal perception models for various Amazon devices. Key job responsibilities As an Applied Scientist with the Camera and Sensors team, you will work with talented peers to develop novel algorithms and modeling techniques to advance the state of the art with multimodal models with an emphasis on computer vision. Your work will directly impact our customers in the form of products and services that make use of Computer Vision technology. You will leverage Amazon's heterogeneous data sources and large-scale computing resources to accelerate advances for Amazon devices. A day in the life An Applied Scientist with the Camera and Sensors team you will support the science solution design, run experiments, research new algorithms, and find new ways of optimizing the customer experience; while setting examples for the team on good science practice and standards. Besides theoretical analysis and innovation, an Applied Scientist will also work closely with talented engineers and scientists to put algorithms and models into practice. About the team You will work with a team of applied scientists and software engineers locally in Cambridge, along with a broader team of principle scientists, applied scientists and software engineers across multiple global teams in the devices group. Basic Qualifications: - Experience with neural deep learning methods and machine learning

### 2026 Principal Research Scientist – Novel Materials & Devices - Manhattan Beach CA - Northrop Grumman
- Location: United States-California-Manhattan Beach (unspecified)
- Salary: $114K-$171K
- Posted: 2026-06-05
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Relocation assistance: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-California-Manhattan-Beach/XMLNAME-2026-Principal-Research-Scientist---Novel-Materials---Devices---Manhattan-Beach-CA_R10221668
- Excerpt: 2026 Principal Research Scientist – Novel Materials & Devices - Manhattan Beach CA United States-California-Manhattan Beach RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Space Systems (NGSP) is seeking a Principal Research Scientist - Novel Materials & Devices , reporting to the Research Laboratories department within Engineering West. This position will be in Manhattan Beach, CA. Research scientists' responsibilities include the planning, prioritization, and execution of foundational research to advance the frontier of discovery in aerospace science and technology. Science staff are called upon to act as research principal investigators, as well as to support their peers through mutual collaboration on multidisciplinary projects

### Senior Firmware Engineer - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Senior-Firmware-Engineer_R262139
- Excerpt: Senior Firmware Engineer Ireland, Limerick posted: Posted 30+ Days Ago

### Supplier Quality Engineer III - Boston Scientific
- Location: Arden Hills, MN (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://jobs.bostonscientific.com/job/Arden-Hills-Supplier-Quality-Engineer-III-MN-55112/1387343800/
- Excerpt: Supplier Quality Engineer III Arden Hills, MN Diversity - Innovation - Caring - Global Collaboration - Winning Spirit - High Performance At Boston Scientific, we'll give you the opportunity to harness all that's within you by working in teams of diverse and high-performing employees, tackling some of the most important health industry challenges. With access to the latest tools, information and training, we'll help you in advancing your skills and career. Here, you'll be supported in progressing - whatever your ambitions. SUPPLIER QUALITY ENGINEER III - Electrophysiology External Operations The External Operations organization focuses on Sourced Finished Medical Device (SFMD) at Boston Scientific and is a global, passionate team that oversees a diverse network of suppliers which manufacture finished devices for BSC distribution. The Supplier Quality Engineer III will demonstrate a primary commitment to patient safety and compliance through collaboration with cross-functional internal/external resources to continually improve our supplier's manufacturing processes to ensure finished device quality. In this role, you will support SFMD products within the Electrophysiology division with a primary focus on Single-Use Devices and Capital Equipment. Additionally, the Supplier Quality Engineer will support global sourcing, supplier manufacturing operations, and global quality systems by participating in global communities of practice and value improvement projects. Work model, sponsorship, relocation: At Boston Scientific, we v

### Embedded Systems Engineer - Analog Devices
- Location: Ireland, Limerick (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Ireland-Limerick/Embedded-Systems-Engineer_R254526
- Excerpt: Embedded Systems Engineer Ireland, Limerick posted: Posted 30+ Days Ago

### ML Kernel Performance Engineer, Edge AI and Science - Amazon
- Location: Vancouver, British Columbia, CAN (unspecified)
- Salary: CAD 115K-192K
- Posted: 2026-06-02
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10437525/ml-kernel-performance-engineer-edge-ai-and-science
- Excerpt: ML Kernel Performance Engineer, Edge AI and Science Vancouver, British Columbia, CAN Amazon Devices is an inventive research and development company that designs and engineers high-profile consumer products like the Kindle family, Fire Tablets, Fire TV, Health & Wellness devices, Amazon Echo, and Astro. We are building the next generation of edge AI capabilities through our advanced compression platform and custom neural accelerator silicon. Within Edge AI & Science, the AI Platform team builds a compression platform-the first of its kind-enabling 20-100x neural network compression for edge and cloud deployment. As model sizes grow from billions to hundreds of billions of parameters, compute efficiency becomes the single largest return on engineering investment during training. The gap between eager-mode Python and optimized GPU execution is where months of training time are won or lost. We are looking for an ML Kernel Performance Engineer to work at the hardware-software boundary of this platform, crafting high-performance CUDA and Triton kernels that make our compression algorithms run at peak efficiency during training, fine-tuning, and inference. You will build the tooling and kernel libraries that democratize GPU performance optimization across the team, enabling scientists and engineers to profile, diagnose, and fix kernel bottlenecks without needing to be CUDA experts themselves. Working alongside compression scientists and platform engineers, you will ensure that novel quantization schemes (ternary, nonary, mixed-precision) and sparse computation patterns translate into real throughput gains on GPU hardware. Your work will directly accelerate every training run in the organization and unlock deployment of compressed

### Site Technical Manager Intern, Global Manufacturing & Operations - Amazon
- Location: Shanghai, CHN (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-05
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10440537/site-technical-manager-intern-global-manufacturing-operations
- Excerpt: Site Technical Manager Intern, Global Manufacturing & Operations Shanghai, CHN 请注意，申请此实习岗位需要满足如下条件： • 毕业时间：26年底至27年9月之间毕业 • 入职日期：26年7月-8月 • 实习时间：一周实习3-5天，至少持续5个月 • 工作地点：深圳市福田区，深圳国际创新中心B座 • 简历要求：请提供中英双语简历（放在一个文件中） 投递须知： 1 填写简历申请时，请把必填和非必填项都填写完整。提交简历之后就无法修改了哦！ 2 学校的英文全称请准确填写。 3 校招信息请参考校园招聘申请手册 https://amazonexteu.qualtrics.com/CP/File.php?F=F_55YI0e7rNdeoB6e Hi, young talent! Do you know Amazon is not only an online store, a cloud computing giant, but also a leading company of consumer electronic devices? Started with Kindle e-reader, Amazon now have various product families of devices including Kindle, Echo, Fire tablets, Fire TV and lots more groundbreaking products. Have you ever been curious about how these devices are produced in the 21st century factories? Did you hear about the terms like “Industry 4.0 (工业4.0)” and “Global Lighthouse Network (灯塔工厂)” and interested in them? Do you think manufacturing industry will continue to be the most important pillar of China's economy in next 2 and more decades, and willing to devote your talent in this field? If your answers are “yes”, come join us to boost your career start and shape the future of manufacturing together. We, the Global Manufacturing Operations team in Amazon Devices and Services division, are responsible to manage our Contract Manufacturers (CM) factories to produce our device products that meet Amazon's high standards of demand, schedule, quality and cost. We strive for higher efficiency, better quality and lower cost in manufacturing and we use the most advanced technologies in this industry to achieve them. Job Descriptions: Site Technical Manager Intern as the freshman to join South Ops team to work on daily management of factory operations, shadowed

### Software Development Engineer, Global Edge Compute (Amazon Robotics) - Amazon
- Location: North Reading, Massachusetts, USA (unspecified)
- Salary: $144K-$194K
- Posted: 2026-05-15
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10421417/software-development-engineer-global-edge-compute-amazon-robotics
- Excerpt: Software Development Engineer, Global Edge Compute (Amazon Robotics) North Reading, Massachusetts, USA Amazon is looking for Software Development Engineers who are passionate, innovative and have a strong drive to automate and simplify. This position will report to the Software Manager for Device Management - Cloud Services within the Global Edge Compute Team and have responsibility for software engineering across numerous cloud-based services designed to manage edge devices at scale. The Global Edge Compute team is responsible for services that manage Amazon's edge compute fleet - 1,000,000+ devices across 3000+ locations worldwide. Our systems manage everything from advanced robotics systems in Austin, to delivery stations in Cairo. We deliver innovative technical solutions to facilitate the massive growth in Amazon compute capabilities around the globe. Our team's mandate is to design, develop, and operate the next generation of device automation systems that allow for the provisioning and management of edge devices at Amazon scale. We're looking for entrepreneurial and innovative individuals who thrive on solving complex problems. Everyone on the team needs to be entrepreneurial, wear many hats and work in a highly partnership focused environment. As an Amazon Software Development Engineer, you will help tackle a diverse landscape of technical challenges. We are a greenfield initiative, and you will play an active role in translating business requirements into concrete systems and prototyping concepts in partnership with technology leaders within the team and across the business. You will design, develop and deploy reliable distributed solutions that operate at Amazon scale. You will

### Senior Digital Hardware Engineer - Raytheon Technologies
- Location: US-AL-HUNTSVILLE-315 ~ 315 Bob Heath Dr ~ BOB HEATH (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-AL-HUNTSVILLE-315--315-Bob-Heath-Dr--BOB-HEATH/Senior-Digital-Hardware-Engineer_01842004
- Excerpt: Senior Digital Hardware Engineer US-AL-HUNTSVILLE-315 ~ 315 Bob Heath Dr ~ BOB HEATH posted: Posted 30+ Days Ago

### ASIC/FPGA Design Verification Engineer (Teradyne, N. Reading, MA) - Teradyne
- Location: North Reading Asicfpga Design Verification Engineer Teradyne N Reading, MA (unspecified)
- Salary: $123K-$197K
- Posted: 2026-06-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://jobs.teradyne.com/Teradyne/job/North-Reading-ASICFPGA-Design-Verification-Engineer-%28Teradyne%2C-N_-Reading%2C-MA%29-MA/1378786900/
- Excerpt: ASIC/FPGA Design Verification Engineer (Teradyne, N. Reading, MA) North Reading Asicfpga Design Verification Engineer Teradyne N Reading, MA We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive. Our Purpose TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation, and delivers better business results. Opportunity Overview Our Logic Design Engineering (LDE) team is seeking a Digital Logic Verification Engineer, preferably with additional experience in FPGA design. The primary focus of this role is FPGA verification, working closely

### Senior ASIC Design Engineer, Hardware Compute Group - Amazon
- Location: Sunnyvale, California, USA (unspecified)
- Salary: $183K-$248K
- Posted: 2025-12-11
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/3140974/senior-asic-design-engineer-hardware-compute-group
- Excerpt: Senior ASIC Design Engineer, Hardware Compute Group Sunnyvale, California, USA Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced numerous devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior ASIC Design Engineer, you will be part of an advanced design and architecture team that is creating the semiconductor designs which will power millions of new Amazon devices. You will work closely with multi-disciplinary groups including System Architecture, Architecture, and Software teams, to architect and implement the advanced imaging pipelines that will enable our products to capture the world with stunning clarity. Key job responsibilities In this role, you will: * Architect and Design world class imaging hardware * Communicate and work with team members across multiple disciplines * Develop detailed design specifications and documentation * Perform RTL coding and synthesis * Work with Partners/Suppliers to optimize and customize their products * Run industry standard code quality tools and fix issues found by them * Participate in test plan and coverage reviews The ideal candidate should have experience with RTL development environments and fluency in modern hardware description languages. They should have developed complex IP blocks from scratch that have successfully been integrated in SOCs or other such silicon that have been productized in consumer devices. They should have experience

### Senior CMOS Test and Validation Lead, Analog Mixed-Signal, Raxium - Google
- Location: Fremont, CA, USA (unspecified)
- Salary: $240K-$334K
- Posted: 2026-06-10
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckTO68KqATPWDWgbfdWSF49r4M1vxQssjRvZnxJo9YTWZEjsACxwdTOW3paG-uR_2amQVoJ5M4S4urQI_FWj4tCKcDAB8GRXvk9_XzhqhbBqGiq3IvTr1puPwkYGBow%3D%3D_V2&loc=US&title=Senior+CMOS+Test+and+Validation+Lead
- Excerpt: Senior CMOS Test and Validation Lead, Analog Mixed-Signal, Raxium Fremont, CA, USA As a Senior Test and Post-Silicon Validation Lead, you will drive the bring-up, characterization, and high-volume manufacturing (HVM) release of our next-generation Analog Mixed-Signal (AMS) ASICs. In this critical leadership role, you will bridge the gap between design, DFT, and product engineering, ensuring zero-defect quality and optimized cost-of-test for our upcoming product lines. You will architect ATE test strategies and guide a small team of engineers through complex yield and performance bottlenecks. Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $240000 - $334000 (USD) + 25% bonus target + bonus + equity + benefits Learn more about benefits at Google . Lead and mentor a team of test and validation engineers through the entire post-silicon lifecycle, from first-silicon bench bring-up to ATE production release. Partner with IC Design and DFT teams during the pre-tapeout phase to define Post SIlicon Test Process and Design requirements. Design, develop, and debug multi-site ATE test programs (Advantest V93000 or Teradyne UltraFLEX)

### Pixel Watch Industrial Designer, Devices and Services - Google
- Location: Mountain View, CA, USA (unspecified)
- Salary: $109K-$156K
- Posted: 2026-06-04
- Parental leave: 18 weeks (not source-backed)
- Non-birth-parent leave: 18 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckQZgCEeFAxDKvXpr7XV0eDW2G4F89YYx8-eZEKnNN0QxEjsACxwdTJ7oAoqHVsZo_M-wLGha-QgQfxPgjwAVEMSH3cL2l7oOgYT5GKCcMiLo8lpEQmVuHHxzPg6bIw%3D%3D_V2&loc=US&title=Pixel+Watch+Industrial+Designer
- Excerpt: Pixel Watch Industrial Designer, Devices and Services Mountain View, CA, USA Google User Experience (UX) is made up of multi-disciplinary teams of UX Designers, Researchers, Writers, Content Strategists, Program Managers, and Engineers: we care deeply about the people who use our products. The UX team plays an integral part in gathering insights about the attitudes, emotions, and behaviors of people who use our products to inspire and inform design. We collaborate closely with each other and with engineering and product management to create industry-leading products that deliver value for the people who use them, and for Google's businesses. In this role, you will shape the future by designing products that harness the power of Google to delight and inspire millions of people worldwide. You are a design leader who is passionate about improving people's lives through design and technology. You are proactive, creative, engaged, optimistic, progressive, open-minded and resourceful and you seek inspiration, empowerment, and challenge. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Individual pay is determined by factors

### Senior Analog Design Engineer - MCU - NXP Semiconductors
- Location: Yokneam Ilit (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-13
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Yokneam-Ilit/Senior-Analog-Design-Engineer---MCU_R-10062774
- Excerpt: Senior Analog Design Engineer - MCU Yokneam Ilit posted: Posted 30 Days Ago

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Source-backed benefit claims include source links; other benefit values are labeled separately.