# FewerJobs export - 100 curated jobs Generated: 2026-08-13T21:18:27.355Z Source: https://fewerjobs.com ## Filters applied - **q**: Cadence Design Systems, Inc. - **quality_floor**: default - **match_401k_strict**: true - **parental_strict**: true - **non_birth_strict**: true - **pto_strict**: true - **include_older**: false - **apply_url_verified**: false - **page**: 7 - **per_page**: 100 - **sort**: relevance ## Jobs ### SoC Performance Analysis Engineer - Apple - Location: Austin, United States of America (unspecified) - Salary: $127K-$191K - Posted: 2026-05-22 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200664332/soc-performance-analysis-engineer?team=HRDWR - Excerpt: SoC Performance Analysis Engineer Austin, United States of America Does making the next extraordinary technology product excite you? Imagine what you could do here! At Apple, our new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of our team thereʼs no telling what you could accomplish. The SoC Performance Verification is a critical job within Appleʼs Hardware Technology. Joining this group means you will be responsible for crafting and building the technology that fuels Appleʼs devices. Together, you and your team will enable our customers to do all the things they love with their devices. Work closely with Architecture to understand performance goals of the design. Correlate RTL performance against model performance. Perform deep performance analysis in the design and report findings. Identify performance bottlenecks and coordinate with Design and Architecture teams to improve performance. Define performance statistics to help performance debug and standard methodologies to improve performance correlation effort. Have strong interpersonal skills, work independently & lead work you're doing to align with the project goals plus support multi-functional engineering efforts. Minimum Qualifications: Bachelors degree + 0 years of industry experience Preferred Qualifications: You are well-rounded in performance correlation and analysis and are an extraordinary teammate with excellent social skills. You have the desire to solve diverse challenges. Sophisticated knowledge of CPU & SOC architecture/design Familiarity with verification environments and Verilog, C/C++. Experience with SystemVerilog, Verilog and scripting in ### Product Engineer - Swerve - Location: Sapien HQ — NYC, New York, United States (unspecified) - Salary: Not disclosed - Posted: 2026-02-04 - Apply: https://jobs.ashbyhq.com/sapien/e1a51be9-6d18-468f-9aed-6d58a6481007 - Excerpt: Product Engineer Sapien HQ — NYC, New York, United States Who we are Sapien is rethinking how finance teams operate in the age of AI. We're building toward an autonomous CFO -systems that run company financials end-to-end. Our platform analyzes complex financial data in real time to increase decision cadence, prevent costly mistakes, and surface value. Sapien has caught multi-million-dollar errors, saved thousands of jobs, and returned significant dollars to customers' bottom lines. We partner with traditional businesses-manufacturing, healthcare, restaurants, and large enterprises-to deeply understand and automate their financial workflows. We're HQ'd by Madison Square Park in NYC and backed by General Catalyst, Neo , and top operators from Google, OpenAI, Microsoft, Ramp, and Stripe (over $9M raised). The role You'll design and build the interfaces that make AI agents usable for finance teams. This means creating new interaction patterns for how humans work with autonomous systems, building the design systems that scale across our platform, and obsessing over the details that make complex workflows feel simple. This is a design-focused frontend role where craft and user experience matter deeply. You'll own the visual and interaction design of features while implementing them in production. What you'll do - Design and build interfaces that make agent operations transparent and controllable. Create new interaction patterns for real-time AI workflows, verification systems, and human-in-the-loop feedback that don't exist yet. - Prototype and iterate rapidly on new interface concepts. Work directly with customers to test designs, watch how they interact with features, and refine ### Mechanical Engineer, Cooling System Design and Analysis - Google - Location: Sunnyvale, CA, USA; +7 more (unspecified) - Salary: $171K-$248K - Posted: 2026-06-12 - Parental leave: 18 weeks (not source-backed) - Non-birth-parent leave: 18 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckYt5l1ySX9ErV74AommxtN_uWvQkjKKlPGITj0tlsa6lEjsACxwdTCno-1IcyeW5uRxaqpTUWjv_06RQHpW50EaKM-s-6ComaTbN25WU2tPjIf-cVx0jRrXTHdDHdQ%3D%3D_V2&loc=US&title=Mechanical+Engineer - Excerpt: Mechanical Engineer, Cooling System Design and Analysis Sunnyvale, CA, USA; +7 more Our thirst for technology is a part of everything we do. The Data Center Engineering team takes the physical design of our data centers into the future. Our lab mirrors a research and development department -- cutting-edge strategies are born, tested and tested again. Along with a team of great minds, you take on complex topics like how we use power or how to run state-of-the-art, environmentally-friendly facilities. You're a visionary who optimizes for efficiencies and never stops seeking improvements -- even small changes that can make a huge impact. You generate ideas, communicate recommendations to senior-level executives and drive implementation alongside facilities technicians. With your technical expertise, you ensure compliance with codes and standards, develop infrastructure improvements and serve as an expert in your specialty (e.g., cooling, electrical). The Thermal Systems Engineering team stands at the forefront of accelerating innovation that powers Google's global infrastructure. As a Mechanical Engineer within the Data Center Technology Systems-a multidisciplinary consortium of engineers and architects dedicated to pioneering next-generation data centers-you will assume a pivotal role in the development, analysis, and optimization of the mechanical cooling infrastructure. You will be a technical leader in this space, influencing design standards and equipment selections across our fleet. In this role, you will be tasked with the design of custom data center cooling equipment and the creation of innovative thermal solutions engineered to meet the demands of an ever-evolving market. You will leverage an ### SoC Clocks Design Automation Engineer - NVIDIA Corporation - Location: 3 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Tel-Aviv/SoC-Clocks-Design-Automation-Engineer_JR2009388 - Excerpt: SoC Clocks Design Automation Engineer 3 Locations posted: Posted 30+ Days Ago ### HW Dev Engineer - Payload, Hardware Development, Amazon LEO - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $97K-$160K - Posted: 2026-05-19 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10424428/hw-dev-engineer-payload-hardware-development-amazon-leo - Excerpt: HW Dev Engineer - Payload, Hardware Development, Amazon LEO Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. As a Hardware Engineer, you will be a part of the team of experts working on the development of advanced satellite systems. You will own or contribute to the following: · Design and optimization of different circuitry for satellite systems · Design the proof of concept prototypes for the next generation of satellite hardware · Closely collaborate with radiation, power, mechanical, thermal, RF, software teams · Design of automated test systems, test fixtures, and factory test · Bring-up and qualification test campaigns of satellite hardware · Lead and review PCB layout At Amazon, we hire the best minds in technology to innovate and build on behalf of our customers. As a hardware engineer, you will work alongside Senior Electrical Engineers supporting the design, debug, validation and optimization of the products. You will be involved in projects from concept through production, gaining exposure to the complete design lifecycle. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Basic Qualifications: - 2+ years of hardware design and validation of components, subsystems and systems experience - Bachelor's degree in mechanical engineering, electrical ### Staff Engineer, ASIC Development Engineering (SOC Design) - SanDisk - Location: Bengaluru, KA, India (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://jobs.smartrecruiters.com/Sandisk/744000118832727-staff-engineer-asic-development-engineering-soc-design- - Excerpt: Staff Engineer, ASIC Development Engineering (SOC Design) Bengaluru, KA, India Company Description: Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description: About the Role: We are seeking a highly experienced and motivated Principal Engineer specialising in SoC RTL Design for System-on-Chip (SoC) solutions. As a key technical skill, you will drive the SoC Architecture, Design, and integration of complex digital systems , collaborating with cross-functional teams to deliver next-generation semiconductor products. Key Responsibilities: Define and review SoC architecture and design specifications . Develop high-quality RTL which is synthesizable using Verilog/SystemVerilog. Ensure ### Power Systems Design Engineer - Etched - Location: San Jose, CA, United States (unspecified) - Salary: Not disclosed - Posted: 2026-04-27 - Mental health support: yes (not source-backed) - Apply: https://jobs.ashbyhq.com/etched/901d78ff-b9aa-4fc7-baea-604e5d9638d3 - Excerpt: Power Systems Design Engineer San Jose, CA, United States About Etched Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning. Power Supply Integration Engineer We are seeking a Power Systems Design Engineer to join our team and contribute to the development of advanced power solutions for high-power processors. As a Power Systems Design Engineer at Etched, you will be pivotal in designing, selecting, and qualifying power supply solutions to meet extremely high power demands for processors. You will work closely with power supply vendors and leverage your expertise in multi-phase power solutions, 48V input conversion, and power loss analysis to ensure optimal performance and reliability. Your role will also involve helping with large BGA (Ball Grid Array) power development and conducting thorough PCB IR drop and power loss simulations. Key Responsibilities - Design and develop advanced power supply solutions to support extremely high power demands for processor applications. Ensure these solutions meet stringent performance, efficiency, and reliability requirements - Work closely with power supply vendors to select, design, and qualify components and solutions. Establish and maintain effective relationships to ensure alignment with design specifications and project goals - Demonstrate expertise in designing and implementing multi-phase power solutions for low-voltage processors, ensuring stable and ### Electrical Engineer, Intelligence Systems - Anduril - Location: Reston, Virginia, United States (unspecified) - Salary: $129K-$171K - Posted: 2026-04-21 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/5115117007?gh_jid=5115117007 - Excerpt: Electrical Engineer, Intelligence Systems Reston, Virginia, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE TEAM Anduril Intelligence Systems (AIS) is focused on positioning Anduril as a lead provider of specialized engineering and products for Intelligence Community (IC) customers. We work within the IC to understand their requirements, shape their concepts of operation, and deliver exquisite capability across their problem set. We aim to develop and deploy critically needed capabilities that address our customers' most pressing national security requirements. ABOUT THE JOB We are looking for an Electrical Engineer to join our rapidly growing team in Reston, Virginia. In this role you will be responsible for designing, developing, augmenting, adapting, troubleshooting, and managing fabrication of printed circuit boards (PCB) through to working electronic devices. The PCB designs you support will be complex, multilayer printed circuit boards that meet rigorous performance and reliability standards. You will collaborate closely ### Software Engineer, System-on-Chip (SoC) Simulation - Waymo - Location: Taipei, Taiwan; Hsinchu, Taiwan (unspecified) - Salary: TWD 2600K-3150K - Posted: 2026-03-16 - Apply: https://careers.withwaymo.com/jobs?gh_jid=7708010 - Excerpt: Software Engineer, System-on-Chip (SoC) Simulation Taipei, Taiwan; Hsinchu, Taiwan Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The World's Most Experienced Driver™-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo's fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms. This role follows a hybrid work schedule, and you will report to the Tech Lead Manager of the Compute team. You will: - Develop the simulation solutions to support early software development and architecture exploration for next-generation SoC ### Hardware System Integration Electrical Engineer - Mac - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $127K-$221K - Posted: 2026-04-07 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200655228/hardware-system-integration-electrical-engineer-mac?team=HRDWR - Excerpt: Hardware System Integration Electrical Engineer - Mac Cupertino, United States of America Apple is seeking a System EE for MacBook Pro electrical & system design integration. The candidate will design, implement, test, and debug the electrical subsystem of the world's best all-in-one computers within a collaborative cross-functional team, working with mechanical engineering, software, silicon engineering, and other module teams such as wireless, camera, sensing, and display. Our engineers rely on skills in computer system architecture, schematic design, digital and analog circuits, power and voltage regulator integration, high speed signal integrity concepts, PCB design, bring up and system level troubleshooting to surprise and delight millions of customers! Day to day tasks involve electrical design (both schematic capture and PCB layout), simulation, bringup, debug, and validation for Macs. EE's are responsible for both schematic capture and coordinating layout of highly constrained multilayer PCBs including HDI and fine pitch BGAs. Routine responsibilities also include bring-up, validation, factory build support, and multi-disciplinary cross-functional collaboration and negotiation. We are looking for well-rounded candidates with a broad set of skill and interests, and the curiosity to dig deep wherever necessary to solve challenging problems. Opportunities exist to sample a variety of technology areas, and to remain general or specialize over time, developing domain expertise. Minimum Qualifications: Bachelors in Electrical Engineering, Computer Engineering, or related field of study with industry level practical work experience. Strong EE fundamentals, grounded in a solid understanding of E&M physics and first principles with an understanding of computer / system architecture and ### Staff Engineer - Embedded Graphics Software - Ambiq Micro INC - Location: Austin, Texas, United States (unspecified) - Salary: Not disclosed - Posted: 2025-10-17 - 401(k) match: listed (not source-backed) - Apply: https://job-boards.greenhouse.io/ambiqmicroinc/jobs/4030794009 - Excerpt: Staff Engineer - Embedded Graphics Software Austin, Texas, United States Company Overview Ambiq is on a mission to enable intelligence everywhere - powering the AI edge revolution with the world's lowest-power semiconductor solutions. Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 290 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications. Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology. We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency. At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve. If that's you, join us - the intelligence everywhere revolution starts here. Scope As the Staff Embedded Graphics Software Engineer at Ambiq, you will drive the development and testing of AmbiqSuite SDK on Ambiq SoC devices and emulation platforms, focusing on the graphics processing unit (GPU) HAL and the graphics stack for Ambiq's mainstream and next-generation MCU. This role works within our global MCU software development team and will work closely with the architecture team and the local MCU SoC design team, focusing on MCU graphics software development and test activities. The successful candidate should be a fast-learning, result-driven, and self-motivated ### HW Dev Engineer-Payload, LEO - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $117K-$160K - Posted: 2026-04-28 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10406208/hw-dev-engineer-payload-leo - Excerpt: HW Dev Engineer-Payload, LEO Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. A day in the life: As an Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting phased array antenna systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon LEO's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, and test. The Hardware Engineer will have a complete understanding of how their design changes impact downstream partners such as operations, supply chain, product management, and reliability. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: - Own PCBA development from concept through production - Design and optimize different blocks of electronics sub-systems - Design high-speed digital circuitry in collaboration with various teams - Lead and review schematic capture and PCB layout - Lead PCB vendor engagement for DFM review - Optimize PCB stack-up for performance and cost - Generate test plans/procedures based off high level requirement definition - Complete board bring-up and perform test campaigns for different modules and subsystems - Design of automated test systems, test fixtures, ### MTS - Firmware - Etched - Location: Austin (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Mental health support: yes (not source-backed) - Apply: https://jobs.ashbyhq.com/etched/a735c757-7d39-47de-9329-77d6362b5547 - Excerpt: MTS - Firmware Austin About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary - Co-Develop cutting-edge software optimized across hardware and software driving the full potential of very large transformer models. - Solve challenging problems across the full stack, from low-level drivers and APIs to high-level applications and frameworks. - Contribute to the development of AI solutions that will revolutionize industries like natural language processing, chain of reasoning automation, generative media. You may be a good fit if you have - Bachelor's degree or equivalent practical experience. - Experience in software development, and with data structures/algorithms. - Experience developing and testing software on launching products. - Experience with firmware design, implementation, and troubleshooting. - Experience with embedded architectures, IO technologies (I2C, SPI, PCIe, DRAM etc.), as well as concepts like scalability, fault tolerance, and consistency. Strong candidates may also have experience with (Nice-to-have qualifications) - Master's degree Computer Science, or a related technical field. - Experience resolving customer-related issues. - Experience solving ambiguous problems. - Excellent verbal and written communication skills. Benefits - Medical, dental, and ### HW Dev Engineer-Payload, Hardware Development - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $117K-$160K - Posted: 2025-10-22 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/3113983/hw-dev-engineer-payload-hardware-development - Excerpt: HW Dev Engineer-Payload, Hardware Development Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. A day in the life: As an Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting phased array antenna systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon LEO's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, and test. The Hardware Engineer will have a complete understanding of how their design changes impact downstream partners such as operations, supply chain, product management, and reliability. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: - Own PCBA development from concept through production - Design and optimize different blocks of electronics sub-systems - Design high-speed digital circuitry in collaboration with various teams - Lead and review schematic capture and PCB layout - Lead PCB vendor engagement for DFM review - Optimize PCB stack-up for performance and cost - Generate test plans/procedures based off high level requirement definition - Complete board bring-up and perform test campaigns for different modules and subsystems - Design of automated test systems, test ### Solution Architect - Customer Success - Apple - Location: Austin, United States of America (unspecified) - Salary: Not disclosed - Posted: 2026-03-12 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200638312/solution-architect-customer-success?team=HRDWR - Excerpt: Solution Architect - Customer Success Austin, United States of America Does shaping the future of Apple products and influencing how millions of customers experience innovation every day sound exciting? We are the Hardware Engineering Ops ECAD Customer Success Team, and we work hand in hand with Apple's Engineers to help deliver the best products! We are responsible for training, educating and advancing the best CAD design environment for hardware design teams. We are seeking a highly motivated and experienced ECAD Workflow & Solutions Architect to be the strategic partner and technical expert for our hardware design community. This isn't just about support; it's about advancing hardware design at Apple, driving efficiency, innovation, and the seamless adoption of innovative technologies, including Artificial Intelligence and Machine Learning, across our ECAD workflows. Come join our team! This position will focus on architecting, optimizing and advancing workflows for our electrical design teams. We are looking for someone who always strives to learn something new, is a self-starter who can work independently with high levels of success and is excited about solving new challenging problems with innovative solutions. Act as a primary point of contact and trusted advisor for hardware engineers and PCB designers, providing guidance and solving complex workflow and tool-related challenges. Work hand-in-hand with design teams to understand their unique needs, identify problems, and translate them into actionable solutions. Champion standard processes in ECAD design, data management, and collaboration, ensuring consistency and excellence across projects. Collaborate cross-functionally with design teams, IT, and tool ### HW Dev Engineer - Payload, Amazon Leo Hardware Development - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $117K-$160K - Posted: 2026-05-19 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10424422/hw-dev-engineer-payload-amazon-leo-hardware-development - Excerpt: HW Dev Engineer - Payload, Amazon Leo Hardware Development Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. As a Hardware Engineer, you will be a part of the team of experts working on the development of advanced satellite systems. You will own or contribute to the following: · Design and optimization of circuitry for satellite systems · Design the proof of concept prototypes for the next generation of satellite hardware · Closely collaborate with radiation, power, mechanical, thermal, RF, software teams · Design of automated test systems, test fixtures, and factory test · Bring-up and qualification test campaigns of satellite hardware · Lead and review PCB layout At Amazon, we hire the best minds in technology to innovate and build on behalf of our customers. As a hardware engineer, you will work alongside Senior Electrical Engineers supporting the design, debug, validation and optimization of the products. You will be involved in projects from concept through production, gaining exposure to the complete design lifecycle. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Basic Qualifications: - Bachelor's degree or above in electrical engineering, computer engineering, or equivalent - 3+ years of industrial experience especially board level analog/digital ### Hardware Systems Integration Engineer, Apple Watch - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $147K-$272K - Posted: 2026-02-17 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200647213/hardware-systems-integration-engineer-apple-watch?team=HRDWR - Excerpt: Hardware Systems Integration Engineer, Apple Watch Cupertino, United States of America The Apple WATCH hardware engineering team is seeking an experienced electrical engineer to join our team. As Apple integrates more features and technologies into WATCH, we continue to push the boundaries of current technology. Integrating these features and technologies comes with significant system integration and design challenges. In this design engineering position, you will work with a passionate group of hardware engineers, and a range of cross-functional teams to resolve multi-domain challenges - diving deep into the details, and evaluating solutions pragmatically with a system and product level perspective. You will join a team that values curiosity, engineering excellence, data-informed decision making, and creativity. We are looking for a passionate engineer who strives to understand why things work, and use that understanding to deliver high quality technical solutions. In this role you will be designing, prototyping, building, and validating electrical designs throughout our product development cycle, and working with teams across Apple to integrate those designs into WATCH. This includes: - System electrical design, schematic capture and PCB layout design. - Prototype bringup and debugging. - Functional and performance verification of hardware designs using common EE test equipment (including oscilloscopes, DMMs, spectrum analyzers, logic analyzers). - Hands-on debugging and failure analysis of manufacturing, design, and reliability issues. - Factory build support from early NPI through to production. - Reporting on and presenting status of hardware issues to management and cross-functional forums. - International travel to support factory builds as ### Media-IP SoC Performance Architect, Platform Architecture - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $212K-$318K - Posted: 2025-11-13 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200632006/media-ip-soc-performance-architect-platform-architecture?team=HRDWR - Excerpt: Media-IP SoC Performance Architect, Platform Architecture Cupertino, United States of America Do you love crafting elegant solutions to highly complex challenges? Are you a big-picture forward-thinking who understands how each element affects all the others? At Apple, our Architecture group is responsible for connecting our hardware and software into one unified system. Join this team, and you'll collaborate with engineers across Apple to design how all our technologies work in unison! We are looking for a Media-IP SoC Performance Architect to join our small, dynamic team at Apple. We own the performance models of several complex multi-media IPs that power Apple's SoCs-technology that's central to the customer experience across nearly every Apple product, from Apple Watch and iPhone to iPad, Mac, Vision Pro (AR/VR), and next-generation product lines. In this highly visible role, you will collaborate closely with cross-functional teams to help define the architecture of new features and optimize trade-offs between performance, power, and area for these Media-IPs using a variety of sources ranging from performance models to released devices. The end goal is to provide data-driven performance architectural insights that provide the best customer experience. Collaborate with functional architects, design, and software teams to plan, implement, validate, and correlate high-level C++ performance models Develop custom tools and approaches for analyzing and visualizing performance data, applying data science and machine learning techniques to provide architectural insights Present performance study results to cross-functional teams to inform and drive architectural decisions Validate the performance models against the specification and correlating the ### ASIC Engineer - Jane Street Group, LLC - Location: London, England, United Kingdom (unspecified) - Salary: Not disclosed - Posted: 2025-10-29 - 401(k) match: listed (not source-backed) - Apply: https://job-boards.greenhouse.io/janestreet/jobs/8233259002 - Excerpt: ASIC Engineer London, England, United Kingdom About the Position We are looking to hire an experienced ASIC Engineer to help us design, test and deploy advanced hardware designs. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking and research infrastructure. We are looking for someone who can contribute to all of our projects and be happy to work on both FPGA-based and ASIC-based technologies. We're big believers in the ability of tools to improve the productivity, reliability and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result. About You - Have 4+ years practical experience in RTL design and verification - Experienced in ASIC design using either Synopsys or Cadence flows, including at least one of the following: - Front-end RTL design and synthesis - Back-end physical design - Verification (including formal) - Interested in using software engineering techniques to improve the hardware design process, and experience programming in some high-level languages (Python, C++, Java, Haskell, etc.) - Fluent in English If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com. ### Solutions Architect - Ametek - Location: Work Location (Country) Canada | Remote/Onsite Onsite (remote) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://jobs.ametek.com/job/Ottawa-Solutions-Architect-ON-K2K-3E7/1370056700/ - Excerpt: Solutions Architect Work Location (Country) Canada | Remote/Onsite Onsite Do you love diving into complex technical challenges, understanding customer needs before anyone else, and shaping smart, elegant embedded software solutions? As a Solutions Architect - Pre‑Sales within CRANK Software, you'll be the technical heartbeat of early customer engagements. You'll guide clients from their first idea to a clear and feasible solution architecture while influencing strategic decisions that shape entire projects. If you thrive in customer‑facing environments, love telling the technical story behind a solution, and enjoy working at the intersection of innovation, strategy, and engineering, you'll feel right at home here. Mark Rigley, your future manager, is known for his software skills, his motivation, and his contagious good mood! What we offer: Opportunities to grow your expertise and influence technical decisions A creative and collaborative environment with significant autonomy Continuous learning and development A passionate team of embedded and UI experts Flexible working hours and new offices surrounded by nature A human, dynamic, and globally connected workplace Plenty of social and team‑building activities Key Responsibilities: Lead customer discovery sessions, technical workshops, and architecture discussions to understand needs and constraints Analyze requirements and translate them into clear solution proposals, architecture outlines, and effort estimates Present technical recommendations, architecture diagrams, and delivery strategies to bot ### Sr. Application Analyst Certified - EPIC Cadence (Hybrid) - Houston Methodist - Location: Corporate - Holly Hall (hybrid) - Salary: Not disclosed - Posted: 2026-05-12 - Apply: https://houstonmethodist.wd12.myworkdayjobs.com/GTI/job/Corporate---Holly-Hall/Sr-Application-Analyst-Certified---EPIC-Cadence--Hybrid-_2025-78145 - Excerpt: Sr. Application Analyst Certified - EPIC Cadence (Hybrid) Corporate - Holly Hall posted: Posted 30+ Days Ago ### Sensor Hardware Engineer - Meta - Location: Sunnyvale, CA (unspecified) - Salary: $173K-$245K - Posted: 2026-06-04 - 401(k) match: listed (not source-backed) - Apply: https://www.metacareers.com/jobs/842857065154845/ - Excerpt: Sensor Hardware Engineer Sunnyvale, CA Meta Reality Labs is building products that make it easier for people to connect with the ones they love most. We are a team of experts developing and shipping products at the intersection of hardware, software, and content. Our team has the responsibility for taking breakthrough concepts and delivering them to market at scale. Meta Wearables team seeks an Engineer with system design skills and consumer electronics experience to develop and integrate solutions in future Meta products. Responsibilities: - Collaborate closely with cross functional teams and external partners to push the boundaries of technologies and deliver best-in-class hardware solutions - Lead efforts to integrate new technologies into high volume consumer products through all stages of product development (from prototyping, design through mass production) - Generate analytical models of subsystems and validate them through design of experiments and lab testing - Perform static, dynamic, structural and thermal-mechanical analyses to guide design optimization before hardware prototyping - Collaborate with vendor resources to leverage their team and maximize the focus of internal resources on adding value to and differentiating our product Minimum qualifications: - BS in Mechanical Engineering, Electrical Engineering, Physics or practical equivalent work experience - 8+ years of relevant industry experience or similar - Expertise in advanced technologies, focused on consumer electronics products - Experience leading technical teams, cross-functional groups and vendors Preferred qualifications: - Demonstrated experience to bring new technologies to product - Demonstrated experience to integrate sensing technologies such as optical sensors, capacitive touch ### Software Engineer, Core Services - OpenAI - Location: San Francisco, California, United States (unspecified) - Salary: Not disclosed - Posted: 2025-07-18 - 401(k) match: listed (not source-backed) - Apply: https://jobs.ashbyhq.com/openai/21bfde35-ffec-42d2-a2c6-8a03dad789d5 - Excerpt: Software Engineer, Core Services San Francisco, California, United States About the Team The Core Services team is responsible for building and managing foundational services. It acts as the bridge between core infrastructure (e.g. compute, storage, networking) and product engineering teams, and enables product teams to move fast, build reliably, and scale efficiently. About the Role As a software engineer in the core services team, you will design and operate critical backend platforms such as caching systems, workflow orchestration, metadata stores, and file services. You'll focus on building highly reliable, scalable, and performant systems that serve as the backbone of our products. We're looking for people who are passionate about building infrastructure that empowers product teams, love working on distributed systems challenges, and enjoy creating well-designed APIs and abstractions that accelerate development. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: - Design, build, and maintain shared infrastructure services such as caching layers, workflow orchestration (Temporal), metadata stores, and file storage services. - Collaborate with product teams to provide scalable, reliable primitives that abstract the complexities of distributed systems. - Improve performance, resilience, and scalability of core services that power customer-facing applications. You might thrive in this role if you: - Have experience with distributed systems, caching infrastructure (e.g., Redis, Memcached), metadata storage (e.g., FoundationDB), or workflow orchestration (e.g., Temporal, Cadence). - Have experience running containerized ### Head of PMI Sales Enablement - U.S. Bancorp - Location: New York, NY, United States (unspecified) - Salary: Not disclosed - Posted: 2026-06-02 - 401(k) match: listed (not source-backed) - Apply: https://usbank.wd1.myworkdayjobs.com/US_Bank_Careers/job/New-York-NY/Head-of-PMI-Sales-Enablement_2026-0014831/apply - Excerpt: Head of PMI Sales Enablement New York, NY, United States Head of PMI Revenue Enablement is responsible for owning the systems, tools, operating cadence, and execution alignment that drive sales performance, strengthen client connectivity, and convert strate... ### Mechanical Designer - Hudson Technologies Inc - Location: Piscataway, NJ (unspecified) - Salary: Not disclosed - Posted: 2026-05-14 - 401(k) match: listed (not source-backed) - Apply: https://recruiting.paylocity.com/Recruiting/Jobs/Details/4031796 - Excerpt: Mechanical Designer Piscataway, NJ Mechanical Designer ### Senior/ Staff Physical Design CAD Engineer - Automation & Signoff - Astera Labs - Location: Israel (unspecified) - Salary: Not disclosed - Posted: 2026-03-18 - 401(k) match: listed (not source-backed) - Apply: https://job-boards.greenhouse.io/asteralabs/jobs/4674511005 - Excerpt: Senior/ Staff Physical Design CAD Engineer - Automation & Signoff Israel Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Physical Design CAD Engineer specializing in CAD Automation and Signoff to join our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful technical ownership in a new site, implementing the backend execution environment and methodologies for chips that power the world's largest AI clusters. As a foundational member of the team, you will be responsible for the physical implementation environment. Your primary mission is to develop, optimize, and support automated flows from RTL to manufacturable GDSII tape-out, ensuring a methodical and efficient work environment for the entire PD team. Key Responsibilities - Develop and ### Build Specialist, Automation & Controls (Starship Launch Pad) - SpaceX - Location: Starbase, TX (unspecified) - Salary: Not disclosed - Posted: 2025-12-26 - Apply: https://boards.greenhouse.io/spacex/jobs/8350907002?gh_jid=8350907002 - Excerpt: Build Specialist, Automation & Controls (Starship Launch Pad) Starbase, TX SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. BUILD SPECIALIST, AUTOMATION & CONTROLS (STARSHIP LAUNCH PAD) The Starship Tower & Launch Mount team is looking for controls build specialists to help make the next generation of launch pads a reality. This role will be focused on bridging the gap between detailed design and activations - that is, developing planning for installing conveyances and pulling cables, building up a healthy supply chain of commonly used parts, assisting in the field as needed, and feeding back lessons learned from the build to the design team. The systems the group is developing are intended to interface with the next generation of Starship vehicles, catch both stages, and enable a rapid and automated flight cadence requiring no manual actions between launches. RESPONSIBILITIES: - Create work instructions for integration of electrical and controls systems as well as their related secondary structures - Identify and escalate tricky designs that lead to manufacturing difficulties, and propose solutions for improving the process - Provide production support: rapidly disposition issue tickets, work with engineers to define requirements and standard repairs - Troubleshoot electrical and controls systems - Select, modify, and maintain equipment needed to perform tests and fabrication projects - ### Program Manager, Design Systems - Apple - Location: San Francisco Bay Area, United States of America (unspecified) - Salary: $183K-$274K - Posted: 2026-04-17 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200633664/program-manager-design-systems?team=MKTG - Excerpt: Program Manager, Design Systems San Francisco Bay Area, United States of America Marcom is the creatively led global team that oversees Apple's consumer-facing marketing. We ensure the flawless development and execution of world-class communications across all media and platforms. Every day, hundreds of millions of Apple customers around the world interact with our products. We drive the strategy and creative work that provide both new and existing customers with simple, engaging, and inspiring marketing experiences. Interactive's Design Systems team is responsible for the overall health, strategy, and execution of the frameworks and Design Systems libraries used across Apple's marketing platforms (e.g., apple.com). The team's main objective is to help form the vision and focus for One Apple Journey across our myriad digital touchpoints, platforms, and markets. The Program Manager, Design Systems is the strategic owner of the Digital Design Systems program, they define the vision, strategy, and roadmap to increase adoption, improve quality, and accelerate the work of design and engineering teams. They are the central point of contact, driving alignment between Marcom and partner organizations to ensure the system evolves to meet business goals and creative ambitions. This role is the through-line connecting feature roadmaps, stakeholder needs, and long-term strategy to guarantee the system's continuous success and alignment with Apple's brand. Own and drive the Digital Design Systems roadmap (quarterly and yearly), synthesizing input from creative, engineering, and business stakeholders to define priorities and communicate strategy to all levels of the organization. Establish and manage the governance model for ### Principal Engineer, ASIC Development Engineering (Front End CAD -RTL Integration, Lint, CDC) - SanDisk - Location: Bengaluru, KA, India (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://jobs.smartrecruiters.com/Sandisk/744000126903510-principal-engineer-asic-development-engineering-front-end-cad-rtl-integration-lint-cdc- - Excerpt: Principal Engineer, ASIC Development Engineering (Front End CAD -RTL Integration, Lint, CDC) Bengaluru, KA, India Company Description: Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description: About the Role SanDisk's ASIC team builds state-of-the-art memory controllers that power world-class NAND Flash products used globally at massive scale. The Design Enablement team enables the Technology, Methodology, and Flows to ASIC design teams to deliver best-in-class products. As the Front End CAD/Methodology Engineer, you will play a pivotal role in developing and delivering robust RTL design methodologies on cutting-edge technology nodes, enabling best-in-class ### Military DoD SkillBridge Internship - Maintenance Cadence Leader - GE Aerospace - Location: Wilmington NC USA (unspecified) - Salary: Not disclosed - Posted: 2026-05-28 - Parental leave: 10 weeks (not source-backed) - Non-birth-parent leave: 10 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://geaerospace.wd5.myworkdayjobs.com/GE_ExternalSite/job/Wilmington-NC-USA/Military-DoD-SkillBridge-Internship---Maintenance-Cadence-Leader_R5035420-1 - Excerpt: Military DoD SkillBridge Internship - Maintenance Cadence Leader Wilmington NC USA posted: Posted 15 Days Ago ### Senior Brand Designer - Gigs - Location: New York (unspecified) - Salary: $170K-$200K - Posted: 2026-06-07 - Apply: https://gigs.com/careers?gh_jid=4867314101 - Excerpt: Senior Brand Designer New York About Gigs At Gigs, we're building the operating system for mobile services-a platform that lets tech companies embed global connectivity into their products effortlessly. Just as Stripe lets any business add a payment button in seconds, Gigs empowers platforms to weave in connectivity-bridging the traditional world of telecom with modern tech. From fintechs launching mobile services to HR platforms offering work phone plans, we automate provisioning and remove telecom complexity. Our team of around 150 people across the US and Europe, backed by nearly $100 million in funding from Ribbit Capital, Google, and Y Combinator. As one of the fastest-growing tech companies, bringing together early-stage engineers, product builders, and business athletes from companies like Stripe, Airbnb, and Shopify. We're tackling deep technical and regulatory challenges to make connectivity truly seamless. If you're driven by curiosity, creativity, and the chance to shape the future of telecom, we'd love to hear from you. Things We Care About We are building in a highly complex space and tackling a massive problem. We want people who lean in when things get hard. Speed. We move and we ship. We set bold deadlines and treat every week like it matters. Ownership. If you see something broken, fix it. We don't wait for permission. Customer Obsession . Our customers' product is our product. Ambiguity. We're building frontier technology in a complex domain. You'll need sound judgement and good instincts to make decisions without complete information. First principles. We don't ask how ### Intern - Renesas Electronics - Location: Shanghai, , China (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000129383619-intern - Excerpt: Intern Shanghai, , China Company Description: Job Description: • System Design: Participate in IPS system applications development, including the design of sensor solutions, sensing coils, and peripheral circuits. • Project Delivery: Lead or participate in the prototyping, calibration, testing, and final delivery of position sensor modules. • Tool Development: Assist in developing calibration tools, covering flow design, data processing, and calibration algorithm implementation. • Prototyping: Build demos and test benches; develop sample code or test scripts. • Hardware Debugging: Utilize lab instruments (oscilloscope, multimeter, logic analyzer, etc.) for hardware debugging and failure analysis. • Documentation: Maintain high-quality technical documents including test reports, user guides, and application notes. Qualifications: • Education: Currently pursuing a Bachelor's or Master's degree in Electrical Engineering or a closely related engineering field. • Theoretical Foundation: Solid knowledge of analog and digital circuits, sensor principles, signal processing, and embedded systems. • Design Tools: Proficient in EDA software (e.g., Altium Designer, KiCad, or Cadence Allegro) for PCB design. • Programming: Proficiency in C and Python programming. • Practical Skills: Passionate about hands-on experiments, debugging, and engineering problem-solving. • Professionalism: Clear sense of teamwork, attention to detail, and strong responsibility. • Communication: Good verbal and written communication skills in English. • Availability: Minimum 2 days per week for at least 3 consecutive months . Nice to Have: • Experience in 3D printing or mechanical design to create simple test fixtures. • Practical project experience in motor control, encoders, or robotics. Additional Information: Renesas is an embedded semiconductor solution provider ### Sr. FPGA Engineer - CHAOS Industries - Location: Hawthorne, California, United States (unspecified) - Salary: $160K-$225K - Posted: 2026-05-11 - Apply: https://job-boards.greenhouse.io/chaosindustries/jobs/5134354007 - Excerpt: Sr. FPGA Engineer Hawthorne, California, United States CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today's realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries' products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time. CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com . Role Overview: CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families. Responsibilities: - Design and implement complex FPGA designs targeting our next-generation sensor products - Support system integration of FPGA designs with complex software systems - Support deployed FPGA capabilities in the hands of our U.S. and international customers - Work full-time on-site in our office in Hawthorne, California Minimum Requirements: - Bachelor's ### Hardware Engineer, Amazon LEO - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $117K-$160K - Posted: 2026-04-28 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10406205/hardware-engineer-amazon-leo - Excerpt: Hardware Engineer, Amazon LEO Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Key job responsibilities - Own PCBA development from concept through production - Design and optimize different blocks of electronics sub-systems - Design high-speed digital circuitry in collaboration with various teams - Lead and review schematic capture and PCB layout - Lead PCB vendor engagement for DFM review - Optimize PCB stack-up for performance and cost - Generate test plans/procedures based off high level requirement definition - Complete board bring-up and perform test campaigns for different modules and subsystems - Design of automated test systems, test fixtures, and factory test - Support the transition of the designs to production Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. A day in the life As an Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting phased array antenna systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon LEO's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, ### Hardware Integration Engineer - Applied Intuition - Location: Sunnyvale, California, United States (unspecified) - Salary: $118K-$201K - Posted: 2024-02-22 - 401(k) match: listed (not source-backed) - Apply: https://jobs.ashbyhq.com/applied/0bf0067b-38bb-4916-9fa3-d234eec3ba42 - Excerpt: Hardware Integration Engineer Sunnyvale, California, United States About Applied Intuition Applied Intuition, Inc. is powering the future of physical AI. Founded in 2017 and now valued at $15 billion, the Silicon Valley company is creating the digital infrastructure needed to bring intelligence to every moving machine on the planet. Applied Intuition services the automotive, defense, trucking, construction, mining and agriculture industries in three core areas: tools and infrastructure, operating systems, and autonomy. Eighteen of the top 20 global automakers, as well as the United States military and its allies, trust the company's solutions to deliver physical intelligence. Applied Intuition is headquartered in Sunnyvale, California, with offices in Washington, D.C.; San Diego; Ft. Walton Beach, Florida; Ann Arbor, Michigan; London; Stuttgart; Munich; Stockholm; Bangalore; Seoul; and Tokyo. Learn more at applied.co . We are an in-office company, and our expectation is that employees primarily work from their Applied Intuition office 5 days a week. However, we also recognize the importance of flexibility and trust our employees to manage their schedules responsibly. This may include occasional remote work, starting the day with morning meetings from home before heading to the office, or leaving earlier when needed to accommodate family commitments. About the role We are looking for an Hardware Integration Engineer to work directly with our hardware team on the buildout, testing, maintenance and improving our utilization rate of the fleet. Through your daily interactions with all aspects of the self-driving system, you will be the lead technical reference for the system. ### Mechanical Engineer, Data Center Design Engineering - Meta - Location: Menlo Park, CA; San Francisco, CA (unspecified) - Salary: $173K-$245K - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://www.metacareers.com/jobs/1027492196490833/ - Excerpt: Mechanical Engineer, Data Center Design Engineering Menlo Park, CA; San Francisco, CA Meta's AI infrastructure is scaling faster than anything the data center industry has designed for. We need a Mechanical Engineer who can own the next generation of liquid cooling and thermal systems - from first concept through construction - at a scale no one else is building. You will serve as the design authority for novel systems, defining technical approaches where established standards may not yet exist. This is a small, expert team where your decisions directly shape what gets built. You'll set technical direction across hydronic and thermal systems, mentor engineers around you, and drive programs that deliver megawatts of compute capacity. Our current focus areas include: - Technical Roadmap - Charting the path for next-generation mechanical systems and emerging technologies - Programmatic Designs - Develop future data center designs - Owner Furnished Equipment - Develop, maintain, optimize and manage risk of critical mechanical equipment. - Design Localization - Lead the implementation of the programmatic designs for site-specific conditions and support construction administration for self build and leases. Responsibilities: - Lead and/or assist on new data center product designs, integrating technological advancements while balancing cost, efficiency, time-to-delivery, and sustainability - Own data center product mechanical systems strategies and infrastructure designs - including liquid cooling, chiller plant design, and heat rejection systems - from concept through construction administration - Drive the design and development of airside and hydronic systems including CDU, Valve Train, Fan Coils, Central Chiller Plants, ### (Pipeline) Electrical Engineer, Manufacturing Test (Active Clearance) (Sentry) - Anduril - Location: Costa Mesa, California, United States (unspecified) - Salary: $129K-$171K - Posted: 2026-05-11 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/5134842007?gh_jid=5134842007 - Excerpt: (Pipeline) Electrical Engineer, Manufacturing Test (Active Clearance) (Sentry) Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB As an Electrical Engineer in the Manufacturing organization you will design and build complex systems and PCBA platforms to test our products. Data acquisition and physical layer interfaces using FPGA, MCU, and off-the-shelf equipment will enable testing our systems to stringent standards ensuring that we are consistently shipping the highest quality products to our customers. You will work in a multi-disciplinary design team, managing requirements, capturing custom circuits, and designing complex assemblies and harnesses. You will work with firmware engineers to enable board support packages for embedded Linux, and bring up MCU RTOS platforms. In this role you'll need to think creatively and come up with solutions to solve difficult testing problems and push to continuously improve our methods of automation, throughput, user interfaces, and data ### Electrical Engineer, Manufacturing Test (Sentry) - Anduril - Location: Costa Mesa, California, United States (unspecified) - Salary: $129K-$171K - Posted: 2026-05-11 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/5129394007?gh_jid=5129394007 - Excerpt: Electrical Engineer, Manufacturing Test (Sentry) Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB As an Electrical Engineer in the Manufacturing organization you will design and build complex systems and PCBA platforms to test our products. Data acquisition and physical layer interfaces using FPGA, MCU, and off-the-shelf equipment will enable testing our systems to stringent standards ensuring that we are consistently shipping the highest quality products to our customers. You will work in a multi-disciplinary design team, managing requirements, capturing custom circuits, and designing complex assemblies and harnesses. You will work with firmware engineers to enable board support packages for embedded Linux, and bring up MCU RTOS platforms. In this role you'll need to think creatively and come up with solutions to solve difficult testing problems and push to continuously improve our methods of automation, throughput, user interfaces, and data analytics. WHAT YOU'LL ### Systems Engineer, Platform Architecture - Apple - Location: Austin, United States of America (unspecified) - Salary: $181K-$318K - Posted: 2026-01-21 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200642640/systems-engineer-platform-architecture?team=HRDWR - Excerpt: Systems Engineer, Platform Architecture Austin, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products very quickly. Bring passion and dedication to your job and there's no telling what we can accomplish together. Do you love crafting elegant solutions to highly complex challenges? Can you intrinsically see the importance of every detail? At Apple, our Platform Architecture group is responsible for connecting our hardware and software into one unified system. Join this team, and you'll collaborate with engineers across Apple to build and deploy forward-looking prototype systems that contribute to the development of our world renowned hardware and software architecture. You and your team will confirm that every product we make performs exactly as intended. Together, our work will be the reason millions of customers feel that they can trust our devices every single day. Apple's Platform Architecture group is seeking an experienced systems engineer, who will support our current, as well as develop new hardware/software interface technologies for chip development and verification. You will work with and support our world leading silicon engineering teams on next generation chips, which end up in the hands of millions of users worldwide. Design and develop new technologies for interfacing software to hardware prototypes. Work with software, design verification and silicon validation teams to deploy and transfer this technology. Support various groups (software, architecture, verification, validation) in the use of existing and the development of new technology. Work independently and lead deliverables ### Senior Electrical Engineer, Manufacturing Test - Anduril - Location: Costa Mesa, California, United States (unspecified) - Salary: $146K-$194K - Posted: 2025-07-23 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/4797397007?gh_jid=4797397007 - Excerpt: Senior Electrical Engineer, Manufacturing Test Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB As an Senior Electrical Engineer in the Manufacturing organization you will design and build complex systems and PCBA platforms to test our products. Data acquisition and physical layer interfaces using FPGA, MCU, and off-the-shelf equipment will enable testing our systems to stringent standards ensuring that we are consistently shipping the highest quality products to our customers. You will work in a multi-disciplinary design team, managing requirements, capturing custom circuits, and designing complex assemblies and harnesses. You will work with firmware engineers to enable board support packages for embedded Linux, and bring up MCU RTOS platforms. In this role you'll need to think creatively and come up with solutions to solve difficult testing problems and push to continuously improve our methods of automation, throughput, user interfaces, and data analytics. WHAT ### Director, Digital Compute & Power Optimization - Astera Labs - Location: Toronto, Ontario, Canada (unspecified) - Salary: CAD 200K-250K - Posted: 2026-05-30 - 401(k) match: listed (not source-backed) - Apply: https://job-boards.greenhouse.io/asteralabs/jobs/4695156005 - Excerpt: Director, Digital Compute & Power Optimization Toronto, Ontario, Canada Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Job Description We are looking for a hands-on Digital Design Engineering Manager to drive high-speed connectivity solutions. You will build and lead a team responsible for delivering the micro-architecture and implementation of front-end digital design, including RTL development, synthesis, IP integration, and block-level verification for high-performance ASICs. The ideal candidate should have strong experience with low-power design techniques and a solid understanding of SerDes DSP design, including equalizer optimization for power and area efficiency. The candidate must also have a good knowledge of communication and interface protocols such as CXL/PCIe (Gen 3 and above), Ethernet, or DDR. Basic qualifications: - Strong academic and technical background in electrical engineering. A Bachelor's degree in EE is required, and a Master's degree is preferred. - 10+ years' experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications. - 5+ years' experience managing a team of RTL design engineers. ### Senior Electrical Engineer, Manufacturing Test (Active Clearance) - Anduril - Location: Costa Mesa, California, United States (unspecified) - Salary: $146K-$194K - Posted: 2026-03-31 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/5095560007?gh_jid=5095560007 - Excerpt: Senior Electrical Engineer, Manufacturing Test (Active Clearance) Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB As an Senior Electrical Engineer in the Manufacturing organization you will design and build complex systems and PCBA platforms to test our products. Data acquisition and physical layer interfaces using FPGA, MCU, and off-the-shelf equipment will enable testing our systems to stringent standards ensuring that we are consistently shipping the highest quality products to our customers. You will work in a multi-disciplinary design team, managing requirements, capturing custom circuits, and designing complex assemblies and harnesses. You will work with firmware engineers to enable board support packages for embedded Linux, and bring up MCU RTOS platforms. In this role you'll need to think creatively and come up with solutions to solve difficult testing problems and push to continuously improve our methods of automation, throughput, user interfaces, and data ### Electrical Engineer, Manufacturing Test - Anduril - Location: Costa Mesa, California, United States (unspecified) - Salary: $129K-$171K - Posted: 2025-11-20 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/4988611007?gh_jid=4988611007 - Excerpt: Electrical Engineer, Manufacturing Test Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB As an Electrical Engineer in the Manufacturing organization you will design and build complex systems and PCBA platforms to test our products. Data acquisition and physical layer interfaces using FPGA, MCU, and off-the-shelf equipment will enable testing our systems to stringent standards ensuring that we are consistently shipping the highest quality products to our customers. You will work in a multi-disciplinary design team, managing requirements, capturing custom circuits, and designing complex assemblies and harnesses. You will work with firmware engineers to enable board support packages for embedded Linux, and bring up MCU RTOS platforms. In this role you'll need to think creatively and come up with solutions to solve difficult testing problems and push to continuously improve our methods of automation, throughput, user interfaces, and data analytics. WHAT YOU'LL DO ### Solutions Engineer - PlanetScale - Location: Remote - EMEA, Remote - NA (remote) - Salary: $160K-$250K - Posted: 2025-10-29 - Apply: https://job-boards.greenhouse.io/planetscale/jobs/4052805009 - Excerpt: Solutions Engineer Remote - EMEA, Remote - NA PlanetScale is growing rapidly and reinventing the transactional database market. The PlanetScale platform offers both Postgres and Vitess clusters. Vitess, an open-source database clustering system for horizontal scaling of MySQL, enables businesses to efficiently handle large-scale data workloads - without sacrificing developer experience. PlanetScale is backed with over $100M in venture financing from top-tier VCs including a16z, Kleiner Perkins, SignalFire, and Insight Venture Partners. And we serve some of the most innovative companies in the world such as Block, Anysphere (Cursor), MyFitnessPal, Etsy, Kick, and thousands more. Our customers entrust us with what is often their most precious digital asset, their data, so the stakes couldn't be higher. We're looking for early members of our Sales team that can form deep partnerships with our prospects and customers to help them adopt and succeed on the next generation of database infrastructure. What's the job to be done? - Partner with Sales and Customer Engineering throughout the pre-sales and post-sales journey as the technical expert helping customers solve their most challenging database problems. - Lead technical discovery to match customers' business and technical objectives with PlanetScale's offerings. - Design and execute proof of value timelines that deliver on agreed upon business outcomes and success criteria. - Design database migration strategies and work hands-on with customers to execute migrations to PlanetScale's PostgreSQL and Vitess platforms. - Assess workloads, analyze performance requirements, and recommend architecture, sizing, and optimization strategies. - Build tools, scripts, and automation that ### Hardware Systems Signal Integrity Engineer - iPhone - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $181K-$318K - Posted: 2026-03-12 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200651246/hardware-systems-signal-integrity-engineer-iphone?team=HRDWR - Excerpt: Hardware Systems Signal Integrity Engineer - iPhone Cupertino, United States of America The people here at Apple don't just create products - they create the kind of wonder that's revolutionized entire industries. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do, from amazing technology to industry-leading environmental efforts The iPhone System Technologies organization is seeking a Signal Integrity Engineer for the hardware development team. In this highly collaborative role, you will interface with various technology and module teams (such as camera, display, sensors, etc.) to influence their integration at the system level with emphasis on design and debug of high-speed and low-speed links. Our team is collaborative, creative and passionate about what we do and the products we make. We want to hear from you! We are seeking a candidate with a strong background in Signal Integrity including Lab and Simulation experience. Knowledge of electromagnetics, transmission line theory, extracting channel models and simulating EMI/Crosstalk are expected. Channel elements include rigid PCBs, flexible printed circuit boards, connectors, and other components in a mobile system. Participating in schematic reviews to inform selection and placement of various system level channel components including RLC filters, DC-blocking capacitors, board to board connectors, etc. Simulating loss, crosstalk, and coupling concerns to guide layout & system design using 3D/2.5D/2D EM modeling tools. Leading layout reviews and making data-driven recommendations to achieve robust SI performance on various signals running at low and high speeds. Performing design feasibility study, ### MTS, IO Design Engineering - Micron Technology, Inc. - Location: Boise, ID - Main Site (unspecified) - Salary: Not disclosed - Posted: 2026-05-29 - 401(k) match: listed (not source-backed) - Apply: https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/MTS--IO-Design-Engineering_JR103094 - Excerpt: MTS, IO Design Engineering Boise, ID - Main Site posted: Posted 14 Days Ago ### Hardware Systems Engineer - EMI Technology - Apple - Location: San Francisco Bay Area, United States of America (unspecified) - Salary: $181K-$318K - Posted: 2026-05-27 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200665013/hardware-systems-engineer-emi-technology?team=HRDWR - Excerpt: Hardware Systems Engineer - EMI Technology San Francisco Bay Area, United States of America At Apple, we don't just create products, we create experiences that redefine what's possible. Our people are the driving force behind innovations that have transformed entire industries, and it's the unique perspectives and bold ideas they bring that make it all happen. From groundbreaking technology to our commitment to a more sustainable planet, everything we do is rooted in a desire to leave the world better than we found it. We have an opportunity for a passionate and results-driven Electromagnetic Interference (EMI) Engineer to join our iPhone Hardware Engineering - System Technology team and help push the boundaries of what iPhone can do.In this highly collaborative role, you will partner with System Electrical Engineering (EE), Product Design (PD), and module teams, including camera, display, audio, and sensors, to design, model, simulate, and verify EMI coexistence across iPhone's subsystems. Our team is creative and passionate about what we do and the products we make. Come join us! In this role, you will identify, analyze, and mitigate EMI between subsystems to ensure co-existence. You will characterize and debug system-level EMI coexistence and RFI desense issues, leveraging both 3D EM and circuit simulations - spanning frequency and time domains alongside hands-on hardware validation using tools such as near-field scanners, spectrum analyzers, and VNAs. You will model the various subsystems on the system to assess their EMI impact, while developing design guidelines that inform board layout, system architecture, and product ### Staff Product Designer, AI Products - Databricks - Location: New York City, New York (unspecified) - Salary: $167K-$229K - Posted: 2026-06-11 - Non-birth-parent leave: 12 weeks (not source-backed) - Apply: https://databricks.com/company/careers/open-positions/job?gh_jid=8584704002 - Excerpt: Staff Product Designer, AI Products New York City, New York RDQ327R178 At Databricks, we design tools that make complex data workflows intuitive and powerful. Our mission is to simplify how data is connected, understood, and activated so that organizations can turn information into business outcomes. Designers at Databricks blend strong visual craft with systems thinking, shaping products that support some of the most advanced data teams in the world. We're hiring a Staff Product Designer to help build a new product category at Databricks. You will help shape agent-driven experiences that make the power of the Lakehouse accessible to a broader set of users. This will be a true 0-to-1 environment, combining the excitement of a startup with the resources of a tech leader like Databricks. The impact you will have - Drive key product and design initiatives within a strategic new product area at Databricks, helping organizations activate and operationalize their data at scale. - Define a new generation of agent-driven workflows that help users move seamlessly from data and insights to decisions and action. - Collaborate closely with product management, engineering, and leadership to shape the future of business applications on the Databricks platform. - Design intuitive user experiences that simplify complex workflows while preserving the flexibility and power required by enterprise organizations. - Develop a deep understanding of Databricks business objectives, customer needs, emerging AI capabilities, and the evolving data and technology landscape. - Conduct user research to identify customer needs, pain points, and opportunities related to ### Electrical Apps Support and Admin - Infosys Consulting - Location: Location not specified (unspecified) - Salary: $73K-$102K - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://sjobs.brassring.com/TGnewUI/Search/home/HomeWithPreLoad?partnerid=25633&siteid=5439&PageType=JobDetails&jobid=2245915 - Excerpt: Electrical Apps Support and Admin Infosys is seeking -Electrical Apps Support and Admin. In this role, you will interface with key stakeholders and apply your technical proficiency across different stages of the Software Development Life Cycle including, Requirements Elicitation, Application Architecture definition and Design. Responsible for implementation, maintenance, and technical support of advanced EDA/CAE tools You will play an important role in creating the high-level design artifacts. You will also deliver high quality code deliverables for a module, lead validation for all types of testing and support activities related to implementation, transition and warranty. You will be part of a learning culture, where teamwork and collaboration are encouraged, excellence is rewarded, and diversity is respected and valued. Required Qualifications: Candidate can be located anywhere in the US. This position will require travel to project locations. Bachelor's degree or foreign equivalent required from an accredited institution in mechanical/ electrical / computer science / system engineering or related field required. Will also consider three years of progressive experience in the specialty in lieu of every year of education. Minimum of 4+ years of relevant work experience in Electrical Engineering Apps support, Engineering/ IT functions including technical support in a global work environment with multiple applications. At least 4+ years Hands on experience in all depths of . Strong Expertise in maintaining( Install, configure, and deploy engineering , license Mgmt and Configuration) - AGI / STK (Satellite Toolkit) - Cadence EDA tools - Dassault Systèmes (CATIA/3DEXPERIENCE) - SPARK3D / CST / EM tools ### CAD Engineer - Signoff Infrastructure - Apple - Location: Austin, United States of America (unspecified) - Salary: $147K-$272K - Posted: 2026-04-27 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200660252/cad-engineer-signoff-infrastructure?team=HRDWR - Excerpt: CAD Engineer - Signoff Infrastructure Austin, United States of America We're seeking a CAD Engineer to join our team and develop full-stack web applications that power the Signoff infrastructure across all Apple SOC design groups within the Hardware Tech group. Signoff is the critical final verification stage in chip design where designs are validated against manufacturing, timing, and power criteria before tapeout. This role focuses on building and enhancing Signoff dashboards, CAD flow metrics collection, and data visualization tools that design and CAD teams rely on daily. You'll also participate in the development of our Signoff AI assistant and integrate modern AI/RAG capabilities into our platform. The Signoff Infrastructure developer will develop, support, and enhance the Signoff dashboards, CAD flow metrics collection, and visualization tools used for Signoff by all Apple SOC design groups. We are looking for a passionate, self-driven software engineer with the ability to work on complex software, a team player who pays a high level of attention to detail, strives for software quality, and prefers a test-driven development approach. The role requires providing Signoff infrastructure support and interfacing with the design and CAD teams to develop high-impact web applications to improve our Signoff process. You'll work across the full stack using Python and JavaScript/TypeScript, build and maintain backend services and APIs, develop interactive frontend dashboards, and work with SQL databases to manage and query enterprise-scale design data. As our platform evolves, you'll also contribute to integrating RAG and AI-powered features to enhance how teams discover and ### Hardware Architect - Information Security - Apple - Location: Seattle, United States of America (unspecified) - Salary: $172K-$302K - Posted: 2025-11-11 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200627965/hardware-architect-information-security?team=CORSV - Excerpt: Hardware Architect - Information Security Seattle, United States of America Apple Information Security is responsible for protecting Apple's data in transit and at rest. Apple employees and partners are always moving information from one system to another, or storing it on a server or device. Our job is to make sure Apple's information doesn't fall into the wrong hands. We are looking for a self-motivated individual with an intuition for security who is not afraid to question assumptions. The ability to be results-driven and comfortable with dynamic requirements, as well as having excellent interpersonal and time management skills, are keys to success in this position. As a member of our team, you will have the opportunity to collaborate with multi-functional partners both internal and external to Apple to build innovative security products. You will support the development of embedded systems designed to enhance Apple's security posture. You will be challenged to provide forward-thinking solutions to problems and to be a good teammate under deadline constraints. Show us your talent in this challenging, fun, and exciting environment. It's what makes us Apple. As a Hardware Architect in Apple Information Security, you will: * Own & establish the vision for future generations of security hardware. * Translate security features into high-level HW/SW specifications and derive HW requirements to design a product. * Manage the program seeking to realize the vision - hardware design, development, manufacturing, and deployment. * Map the design concept to available components, developing a bill of materials for manufacturer(s). ### Electrical Design Engineer - AI Trainer - Handshake - Location: Remote (USA), Remote, United States (remote) - Salary: Not disclosed - Posted: 2026-03-13 - Apply: https://jobs.ashbyhq.com/handshake/7e7702f6-750e-44e1-8f12-caf26fcc85f4 - Excerpt: Electrical Design Engineer - AI Trainer Remote (USA), Remote, United States Opportunity Overview Handshake is looking for skilled KiCad and LibrePCB users to support AI research through flexible, hourly contract work. This is not a traditional job. You'll draw on your hands-on experience with schematic capture, PCB layout, or embedded hardware design to evaluate AI-generated content and provide feedback that helps AI better understand electronics design tasks and EDA workflows. This is an ongoing, project-based opportunity you can take on alongside anything else you have going on. Who This Is For This is a good fit if you're an experienced KiCad or LibrePCB user who has worked in or around roles like: - Hardware Engineer or Embedded Systems Engineer - PCB Designer or Electronics Technician - IoT Developer or Circuit Design Engineer You should have solid experience with one or more of the following: - Schematic capture, PCB layout, or embedded hardware design using KiCad or LibrePCB - IoT hardware design, embedded systems, or EDA tool workflows - Annotating or labeling circuit schematics and PCB design assets - Reviewing PCB designs for accuracy, performance, or design consistency What You'll Do You'll use your experience with KiCad or LibrePCB to create tool-related questions and review AI-generated responses for accuracy and relevance to real-world hardware engineering and PCB design workflows. No prior AI or technical experience is required. Qualifications We're looking for people who have: - At least 1 year of hands-on experience with KiCad or LibrePCB whether through professional work or ### SOC Design Methodologies Engineer - NVIDIA Corporation - Location: 2 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-06-05 - 401(k) match: listed (not source-backed) - Apply: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Taiwan-Hsinchu/SOC-Design-Methodologies-Engineer_JR2019265 - Excerpt: SOC Design Methodologies Engineer 2 Locations posted: Posted 7 Days Ago ### Senior Signal and Power Integrity Engineer, Pixel - Google - Location: New Taipei, Banqiao District, New Taipei City, Taiwan (unspecified) - Salary: Not disclosed - Posted: 2026-06-03 - Parental leave: 18 weeks (not source-backed) - Non-birth-parent leave: 18 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckfQS4ckZybU1ECEH9h7J-ssyus5QF_c_A3pA0N9Yv1TAEjsACxwdTL-whO8tsV1Ug6O_yLJkdoW5u4RGMfirZCnfCG27ZZkMayQqVZZytbE189PL7-dkcj1yMkTfuA%3D%3D_V2&loc=TW&title=Senior+Signal+and+Power+Integrity+Engineer - Excerpt: Senior Signal and Power Integrity Engineer, Pixel New Taipei, Banqiao District, New Taipei City, Taiwan Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Design Google's future products by managing architecture selection, electrical design, and validation, including early product architecture definition and manage Signal Integrity (SI) and Power Integrity (PI) of products and sub-component development. Provide detailed SI/PI rules for cutting-edge PCB and Flex technology and participate in PCB design reviews and drive resolution of SI/PI challenges in collaboration with Design Engineer, PCB Designer, and System teams. Provide simulation and DOEs to support cross-functional teams on SI/PI debugging, root-cause analysis, and solution optimization and work with Engineering/Qualification teams on system bring-up and design validation. Bring Pixel design to mass production by defining ERS, analyzing test data, assisting in software bring-up, and traveling on-site to ensure successful manufacturing and testing. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or related field or equivalent practical experience. 4 years of work experience in Consumer Electronics/embedded system design or electrical systems development. 4 years ### Opaque Touch Hardware - Sensing Design & Integration Engineer - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $147K-$221K - Posted: 2026-06-05 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200666849/opaque-touch-hardware-sensing-design-integration-engineer?team=HRDWR - Excerpt: Opaque Touch Hardware - Sensing Design & Integration Engineer Cupertino, United States of America Come join the Sensor Technology Team! We develop groundbreaking sensors that are central to a variety of Apple platforms, like Mac, Audio, Accessories, and more. As part of the team, you will play a key role in specifying, developing, characterizing, and validating sensor systems used in these platforms-from proof-of-concept all the way through end-product launch. Our primary goal is to enable the world's best user experience. New challenges arise every day that require the sharp analytical skills of talented individuals. To be successful, you must be able to thrive in a dynamic, agile, multi-disciplinary, and hands-on environment that values engineering excellence, creativity, and innovation. In this role, you will specify, build, and validate capacitive sensors in new product applications, working cross-functionally with test, firmware, system engineering, and product operations teams. You will leverage your familiarity with product integration and manufacturing technologies to successfully implement sensors into high-volume consumer products. The ideal candidate will also bring direct experience with technologies such as capacitive touch sensors. End-to-End Leadership: Lead the development of sensing solutions from conception through product release. Prototyping & Design: Propose, design, build, and measure prototype sensing solutions to demonstrate architectural feasibility. Analyze design trade-offs to provide final recommendations. Hardware Development: Design schematics and provide layout constraints for PCBs/FPCs. Validation & Testing: Define calibration, test, and reliability requirements across the supply chain. Develop test software and scripts for verification, and characterize sensing solutions. Data Analysis & ### IT Systems Administrator, Mission Systems - SpaceX - Location: Vandenberg, CA (unspecified) - Salary: $95K-$115K - Posted: 2026-04-28 - Apply: https://boards.greenhouse.io/spacex/jobs/8525777002?gh_jid=8525777002 - Excerpt: IT Systems Administrator, Mission Systems Vandenberg, CA SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. IT SYSTEMS ADMINISTRATOR, MISSION SYSTEMS SpaceX is looking for a highly skilled and versatile Launch IT Systems Administrator to support the networking, compute, and application support needs of our launch environment. This role is critical to enabling safe, reliable, and high-cadence launch operations across multiple sites. The ideal candidate thrives in mission-critical settings, brings a strong sense of urgency balanced with operational excellence, and is comfortable operating as a technical generalist across multiple IT disciplines. RESPONSIBILITIES: - Design, deploy and augment IT infrastructure including networking, server, and desktop hardware that directly supports mission-critical networks across the country. - Provide direct IT support during launch and test campaigns - Perform periodic systems upgrades and maintenance in between critical operations, sometimes on weekends and evenings. - Proactively monitor IT services and respond rapidly to incidents to ensure high availability and optimal systems performance. - Collaborate with cross-functional teams to proactively identify and resolve potential technical issues with systems deployments. - Author and maintain documentation for IT systems, including systems overview, design drawings and operational procedures. - Leverage automation tools and contribute to broader IT systems engineering and infrastructure-as-code initiatives. - Ensure that systems are configured and maintained in ### Senior RTL Design Engineer - Cisco - Location: Armenia (hybrid) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Armenia/Senior-RTL-Design-Engineer_1451869 - Excerpt: Senior RTL Design Engineer Armenia This is a hybrid role with four days per week at Cisco's Yerevan office. Meet the Team Join the Silicon One Team at Cisco in Armenia, a group at the forefront of developing Cisco's groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical Design methodologies and creating robust flows essential for developing our complex chips. You will also have the opportunity to work firsthand with the Physical Design of intricate chip partitions. Your Impact This role offers a unique chance to shape the future of networking innovation within Cisco Silicon One. As a key technical leader, you will drive next-generation silicon architecture development, guide your team in delivering solutions that power advanced global networks, and lead collaboration across multiple teams. You will mentor engineers and influence physical design strategies that set new industry standards. Your expertise will be critical to the successful delivery and continuous improvement of Cisco's most advanced silicon solutions. Taking part in all aspects of digital design, from micro-architecture to RTL design and qualification. Sub-system/SoC integration and verification. Review/enhancement of RTL codes. Improve flows and methodologies to streamline IP/SoC development and integration. Work closely with the verification team for complex debugs to resolve verification failures. Close interaction with the physical design team to reach better physical design QoR. Minimum Qualifications 6+ years of industry experience in ASIC digital design. ### Data Center Mechanical Engineer - Anthropic - Location: Sydney, Australia (unspecified) - Salary: Not disclosed - Posted: 2026-05-21 - Apply: https://job-boards.greenhouse.io/anthropic/jobs/5227413008 - Excerpt: Data Center Mechanical Engineer Sydney, Australia About Anthropic Anthropic's mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Training and serving frontier AI models requires compute infrastructure at a scale and density that pushes past what conventional data center designs were built to handle. Anthropic's Data Center team is responsible for delivering that physical infrastructure - partnering with build partners, equipment manufacturers, and vendors to stand up facilities that can reliably cool some of the largest accelerator clusters in the industry. As a Senior Data Center Mechanical Engineer based in Sydney, you'll lead the design direction and technical oversight of building mechanical systems - cooling, chilled-water distribution, liquid cooling, plumbing, and fire protection - across our rapidly expanding Asia Pacific (APAC) portfolio. This is a senior individual contributor role focused on driving and reviewing mechanical design from concept through detailed design and construction documentation produced by external engineering firms and development partners, ensuring every facility meets Anthropic's standards for reliability, efficiency, and scalability. You'll own the mechanical design direction from Basis of Design through construction and commissioning, serving as the primary technical interface between Anthropic's internal teams and our external engineering and development partners. A central part of this role is speed-to-capacity through prefabrication and modular ### Sr HW Dev Engineer - Payload, Amazon Leo Hardware Development - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $137K-$186K - Posted: 2026-05-19 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10424426/sr-hw-dev-engineer-payload-amazon-leo-hardware-development - Excerpt: Sr HW Dev Engineer - Payload, Amazon Leo Hardware Development Redmond, Washington, USA Amazon Leo is Amazon's low Earth orbit satellite network. Our mission is to deliver fast, reliable internet connectivity to customers beyond the reach of existing networks. From individual households to schools, hospitals, businesses, and government agencies, Amazon Leo will serve people and organizations operating in locations without reliable connectivity. As an Senior Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon Leo's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, and test. The Senior Hardware Engineer will have a complete understanding of how their design changes impact downstream partners such as operations, supply chain, product management, and reliability. They will make daily high-value judgements on tactical vs. strategic decisions in order to achieve system performance targets and maintain schedules despite unexpected challenges. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: -Own PCBA development from concept through production -Design and optimize different blocks of electronics sub-systems -Design high-speed digital and/or RF circuitry in collaboration with various teams -Lead and review schematic capture and PCB layout -Lead PCB vendor engagement for ### Hardware System Design Electrical Engineer - iPhone - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $147K-$272K - Posted: 2026-05-05 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200661692/hardware-system-design-electrical-engineer-iphone?team=HRDWR - Excerpt: Hardware System Design Electrical Engineer - iPhone Cupertino, United States of America Do you have a feeling of deep satisfaction when a design decision that YOU were responsible for is showcased in a newly released product ? Do you just beam at the thought of “I made that!” ?Would you like to have that same feeling again, and again? The iPhone team is looking for experienced Hardware Design Engineers who are motivated by the opportunity to make design decisions, often difficult ones, that will benefit millions of iPhone users worldwide. Using your skills in Electrical Engineering as well as your board and system level knowledge, you can make a difference in so many lives! Our team is collaborative, creative and passionate about what we do and the products we make. We want to hear from you! This is a unique hardware design position that starts at product concept and continues all the way through to mass production. You will be at the center of iPhone product development with a critical impact on overall design. Lead designs that continually push the boundaries of technology and ultimately improve the iPhone user experience. Design and integration of custom hardware into constrained systems. Work daily with multi-functional technology teams in a fast-paced environment. There will be opportunities for international travel. Minimum Qualifications: BS Electrical/Computer Engineering or equivalent 5+ years industry experience Electrical engineering fundamentals including analog and high speed digital design Broad experience across different applications and technologies Design of complex system architectures Preferred ### Senior Technical Hardware Program Manager, Leo Customer Terminal Industrial Design - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $149K-$201K - Posted: 2026-06-09 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10443920/senior-technical-hardware-program-manager-leo-customer-terminal-industrial-design - Excerpt: Senior Technical Hardware Program Manager, Leo Customer Terminal Industrial Design Redmond, Washington, USA Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. We are looking for a talented and detail oriented Program Manager to help bring our products to the world. The Technical Hardware Program Manager will be the operational backbone of design and research teams, driving operational excellence, process improvement, and team enablement across design/research functions. You will work closely with cross-functional teams to streamline workflows, optimize how we work, and ensure adherence to best practices. The Technical Hardware Program Manager will work closely with the hardware development and and various partner teams to drive key aspects of product definition, execution, usability testing and distribution of design deliverables. You must be responsive, flexible and able to succeed within an open collaborative peer environment. Working within the Hardware Design team, the Technical Hardware Program Manager will be responsible for coordinating execution of the Leo hardware Product Development Process across multiple hardware design programs. The Technical Hardware Program Manager will work with the PD/EE teams, Product Managers , Creative partner teams (packaging, UX, marketing) to ensure requirements are clear and necessary process steps are planned and deliverables meet target schedules. In addition, you will provide support and coordination within the Industrial Design team to facilitate usability testing, distribution and tracking of prototypes, coordination of meetings, documentation of “lessons learned” during project ### Senior Layout Design Engineer - Ametek - Location: Work Location (Country) Japan | Remote/Onsite Onsite (remote) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://jobs.ametek.com/job/Tokyo-Senior-Layout-Design-Engineer-105-0012/1389107500/ - Excerpt: Senior Layout Design Engineer Work Location (Country) Japan | Remote/Onsite Onsite Position Summary: We are seeking a highly skilled Senior Analog Layout Engineer to lead the physical layout of complex analog, mixed‑signal, and high‑performance IC designs. This role requires deep expertise in custom layout techniques, advanced process nodes, physical verification, and close collaboration with circuit designers to deliver silicon‑proven designs that meet stringent performance, reliability, and manufacturing requirements. Primary Responsibilities: Own and execute the full layout lifecycle for analog and mixed‑signal IP blocks such as ADCs, DACs, PLLs, LDOs, bandgaps, amplifiers, and pixels. Collaborate closely with circuit design engineers to understand specifications, constraints, and performance trade-offs. Develop floorplans, layout strategies, and routing plans that optimize matching, noise performance, EM/IR robustness Perform custom layout of critical analog circuits using industry‑standard EDA tools (e.g., Cadence Virtuoso). Ensure compliance with design rules (DRC), electrical rules (ERC), layout-vs-schematic checks (LVS), and parasitic extraction (PEX). Drive layout quality through guard‑ringing, shielding, isolation techniques, symmetry enforcement, and dummy placements. Work with foundry PDKs to interpret process rules, device models, and reliability requirements (ESD, EM, latch‑up). Generate and maintain layout documentation, checklists, and layout guidelines for internal use. Prepare designs for tapeout, including final checks, documentation, and ### ASIC II - AMZ9679283 - Amazon - Location: Austin, Texas, USA (unspecified) - Salary: $136K-$184K - Posted: 2026-04-06 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10384121/asic-ii-amz9679283 - Excerpt: ASIC II - AMZ9679283 Austin, Texas, USA MULTIPLE POSITIONS AVAILABLE Employer: ANNAPURNA LABS (U.S.) INC. Offered Position: ASIC II Job Location: Austin, Texas Job Number: AMZ9679283 Position Responsibilities: Design and validate signal and power integrity (SI/PI) systems for next generation machine learning ASICs and customized hardware platforms optimized for AWS datacenter environments. Perform both time-domain and frequency-domain simulations using tools such as HSPICE, Cadence Sigrity, HFSS, and Keysight ADS, including 3D/2.5D EMIR analysis. Apply transmission line theory and electromagnetics to develop high-speed interfaces like SerDes and PCIe, resolving complex SI issues across digital systems. Collaborate cross-functionally with silicon, packaging, board design, and validation teams to ensure system-level integrity across PCB, interposers, and advanced SoC power delivery architectures using die-level capacitors (DTC, IPD). Use high-speed lab equipment to validate and correlate simulation results, while debugging prototypes to meet stringent performance requirements. Tackle novel challenges in interconnects and power delivery for large-scale compute environments by proposing innovative, high-impact solutions. Document simulation outcomes, measurement data, and design trade-offs, presenting clear recommendations to both technical and non-technical stakeholders while fostering a culture of continuous learning and engineering excellence Position Requirements: Bachelor's degree or foreign equivalent degree in Electrical or Computer Engineering or related field and two years of experience in the job offered or related occupation. Must have one year of experience in the following skills: (1) using time domain and frequency domain tools: Hspice, Sigrity, HFSS, or Microwave Studio; (2) with PCB, Package, interposers (COWOS) and Silicon Technologies; (3) in Transmission line theory ### Motion Sensing Hardware Engineer - Apple - Location: San Francisco Bay Area, United States of America (unspecified) - Salary: $172K-$302K - Posted: 2026-06-11 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200667481/motion-sensing-hardware-engineer?team=HRDWR - Excerpt: Motion Sensing Hardware Engineer San Francisco Bay Area, United States of America Motion sensors serve as a bridge between the physical and digital realms, facilitating seamless user interaction and motion features. The Motion Sensing Hardware Team at Apple is entrusted with the responsibility of integrating MEMS and magnetic sensing technologies across its product portfolio. This team comprises a collaborative environment that fosters creativity, intelligence, and state-of-the-art technologies. Engineering excellence and meticulous attention to detail are highly valued and encouraged. Invention and patent creation are supported, aiming to revolutionize product design and manufacturing by introducing innovative technologies and exceptional user experiences. As a member of the Motion Sensing Hardware Team, you will play a pivotal role in defining, developing, characterizing, and validating motion sensing systems. Your expertise should encompass sensor technologies with an emphasis on system integration, sensing technology, and performance metrics. You will be responsible for integration of state-of-the-art motion sensors (magnetic, inertial, and pressure) into various Apple products, requiring understanding of sensor architecture, characterization, and validation from concept through manufacturing. You will define sensing system metrics, develop measurement methods, and work cross-functionally to ensure system performance meets feature requirements. The position also demands strong analytical and communication skills to engage with suppliers, troubleshoot complex engineering issues, and align efforts across teams. Evaluate and drive sensor design, technology investigation, manufacturing process development, and system integration. Diagnose engineering issues with true scientific method driving to definitive root cause. Identify, create, and document new sensing system metrics that deliver performance and improvement ### IC Package Design Engineer - Apple - Location: Austin Metro Area, United States of America (unspecified) - Salary: $172K-$302K - Posted: 2026-05-04 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200661057/ic-package-design-engineer?team=HRDWR - Excerpt: IC Package Design Engineer Austin Metro Area, United States of America Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for Apple's internal and custom components across products including iPhone, iPad, Mac, Apple Watch, and Apple TV. We're looking for a Package Design Engineer to drive the physical design and integration of advanced semiconductor packages across SoC, memory, RF, and cellular technologies. You will play a key role in shaping the architecture, scalability, and efficiency of next-generation products while advancing design methodologies through automation and AI. As a Package design engineer, you will lead advanced package architecture, drive next-generation package structure and configuration optimization, and own Package/SiP/module physical design from concept through tape-out. You will collaborate closely with cross-functional teams to deliver optimized SI/PI performance across a wide range of silicon technologies You are expected to leverage AI tools to enhance design efficiency, quality and performance. Perform physical layout of package substrates for diverse silicon, including System-on-Chip (SoC), Memory, RF, and cellular integrated circuits (ICs). Execute parasitic extraction (RLGC) and S-parameter modeling to validate that package designs meet Signal and Power Integrity (SI/PI) performance targets. Lead cross-functional collaboration on package feasibility and system co-optimization; align with Product Design on chip floorplan, System Architecture on package configuration, and Silicon/SIPI teams on electrical performance. Drive package design methodology improvements by evaluating new CAD tools and developing automated design and verification flows to enhance efficiency and streamline the release process. Minimum Qualifications: BS and 10+ years of relevant industry experience Preferred ### Sr. Satellite Payload Hardware Engineer , Amazon Leo - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $137K-$186K - Posted: 2026-03-11 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/3201623/sr-satellite-payload-hardware-engineer-amazon-leo - Excerpt: Sr. Satellite Payload Hardware Engineer , Amazon Leo Redmond, Washington, USA Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: - Own the satellite gateway design from concept through production - Design and optimize different blocks of electronics sub-systems - Design high-speed digital circuitry supporting various SERDES protocols in collaboration with various teams - Lead and review schematic capture and PCB layout - Optimize PCB stack-up for performance and cost - Complete board bring-up and perform test campaigns for different modules and subsystems - Support the transition of the designs to production Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. A day in the life As a Satellite Payload Hardware Engineer, you will lead the design workstream on some of the most innovative, challenging, and exciting gateway systems in industry. You will engage with an experienced team to conceive and design the gateway aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon LEO's various sub-teams and engage third party suppliers to drive product definition, design, ### Staff Hardware Engineer - Viavi Solutions INC - Location: Germantown, MD USA (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://viavisolutions.wd1.myworkdayjobs.com/careers/job/Germantown-MD-USA/Staff-Hardware-Engineer_260004438-1 - Excerpt: Staff Hardware Engineer Germantown, MD USA Summary: VIAVI (NASDAQ: VIAV) is a global provider of network test, monitoring and assurance solutions for telecommunications, cloud, enterprises, first responders, military, aerospace, and railway. VIAVI is also a leader in light management technologies for 3D sensing, anti-counterfeiting, consumer electronics, industrial, automotive, government and aerospace applications. We are the people behind the products that help keep the world connected at home, school, work, at play, and everywhere in between. VIAVI employees are passionate about supporting customer success and we welcome people who bring their best every day to the company - to question, to collaborate and to push for solutions that will delight our customers. Duties & Responsibilities: Job Summary: As a Staff Hardware Engineer at Viavi Solutions Inc., you will be a key contributor to the design, development, and validation of cutting-edge hardware solutions for our advanced network test and measurement products. You will work on complex, high-performance systems from concept to production. Job Responsibilities: Lead the design, schematic capture, and layout supervision of complex digital and analog circuitry, including high-speed interfaces (e.g., PCIe, DDR, Ethernet), FPGAs, microcontrollers, and power management solutions. Conduct detailed design analysis, simulations (e.g., signal integrity, power integrity, thermal), and worst-case scenario analysis to ensure robust and reliable hardware performance. Develop and execute comprehensive hardware test plans, conduct bring-up, debug, and validation of prototypes and production boards. Collaborate closely with cross-functional teams including software, firmware, mechanical, and manufacturing engineers to define requirements, resolve technical issues, and ensure seamless product ### Design Engineer - Sunday - Location: Redwood City, CA, Redwood City, California, United States (unspecified) - Salary: Not disclosed - Posted: 2026-03-16 - Apply: https://jobs.ashbyhq.com/sunday/b3658191-4943-4cd5-b48e-fdc6c84d91ad - Excerpt: Design Engineer Redwood City, CA, Redwood City, California, United States Join Us in Building the Future of Home Robotics At Sunday, we're developing personal robots to reclaim the hours lost to repetitive tasks. We're focused on an ambitious goal to make generalized robots broadly accessible, enabling households to take back quality time. We have spent the last 18 months building a talented team, securing capital, and validating our technology. We are now seeking passionate individuals to join us in the next phase of our growth. If you are ready to apply your skills to the forefront of robotics innovation, we'd love to hear from you. What to Expect We're looking for a Design Engineer to own the design and development of Memo's companion app. This role sits at the intersection of product design, prototyping and software development. You'll rapidly explore interactions, build working prototypes, and collaborate closely with product, software and hardware teams to turn complex system capabilities into simple, intuitive experiences. This role is especially important during our upcoming beta: The app will be how families set up, understand and command their robot. You will define how people interact with robots in a world where robots are everywhere. What You'll Do - Design the Memo companion app experience: Define the interaction for how users prepare their homes and use Memo on a daily basis. - Prototype interaction concepts quickly: Build high-fidelity prototypes and interactive demos. - Develop production features: Implement core parts of the companion app so prototypes can ### Sr. Mechanical Engineer, Annapurna Labs, Machine Learning Hardware - Amazon - Location: Austin, Texas, USA (unspecified) - Salary: $159K-$215K - Posted: 2026-02-27 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/3191937/sr-mechanical-engineer-annapurna-labs-machine-learning-hardware - Excerpt: Sr. Mechanical Engineer, Annapurna Labs, Machine Learning Hardware Austin, Texas, USA Annapurna Labs (our organization within Amazon) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. As a member of the Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you'll work with thought leaders in multiple technology areas. You'll have high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve your products performance, quality and cost. We're changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today. Key job responsibilities As a Thermal/Mechanical Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge ### Staff Backline Engineer - Platform - Databricks - Location: Mountain View, California; San Francisco, California (unspecified) - Salary: $170K-$256K - Posted: 2026-03-17 - Apply: https://databricks.com/company/careers/open-positions/job?gh_jid=8465439002 - Excerpt: Staff Backline Engineer - Platform Mountain View, California; San Francisco, California P-1399 Recruiter: Stephanie Williams Hiring Manager: Ratish Maruthiyodan At Databricks, we are passionate about enabling Data & AI teams to solve the world's toughest problems - from making the next mode of transportation a reality to accelerating the development of medical breakthroughs. We do this by building and running the world's best data and AI infrastructure platform so our customers can use deep data insights to improve their business. Founded by engineers, we leap at every opportunity to tackle technical challenges, from designing next-gen UI/UX for data interaction to scaling our services and infrastructure across millions of virtual machines. And we're only getting started. About the Team: The Backline Engineering Team serves as the critical bridge between Frontline Support and Engineering. We handle complex technical issues and escalations across the Data and AI ecosystem. With a strong focus on customer success, we are committed to delivering exceptional customer satisfaction by providing deep technical expertise, proactive issue resolution, and continuous platform improvements. We emphasize automation and tooling to enhance troubleshooting efficiency, reduce manual efforts, and improve the overall supportability of the platform and the health of our products. By developing smart solutions and streamlining workflows, we drive operational excellence and ensure a delightful experience for both customers and internal teams. What your impact will be: - Act as the ultimate technical escalation point, driving the resolution of the most complex, high-stakes customer issues on the Databricks Platform through deep analysis ### Mechanical Engineer, Annapurna Labs, Machine Learning Hardware - Amazon - Location: Austin, Texas, USA (unspecified) - Salary: $136K-$184K - Posted: 2026-06-05 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10440713/mechanical-engineer-annapurna-labs-machine-learning-hardware - Excerpt: Mechanical Engineer, Annapurna Labs, Machine Learning Hardware Austin, Texas, USA Annapurna Labs (our organization within Amazon) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. As a member of the Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you'll work with thought leaders in multiple technology areas. You'll have high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve your products performance, quality and cost. We're changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today. Key job responsibilities As a Thermal/Mechanical Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data ### Mechanical Engineer Annapurna Labs , Annapurna Labs, Artificial Intelligence Hardware - Amazon - Location: Austin, Texas, USA (unspecified) - Salary: $136K-$184K - Posted: 2026-02-17 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/3183160/mechanical-engineer-annapurna-labs-annapurna-labs-artificial-intelligence-hardware - Excerpt: Mechanical Engineer Annapurna Labs , Annapurna Labs, Artificial Intelligence Hardware Austin, Texas, USA Annapurna Labs (our organization within Amazon) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. As a member of the team, you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you'll work with thought leaders in multiple technology areas. You'll have high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve your products performance, quality and cost. We're changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today. Key job responsibilities As a Thermal/Mechanical Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data ### Senior Product Designer, Transit Operations - Via - Location: New York City (unspecified) - Salary: $175K-$200K - Posted: 2025-03-06 - 401(k) match: listed (not source-backed) - Apply: https://job-boards.greenhouse.io/via/jobs/7896438002 - Excerpt: Senior Product Designer, Transit Operations New York City Via is a global leader in smart transportation, using technology to revolutionize mobility worldwide. Our impact ranges from transforming individual daily commutes to reducing humanity's collective environmental footprint-we're driven by ambitious goals. This is an opportunity to join a core team that's reshaping how mobility operates. We are looking for a Senior Product Designer to work on our Transit Operations platform who will lead design for a complex set of products and features such as our booking and dispatching modules that impact our primary user and buyer - public sector transit agencies, municipalities and governments. Via prides itself on being a true partner to the public sector in helping make transit better for everyone but especially those in low income and minority communities. Via is not only a category leader in on-demand transit but has brought its exceptional technology and expertise to the Paratransit & Student transit world. You will be joining Via at a time of rapid growth, impacting hundreds of thousands of riders weekly, many of whom represent special needs populations, students, caregivers etc. As a Senior Product Designer you will bring vision but also sensitivity and empathy to these users, respectfully build products that help make their trips easier and help transit agencies achieve their mission of equitable transportation. What you'll do: - Be the designer who charts the path for extending Via's industry leading transit dispatch platform from on-demand to paratransit, school buses and fixed lines. - Design ### Senior Principal Analog Design Engineer - Northrop Grumman - Location: United States-California-Woodland Hills (unspecified) - Salary: $142K-$213K - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Relocation assistance: yes (not source-backed) - Childcare support: yes (not source-backed) - Learning budget: yes (not source-backed) - Apply: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-California-Woodland-Hills/Senior-Principal-Analog-Design-Engineer_R10218132 - Excerpt: Senior Principal Analog Design Engineer United States-California-Woodland Hills RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! We are looking for you to join our team as an Analog Design Engineer based out of Woodland Hills, CA. As a Analog ### Hardware Quality Engineer - CHAOS Industries - Location: Hawthorne, California, United States (unspecified) - Salary: $120K-$170K - Posted: 2026-04-17 - Apply: https://job-boards.greenhouse.io/chaosindustries/jobs/5112064007 - Excerpt: Hardware Quality Engineer Hawthorne, California, United States CHAOS Industries is redefining modern defense with a multi-product portfolio that gives the ultimate advantage-domain dominance. The company's products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. CHAOS Industries was founded in 2022 and has raised a total of $1 billion in funding from leading investors, including 8VC, Accel, and Valor Equity Partners. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, San Diego, Seattle, and London. For more information, please visit www.chaosinc.com . Role Overview: - Act as lineside quality authority for hardware inspection and acceptance · Own in-process and final inspection, buy-offs, and release decisions · Ensure hardware meets drawing, spec, and workmanship requirements · Execute quality control within ERP/MES systems (review, sign-off, traceability) · Serve as primary POC for manufacturing quality issues on the floor Responsibilities: - Inspection & Buy-Off Authority - Perform in-process and final inspection of hardware (mechanical + electrical) - Execute first article inspection (FAI) and verification against drawings/specs - Approve/reject hardware and sign off on build completion - Quality Control Execution - Review travelers, routers, and build records in ERP/MES - Ensure traceability, configuration, and documentation are complete and accurate - Enforce workmanship standards (IPC, internal specs) - Nonconformance & Disposition - Identify, document, and segregate nonconforming material - Support MRB and disposition activities - Drive immediate containment on the floor - ### Senior CAD Engineer - Cisco - Location: 2 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Caesarea-Israel/Senior-CAD-Engineer_2003345 - Excerpt: Senior CAD Engineer 2 Locations Silicon One is seeking a CAD Engineer to join the Cisco Silicon One Physical Design team. Meet the Team You'll be part of the Cisco Silicon One team, which is at the heart of Cisco's software and ASIC design efforts. As part of our team, you'll contribute to the development of our next-generation network devices-Cisco Silicon One™. Our team operates in a startup-like environment within a stable and leading corporation. Our design center is uniquely equipped, hosting all silicon hardware and software development fields under one roof. We are revolutionizing the industry by building a new internet for the 5G era, providing a unified, programmable silicon architecture that serves as the foundation for all of Cisco's future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, catering to both fixed and modular platforms. They deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility. Cisco Silicon One is a ground-breaking, groundbreaking technology that will serve our customers and end users for decades to come. The Internet now has a new, faster, better, and safer engine! Your Impact You'll be joining our Physical Design team within Cisco Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs. Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, ### Power Electronics Engineer - Heart Aerospace - Location: Los Angeles, CA (hybrid) - Salary: $124K-$216K - Posted: 2025-08-11 - Apply: https://job-boards.greenhouse.io/heartaerospace/jobs/4013303009 - Excerpt: Power Electronics Engineer Los Angeles, CA At Heart Aerospace we develop the ES-30, a regional hybrid-electric airplane with a capacity of 30 passengers, an electric zero-emission range of 200 km and an extended hybrid range of 400 km. Heart is targeting type certification of the ES-30 by the end of the decade. Your mission We are seeking a highly motivated Power Electronics Engineer to join our Propulsion team. You will lead the design and integration of the hybrid propulsion, including but not limited to the inverters, motors, HV cables, with batteries, and in parallel with Turbomachinery. You will interface across mechanical, thermal, electrical, and flight control systems to deliver a fully integrated and certifiable hybrid Electric Propulsion Unit (EPU). Key responsibilities include but are not limited to: - This role is a Responsible Engineer (RE) who focuses on the integration of power electronics and high voltage electrical systems into our hybrid aircraft. - Full ownership over design, fabrication, commissioning, and certification of the hybrid propulsion system. - Lead and execute system-level tests, such as motor and propeller test stands. - Collaborate with suppliers to ensure delivery of integrated, certifiable subsystems. - Model the electrical and power electronics systems in to our high fidelity Digital Twin for optimization of our hybrid mission profile. - Perform topology selection trade studies. You'll Bring These Qualifications: - 2+ years of professional experience working with power electronics components. - Strong experience in high voltage power electronics design (+800V) including AC/DC inverters, and DC/DC converters. - ### Senior Signal/Power Integrity Hardware Engineer (Onsite) - Cisco - Location: San Jose, California, US (onsite) - Salary: $152K-$222K - Posted: 2026-05-28 - 401(k) match: listed (not source-backed) - Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/San-Jose-California-US/Senior-Signal-Power-Integrity-Hardware-Engineer--Onsite-_2012469 - Excerpt: Senior Signal/Power Integrity Hardware Engineer (Onsite) San Jose, California, US The application window is expected to close on: 06/26/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . This position requires that you commute to our San Jose, CA office 5 days per week. Meet the Team The Cisco Service Provider SI team is seeking a Senior Signal Integrity Engineer for the design and analysis of high-speed components, interfaces, and power distribution network. As a member of the Service Provider SI team, you will help develop the Next Generations of Cisco Switch products, be a part of the definition and design of current and next generation ASIC, package, printed circuit board (PCB), and system interconnect. You will be working in a larger team working closely with system architects, logic designers, ASIC engineers, package engineers, and versatile and knowledgeable SI/PI engineers in the creation of next-generation networking products. Your Impact High-speed link modeling and simulation, including high-speed I/O, IC package,e and system interconnections. Modeling and analyzing power delivery networks. Electromagnetic modeling of complex 3-dimensional structures. Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs. Write signal integrity design guidelines, test plan, and test report. Decide appropriate PCB material, stack-up, and work with vendors to address any DFM issues. Support prototype function bring-up, validation, and troubleshooting. Address signal integrity challenges on system high-speed interconnections, clock, power, etc. Work closely with other hardware function teams including ### Design Verification Lead - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $172K-$306K - Posted: 2025-12-17 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200635870/design-verification-lead?team=HRDWR - Excerpt: Design Verification Lead Cupertino, United States of America Are you a leader and want to apply your engineering background to make big things happen, and can you influence, connect, get results and communicate effectively while delivering on a predictable and dynamic schedule? The Custom Silicon Management Group provides critical custom silicon for all mobile products including iPhone, iPad, iPod, and AppleTV. We have an extraordinary opportunity for senior level engineers to drive and lead technical engagements between Apple and silicon suppliers working on groundbreaking technologies! We are looking for a remarkable Design Verification Lead to work with multi-functional teams and external vendors to define, develop and productize the next generation of mobile solutions. Imagine yourself at the center of our hardware development effort! We collaborate with all teams, playing a strategic role of getting functional products to millions of customers quickly. As a CSM (Custom Silicon Management) DV lead, you will be leading the DV front for vendor silicons (power, display, touch and sensors, accessories). You will manage throughout the entire project phase, from specification, planning, execution, to sign-off. Work closely with internal & external teams to review specifications, improve DV plans & methodologies, and ensure full verification coverage. Collaborate with design & micro-architecture teams to understand the functional & performance goals of the design. Lead and track DV progress and quality. Review DV architecture, implementation, metrics. Provide technical guidance to planning, execution, and long term technology roadmap. Minimum Qualifications: BS degree and 10 years of industry experience. Experience with ### CAD Engineer - PDV - Apple - Location: Austin, United States of America (unspecified) - Salary: $147K-$272K - Posted: 2026-01-29 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200644242/cad-engineer-pdv?team=HRDWR - Excerpt: CAD Engineer - PDV Austin, United States of America Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a member of our CAD team, you will architect, develop, maintain and improve physical design verification (PDV) flows. The role requires you to work on flow and runset development for various technology nodes and tool sets. Working alongside the CAD team, you will be collaborating with the custom digital/analog/mixed-signal design, physical design (PD) and chip integration teams. With good understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, you will develop rule decks from scratch and/or modify existing ones. You will also have opportunities to develop ML/LLM based automations and solutions. -Develop, improve and maintain various aspects of physical verification flow and methodology -Coordinate the effort of validating flows, improving for custom checks and data generation -Work with the design and PD teams to facilitate the chip design process -Code custom PDV rule decks such as Electrical rule checks (ERC) and Programmable ERCs -Collaborate ### Packaging Engineer (Substrate Design and Layout, Only open for fresh graduate) - SanDisk - Location: Taichung, Taichung City, Taiwan (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://jobs.smartrecruiters.com/Sandisk/744000126616429-packaging-engineer-substrate-design-and-layout-only-open-for-fresh-graduate- - Excerpt: Packaging Engineer (Substrate Design and Layout, Only open for fresh graduate) Taichung, Taichung City, Taiwan Company Description: Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description: Participate in the development of package design and advanced substrate layout for products. Learn and become proficient in EDA layout tools (e.g., Cadence SIP/Allegro) to perform package and substrate drawing, design modifications, and related engineering tasks. Perform basic routing planning, layer stack‑up configuration, and design‑for‑manufacturability (DFM) checks based on established design rules and manufacturing requirements. Collaborate with cross‑functional engineering teams-including hardware, manufacturing, and packaging-to support ### Engineer I, Electromechanical (R4951) - Shield AI - Location: San Diego, California (unspecified) - Salary: Not disclosed - Posted: 2026-05-07 - 401(k) match: listed (not source-backed) - Apply: https://jobs.lever.co/shieldai/37f1de6d-d17b-437b-af16-d8ce8d7d0782 - Excerpt: Engineer I, Electromechanical (R4951) San Diego, California Founded in 2015, Shield AI is a venture-backed defense-tech company with the mission of protecting service members and civilians with intelligent systems. Its products include Hivemind autonomy software and V-BAT and X-BAT aircraft. With offices and facilities across the U.S., Europe, the Middle East, and Asia-Pacific, Shield AI's technology actively supports operations worldwide. For more information, visit www.shield.ai. Follow Shield AI on LinkedIn, X, Instagram, and YouTube. Job Description: Shield AI is redefining autonomous aviation with cutting-edge AI and GPS/RF-denied navigation technologies. Now, we're building a next-generation aircraft like no other-one that will push the boundaries of innovation and performance. We are looking for an Engineer I - Electromechanical to join our team, focused on the design and integration of avionics systems and driving designs from concept to production. If you thrive in fast-paced environments, excel in cross-functional collaboration, and are passionate about building high-performance avionics systems, we want to hear from you. Job Description: Shield AI is redefining autonomous aviation with cutting-edge AI and GPS/RF-denied navigation technologies. Now, we're building a next-generation aircraft like no other-one that will push the boundaries of innovation and performance. We are looking for an Engineer I - Electromechanical to join our team, focused on the design and integration of avionics systems and driving designs from concept to production. If you thrive in fast-paced environments, excel in cross-functional collaboration, and are passionate about building high-performance avionics systems, we want to hear from you. Founded in 2015, Shield ### MTS Digital Design Engineer - ON Semiconductor - Location: San Jose, CA, United States (unspecified) - Salary: Not disclosed - Posted: 2026-05-20 - Apply: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505510 - Excerpt: MTS Digital Design Engineer San Jose, CA, United States MTS Digital Design Engineer ### FE RTL Infrastructure - CAD Engineer - Apple - Location: Beaverton, United States of America (unspecified) - Salary: $147K-$272K - Posted: 2026-06-11 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200667875/fe-rtl-infrastructure-cad-engineer?team=HRDWR - Excerpt: FE RTL Infrastructure - CAD Engineer Beaverton, United States of America Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices! As a Front-End (FE) RTL Infrastructure - CAD Engineer, you will play a major role in developing and supporting a reliable infrastructure and work environments that design and verification teams use for modifying, analyzing, and verifying RTL. In this role, you will support RTL gatekeeping infrastructure of design and verification collateral as well as soft IP development and release methodologies. Additionally, you will contribute to Perforce administration, ensuring the integrity and performance of our version control ecosystem. You will have the opportunity to maintaining a centralized configuration management system that enables different design views to be loaded into any Front-End flow. An important key aspect of this position is driving innovation through building generative AI solutions across all of these systems and identifying opportunities where AI can accelerate engineering productivity and improve infrastructure reliability. You role will also involve managing internal training materials, keeping them up to date and coordinating vendor trainings so that our ### Hardware Systems Engineering Lead – Biophotonics - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $181K-$318K - Posted: 2026-05-02 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200658880/hardware-systems-engineering-lead-biophotonics?team=HRDWR - Excerpt: Hardware Systems Engineering Lead – Biophotonics Cupertino, United States of America Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish! Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Do you love working on challenges that no one has solved yet? This role is all about making systems that have never been made before. Working with cross-functional engineering teams to define new prototype systems, design electronics that implement them, build them, and validate them. This role requires an engineer who is familiar with a full development cycle, who thrives when distilling clarity from uncertainty, and who can coordinate effectively across organizations, some international. You will be expected lead electrical engineering initiatives by example, drawing upon your previous experience and adapting to the unique needs of the program. As appropriate, you will be expected to manage individuals and guide their work as well as their growth. Design and validate high-performance analog/mixed signal circuits that interface with state of the art optical components and meet high level system requirements Implement ### Senior Staff Digital Design Engineer - Renesas Electronics - Location: Prague, , Czechia (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000129955429-senior-staff-digital-design-engineer - Excerpt: Senior Staff Digital Design Engineer Prague, , Czechia Company Description: Job Description: We are seeking a highly experienced Digital Design Engineer to join our IC development team and contribute to our successful record of defining and developing market leading complex power management solutions. Job duties: Collaborate with marketing and customers to define system-level requirements and IC specifications Propose innovative and creative solutions to achieve the required specifications Develop, debug and verify digital designs in pre and post silicon environment Oversee digital backend design, including synthesis, STA, P&R and logic equivalence checking Collaborate on block integration in complex mixed-signal designs Coach and mentor junior team members Qualifications: 12+ years of relevant industry experience in FPGA or IC design MSc/PhD university degree Proficiency in HDL languages - Verilog, SystemVerilog or VHDL Experience in architecting digital designs and writing device-level or sub-system specifications Competence in developing design constraints for synthesis, STA and P&R hand-off Experience with gate-level simulations and debug Knowledge of advanced verification methodologies (e.g. UVM) Good communication skills in English Will be a plus : Proficient in programming/scripting (Perl, Python, Skill, TCL, C/C++, etc.) Exposure to mixed signal designs with basic understanding of analog circuits Expertise in digital backend design flow (synthesis / STA / P&R) Familiarity with DFT insertion and ATPG generation Working experience with Cadence or Synopsys design tools Experience implementing and verifying ECOs on post-route netlist Additional Information: Renesas is an embedded semiconductor solution provider driven by its Purpose ' To Make Our Lives Easier .' As the ### RF Electrical Engineer - General Dynamics - Location: Scottsdale, AZ, US (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://careers-gdms.icims.com/jobs/70998/rf-electrical-engineer/job - Excerpt: RF Electrical Engineer Scottsdale, AZ, US Basic Qualifications Education Requirements: Requires a Bachelor's degree in Electrical Engineering, or a related Science, Engineering or Mathematics field. Also requires 2+ years of job-related experience or a Master's degree plus 6 months relevant experience. Clearance Requirements: Ability to obtain a Department of Defense Top Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. Responsibilities for this Position ROLE AND POSITION OBJECTIVES: As an RF electrical engineer for Tactical Communications, you'll be a member of a cross functional team responsible for providing rapid prototype mission critical solutions to our customer community. Duties and Tasks: RF Design & Product Development: RF PCB schematic and layout design Hands-on lab work optimizing and evaluating RF circuits using state of the art tools and test equipment. Design and evaluation of RF front ends, IF sections, filters, phase-locked loops, AGC loops, synthesizers, power amplifiers, etc... Design Automation Tools: ex. Keysight ADS, Cadence, Matlab, etc. Substantial contribution to: Analysis and/or definition of electrical requirements, RF performance, components, and interfaces. Formulating, evaluating, implementing solutions to technical issues Technical reviews ### Principal/ Sr. Principal Engineering Design - Northrop Grumman - Location: United States-Illinois-Rolling Meadows (unspecified) - Salary: $96K-$144K - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Relocation assistance: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Principal--Sr-Principal-Engineering-Design_R10212344 - Excerpt: Principal/ Sr. Principal Engineering Design United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE TYPE: SAP TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered by providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! Northrop Grumman offers challenging career opportunities in Hardware Engineering within the Mission Systems Sector that play a key role in the mission to ### Sr. Principal PWB Design Engineer - Northrop Grumman - Location: United States-Illinois-Rolling Meadows (unspecified) - Salary: $123K-$185K - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Relocation assistance: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-Illinois-Rolling-Meadows/Sr-Principal-PWB-Design-Engineer_R10218767 - Excerpt: Sr. Principal PWB Design Engineer United States-Illinois-Rolling Meadows RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE TYPE: Secret TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman Mission Systems is a trusted provider of mission-enabling solutions for global security. Our Engineering and Sciences (E&S) organization pushes the boundaries of innovation, redefines engineering capabilities, and drives advances in various sciences. Our team is chartered by providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission! Northrop Grumman offers challenging career opportunities in Hardware Engineering within the Mission Systems Sector that play a key role in the mission to ### CAD/Methodology Physical Design Team Lead - ThousandEyes - Location: Bangalore, India (unspecified) - Salary: Not disclosed - Posted: 2026-05-19 - Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Bangalore-India/CAD-Methodology-Physical-Design-Team-Lead_2013215/apply - Excerpt: CAD/Methodology Physical Design Team Lead Bangalore, India Join our team as a Senior Physical Design Team Lead and drive innovation in Cisco Silicon One. Lead a talented CAD team, develop advanced physical design methodologies, and shape the future of next-generation network devices. If you have deep expertise in PnR, SoC, and team leadership, this is your opportunity to make a significant impact. ### IT Network Infrastructure Engineer, Launch - SpaceX - Location: Starbase, TX (unspecified) - Salary: Not disclosed - Posted: 2026-03-11 - Apply: https://boards.greenhouse.io/spacex/jobs/8458745002?gh_jid=8458745002 - Excerpt: IT Network Infrastructure Engineer, Launch Starbase, TX SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. IT NETWORK INFRASTRUCTURE ENGINEER, LAUNCH As a Network Infrastructure Engineer at SpaceX, you will work in a complex environment designing and supporting a variety of IT systems critical for Starship launch pads. This position will require you to design, install, and maintain the physical cabling, network hardware, on-premises compute, electrical enclosures, and data center environments that together make up our mission critical control networks. You will work directly with the launch automations & controls teams to provide reliable and robust connectivity to their critical control systems. The fiber and copper data network cabling that you will design must survive extreme launch environments to carry operational voice, video, vehicle/payload commanding, ground support equipment telemetry, and the rest of the data needed to launch Starship in high-cadence, airport-like operations to enable life beyond Earth. RESPONSIBILITIES: - Be an extreme owner of network infrastructure including product selection, procurement, configuration, install, and troubleshooting - Monitor network health, troubleshooting, and determining root cause of system issues as they arise - Perform job walks with customers, vendors, and contractors to gather requirements and create project implementation plans - Closely collaborate with stakeholders and engineers across programs to create highly operable, scalable, and ### HW Dev Engineer-Payload, Leo PAA Hardware - Amazon - Location: Redmond, Washington, USA (unspecified) - Salary: $117K-$160K - Posted: 2026-03-16 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/3205568/hw-dev-engineer-payload-leo-paa-hardware - Excerpt: HW Dev Engineer-Payload, Leo PAA Hardware Redmond, Washington, USA Amazon LEO is an initiative to increase global broadband access through a constellation of 3,236 satellites in low Earth orbit (LEO). Its mission is to bring fast, affordable broadband to unserved and underserved communities around the world. Amazon LEO will help close the digital divide by delivering fast, affordable broadband to a wide range of customers, including consumers, businesses, government agencies, and other organizations operating in places without reliable connectivity. As an Hardware Engineer, you will have the opportunity to work on some of the most innovative, challenging, and exciting phased array antenna systems in industry right now. You will engage with an experienced team to conceive and design phased arrays aimed at delighting customers with affordable, reliable, high bandwidth connectivity. You will work closely with Amazon Leo's various sub-teams and engage third party suppliers to drive product definition, design, optimization, implementation, and test. The Hardware Engineer will have a complete understanding of how their design changes impact downstream partners such as operations, supply chain, product management, and reliability. Amazon strongly believes in Ownership and you will have the opportunity to own your designs from concept through production. You will own or contribute to the following: Own PCBA development from concept through production Design and optimize different blocks of electronics sub-systems Design high-speed digital and/or RF circuitry in collaboration with various teams Lead and review schematic capture and PCB layout Lead PCB vendor engagement for DFM review Optimize PCB stack-up for ### Senior STA CAD/Methodology Engineer - Cisco - Location: Armenia (hybrid) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Armenia/Senior-STA-CAD-Methodology-Engineer_1451957 - Excerpt: Senior STA CAD/Methodology Engineer Armenia This is a hybrid role with four days per week at Cisco's Yerevan office. Meet the Team Join the Silicon One Team at Cisco, a group at the forefront of developing Cisco's groundbreaking silicon architecture. We are a collaborative unit focused on pushing the boundaries of ASIC design for advanced process nodes. As part of our team, you will contribute to defining innovative Physical Design methodologies and creating robust flows essential for developing our complex chips. You will also have the opportunity to work hands-on with the Physical Design of intricate chip partitions. Your Impact This role as a Static Timing Analysis (STA) CAD/Methodology Engineer on Cisco's Silicon One Engineering team offers a key opportunity to enable the next generation of high-performance networking SoCs and ASICs. You will lead the development of scalable STA flows and automation, enhancing the efficiency and quality of design processes. Working at the intersection of design, methodology, and infrastructure, you will help establish best practices and drive innovation within a leading silicon organization. Architect, develop, and maintain static timing analysis (STA) methodologies and flows to support full-chip and hierarchical signoff for high-speed networking ASICs. Support timing closure for SoCs with complex clocking structures, high-speed interfaces, and large-scale integration. Develop robust SDC management, checking, and validation infrastructure across multi-mode, multi-corner (MMMC) scenarios. Build and optimize automation scripts and infrastructure (TCL, Python, Makefiles, etc.) to scale timing flows for enterprise-level SoC programs. Collaborate with RTL design, DFT, P&R, and signoff teams to ### Product Design Engineer - Core Systems - Apple - Location: Cupertino, United States of America (unspecified) - Salary: $127K-$221K - Posted: 2026-05-14 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200662717/product-design-engineer-core-systems?team=HRDWR - Excerpt: Product Design Engineer - Core Systems Cupertino, United States of America Be an integral part of a small and visible team of world-class Mechanical Engineers making Apple's first wearable product line. As a member of the Watch design team, you will build the next generation of the world's most advanced wearable device. You will work closely with cross-functional teams like Industrial Design, Electrical Engineering, Antenna, Reliability, Sensors, Environmental, and Marketing to bring future products to life. The Watch Product Design team is responsible for all of the mechanical parts that make up the Watch in all sizes and materials. We are looking for someone who is passionate about engineering and thrives on innovation to help build the next generation of the world's most innovative mobile devices. This role is for someone with strong mechanical design skills, an ability to lead projects in a multi-functional setting, and excellent communication skills with both vendors within Asia and internal teams at Apple. The role will require the ability to deliver outstanding design solutions while balancing multiple priorities on demanding schedules. You will be responsible for building prototypes for design validation and driving failure analysis. Minimum Qualifications: Bachelorʼs in mechanical engineering or related discipline A solid understanding of engineering fundamentals [heat transfer, mechanics of materials, etc] Understanding of tight-tolerance fabrication and assembly techniques, mechanical drawing composition (functional dimensioning and tolerance stack-up analysis) Experience in Design for Manufacturability (DFM), Design for Assembly (DFA) and statistical tolerance analysis techniques CAD and drawings (GD&T) Working knowledge of ### RF/Analog/Mixed Signal IC Design Engineer - Apple - Location: San Diego, United States of America (unspecified) - Salary: $172K-$302K - Posted: 2026-04-21 - 401(k) match: listed (not source-backed) - Apply: https://jobs.apple.com/en-us/details/200659202/rf-analog-mixed-signal-ic-design-engineer?team=HRDWR - Excerpt: RF/Analog/Mixed Signal IC Design Engineer San Diego, United States of America We are seeking a highly skilled RF, Analog, and Mixed Signal Engineer to join our engineering team. The ideal candidate will possess strong analytical abilities, a passion for innovation, and extensive experience in designing and implementing RF/mmW and/or analog/mixed-signal circuits. Our team is responsible for all aspects of silicon development for cellular transceivers, with a particular emphasis on highly integrated and efficient designs and technologies that transform the user experience at the product level. This highly visible role puts you at the center of a silicon design group with a critical impact on getting functional products to hundreds of millions of customers quickly! As an RF IC design engineer, you will be responsible for providing RF solutions for cellular transceiver chips. Responsibilities include: Working with platform architects, system, and digital design groups to define the requirements for RF and baseband blocks based on the system requirements. Collaborating with the technology team on process selection for the target device. Driving transistor-level feasibility studies of RF/mixed-signal circuit blocks and architectures. Designing various component blocks inside the RF transceiver, including LNA, upconverters/downconverters, baseband filters, VGAs, LO/PLL circuits, driver amplifiers/power amplifiers, linear RF switches, attenuators, low noise regulators, amplifiers, and biasing circuits. Working closely with the mask design team to implement layout views of designs. Minimum Qualifications: BS and 10+ years of relevant industry experience required. Preferred Qualifications: Direct experience designing and bringing into mass production highly integrated cellular RF transceivers in deep ### Staff Hardware Systems Engineer, Watches - Google - Location: Mountain View, CA, USA (unspecified) - Salary: $188K-$275K - Posted: 2026-06-10 - Parental leave: 18 weeks (not source-backed) - Non-birth-parent leave: 18 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckeY1r0w0ur1-nKsva0IqCwQ6TgXKobHHlCCDazuCcARCEjsACxwdTNtuySJPovn9kzNNj6K9MIPdKMSvRVfd9am24Jp1YwYOFoboCJ3EsyLmVo-c-f9_jAQmSINcwA%3D%3D_V2&loc=US&title=Staff+Hardware+Systems+Engineer - Excerpt: Staff Hardware Systems Engineer, Watches Mountain View, CA, USA The Pixel Watch Electrical Engineering (EE) team is responsible for the end-to-end hardware development of Google's first-party (1P) Watch products. We work with product managers during initial concept and design phases, guide new technology investigations, and manage the entire hardware lifecycle-from board integration and comprehensive validation to overseeing manufacturing to deliver products with an advanced user experience and health sensing capabilities. We are seeking a highly skilled and visionary Electrical Engineer to lead the hardware integration and electrical architecture for our next-generation hardware. In this role, you will be the technical anchor for form factor integration, strategizing how to partition silicon into compact enclosures while maximizing power efficiency and thermal performance. You will operate at the intersection of electrical, mechanical, and systems engineering, pushing the boundaries of what is physically possible. You will be solving multi-dimensional hardware puzzles, driving architectural convergence across teams, and turning New Technology Introductions (NTIs) into mass-produced reality. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $188000 - $275000 (USD) + 20% bonus target + bonus + equity + benefits Learn more about benefits at Google . Drive end-to-end electrical architecture for space-constrained devices, leveraging advanced packaging technologies like System in Package (SIP) and rigid-flex to maximize density and minimize Z-height. Act as the technical linchpin, collaborating with mechanical, Radio Frequency (RF), sensors, and display teams to resolve physical layout collisions and foster architectural convergence. Lead data-driven trade-offs balancing ### Sr. Physical Design Engineer, Annapurna Labs - Amazon - Location: Cupertino, California, USA (unspecified) - Salary: $183K-$248K - Posted: 2026-05-01 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10409016/sr-physical-design-engineer-annapurna-labs - Excerpt: Sr. Physical Design Engineer, Annapurna Labs Cupertino, California, USA Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers). Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs. Key job responsibilities - Work with RTL/logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO/Core subsystem/block physical implementation through synthesis, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off - Develop physical design methodologies - Evaluate 3rd party IP and provide recommendations - Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as ### Electrical Engineer, Meta Neural Band - Meta - Location: Sunnyvale, CA; New York, NY (unspecified) - Salary: $118K-$170K - Posted: 2026-06-07 - 401(k) match: listed (not source-backed) - Apply: https://www.metacareers.com/jobs/1387810479836665/ - Excerpt: Electrical Engineer, Meta Neural Band Sunnyvale, CA; New York, NY As a Hardware Electrical Engineer at Meta, you will design, develop, and integrate electrical systems for a wide range of applications, from next-generation consumer hardware to large-scale infrastructure. You will collaborate with cross-functional teams-including mechanical, optical, firmware, software, and manufacturing experts-to deliver impactful solutions. Your work may span the full product or system lifecycle, from early prototyping and feasibility studies to large-scale deployment. You will be part of an environment that values technical development, rapid iteration, and creative problem-solving. Responsibilities: - Design, develop, and validate electrical subsystems or simple systems for Meta's hardware products, with increasing independence - Create schematics, direct board layout, and participate in design reviews - Document requirements, specifications, and test criteria for modules and systems - Conduct feasibility studies and analysis to evaluate new technologies and components - Support manufacturing builds, hardware bring-up, and troubleshooting activities - Collaborate across engineering disciplines (mechanical, firmware, software, etc.) to deliver integrated solutions - Troubleshoot and resolve electrical performance and reliability issues - Demonstrate sustained productivity and ownership of assigned areas - Build collaborative relationships with cross-functional partners and contribute to team-level goals - Participate in process improvement, knowledge sharing, and organizational activities as appropriate Minimum qualifications: - Bachelor's or Master's degree in Electrical Engineering, or relevant technical field, and/or equivalent practical experience - 2+ years of experience in electrical design or a relevant technical field - Proven knowledge of electrical engineering fundamentals and circuit and/or system design - Experience ### System Architect - Sensors - Wayve - Location: Sunnyvale (unspecified) - Salary: $252K-$298K - Posted: 2026-05-19 - Apply: https://wayve.firststage.co/jobs?gh_jid=8549956002 - Excerpt: System Architect - Sensors Sunnyvale About us Founded in 2017, Wayve is the leading developer of Embodied AI technology. Our advanced AI software and foundation models enable vehicles to perceive, understand, and navigate any complex environment, enhancing the usability and safety of automated driving systems. Our vision is to create autonomy that propels the world forward. Our intelligent, mapless, and hardware-agnostic AI products are designed for automakers, accelerating the transition from assisted to automated driving. In our fast-paced environment big problems ignite us-we embrace uncertainty, leaning into complex challenges to unlock groundbreaking solutions. We aim high and stay humble in our pursuit of excellence, constantly learning and evolving as we pave the way for a smarter, safer future. At Wayve, your contributions matter. We value diversity, embrace new perspectives, and foster an inclusive work environment; we back each other to deliver impact. Make Wayve the experience that defines your career! The Role Wayve is seeking a Sensor Systems Architect within the Product & Delivery (P&D) organisation to own the definition and integration of sensor systems as part of the end-to-end autonomy stack. This role focuses on system-level sensing requirements and integration, ensuring that sensor configurations are optimised for driving use cases, ODD coverage, and autonomy performance across customer programs. You will work closely with Hardware teams-who lead component-level benchmarking, sensor evaluation, and base image quality-to translate system needs into production-ready sensor configurations and vehicle integration strategies. You will act as the owner of the sensor-model-performance boundary at system level, ensuring ### Layout Verification / PEX Engineer - PsiQuantum - Location: Palo Alto, California, United States (unspecified) - Salary: $110K-$150K - Posted: 2026-06-09 - 401(k) match: listed (not source-backed) - Apply: https://www.psiquantum.com/apply?gh_jid=7767640003 - Excerpt: Layout Verification / PEX Engineer Palo Alto, California, United States PsiQuantum's mission is to build the first useful quantum computers-machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. Our architecture and approach is based on silicon photonics. By leveraging the advanced semiconductor manufacturing industry-including partners like GlobalFoundries-we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photons don't feel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. In 2024, PsiQuantum announced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining-and that now is the time to scale. PsiQuantum also develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Quantum computing is not an extension of classical computing. It represents a fundamental shift-and a path to mastering challenges that --- Source-backed benefit claims include source links; other benefit values are labeled separately.