# FewerJobs export - 100 curated jobs
Generated: 2026-08-14T10:27:52.911Z
Source: https://fewerjobs.com

## Filters applied
- **q**: CircleCI
- **quality_floor**: default
- **match_401k_strict**: true
- **parental_strict**: true
- **non_birth_strict**: true
- **pto_strict**: true
- **include_older**: false
- **apply_url_verified**: false
- **page**: 5
- **per_page**: 100
- **sort**: relevance

## Jobs
### SoC Debug and Trace Architect - TensTorrent
- Location: Toronto, Ontario, Canada (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-21
- Apply: https://job-boards.greenhouse.io/tenstorrent/jobs/5143663007
- Excerpt: SoC Debug and Trace Architect Toronto, Ontario, Canada Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building next-generation CPU and AI silicon. As a SoC Debug and Trace Architect, you will define and scale debug and trace capabilities across our product lines, enabling both internal teams and external users to validate performance, diagnose issues, and optimize workloads. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are - Experienced in hardware debug for CPU, SoC, or ASIC systems, including bring-up and post-silicon environments. - Strong understanding of processor architecture and microarchitecture across RISC-V, x86, or ARM. - Familiar with debug, profiling, and trace methodologies, including industry standards such as iJTAG. - Comfortable working across hardware and software boundaries, including firmware and driver interaction. -

### ASIC/SoC Physical Design Engineer - Python/Perl/TCL/Shell Scripts - 7 to 12 years - Bangalore - Cisco
- Location: Pune, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-07
- 401(k) match: listed (not source-backed)
- Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Pune-India/ASIC-SoC-Physical-Design-Engineer---Python-Perl-TCL-Shell-Scripts---7-to-12-years---Bangalore_2013131
- Excerpt: ASIC/SoC Physical Design Engineer - Python/Perl/TCL/Shell Scripts - 7 to 12 years - Bangalore Pune, India Meet the Team Cisco's Client Optics Group (COG) designs & delivers the high-speed optical transceivers, and platforms that power Cisco's core data center networking solutions. We specialize in the design and integration of cutting-edge IM/DD optics and silicon photonic platforms that enable customers to deploy industry-leading optical technologies within data center with unprecedented speed, capacity, and reliability. Come join us and take part in shaping COG's ground-breaking optical solutions by designing, developing, and testing some of the most advanced pluggable, and Co-packaged Optics (CPO) being developed in the industry. You will work with Cisco's best-in-class Silicon Photonics team. Our team is responsible for driving the development and optimization of optical transceivers & modules (800G,1.6T & beyond) that seamlessly integrate with Cisco's routing, switching, and datacenter platforms, enabling customers to build scalable, high-performance networks that support emerging technologies including AI/ML workloads, and next-generation data center architectures. We are looking for a talented and experienced Design Verification Lead to join our team and drive verification of Cisco's silicon photonics driver integrated circuits for the next generation of products for 100/200/400G per Lambda solutions. Your Impact Assist in RTL/netlist‑to‑GDSII implementation for block‑level and full‑chip designs in advanced technology nodes. Support digital implementation flows and collaborate with EDA tool vendors to debug issues. Support in developing hierarchical floorplans, macro placement, I/O planning, congestion, timing, and power distribution. Perform static timing analysis (STA), analyze timing reports, and implement timing

### Network Implementation Engineer - Leidos
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Chantilly-VA/Network-Implementation-Engineer_R-00175723
- Excerpt: Network Implementation Engineer 2 Locations posted: Posted 30+ Days Ago

### Cloud Support Engineer - CACI
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Hanover-MD-US/Cloud-Support-Engineer_327318
- Excerpt: Cloud Support Engineer 2 Locations posted: Posted 2 Days Ago

### Engineering Intern - Data Analyst (Python) - Eaton Corporation
- Location: Torino, Turin, ITA, 10138 (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://eaton.eightfold.ai/careers/job/687236754332
- Excerpt: Engineering Intern - Data Analyst (Python) Torino, Turin, ITA, 10138

### ASIC DFT CAD Technical Leader - Cisco
- Location: San Jose, California, US (unspecified)
- Salary: $184K-$264K
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/San-Jose-California-US/ASIC-DFT-CAD-Technical-Leader_2012616
- Excerpt: ASIC DFT CAD Technical Leader San Jose, California, US The application window is expected to close on: 07/24/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Who We Are: The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Key Responsibilities: Own and drive end-to-end DFT flow architecture. Build and maintain scalable DFT CAD infrastructure from RTL ‚ DFT insertion, ATPG, simulation, reporting. Develop robust regression frameworks (LSF/cluster-based) with job orchestration, monitoring, logging, and failure recovery. Lead AI-driven automation initiatives for log analysis, failure triage, regression optimization, and intelligent debug. Collaborate with RTL, Physical Design, and Validation teams to ensure seamless DFT integration and signoff. Define and track key metrics (coverage, pattern count, runtime, regression health) and build dashboards for visibility. Standardize flows, improve reusability, and

### Full Stack Developer - Vodafone Group
- Location: Bucuresti, Romania (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://vodafone.eightfold.ai/careers/job/563018696733333
- Excerpt: Full Stack Developer Bucuresti, Romania

### Software Developer / Engineer - CACI
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-21
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Sterling-VA-US/Software-Developer---Engineer_326874
- Excerpt: Software Developer / Engineer 2 Locations posted: Posted 22 Days Ago

### Principal AI Scientist - Cerence Inc
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://cerence.wd5.myworkdayjobs.com/Cerence/job/Remote---USA/Principal-AI-Scientist_R0005799
- Excerpt: Principal AI Scientist 2 Locations posted: Posted 30+ Days Ago

### Network Engineer - CACI
- Location: Washington, DC, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Washington-DC-US/Network-Engineer_321249
- Excerpt: Network Engineer Washington, DC, US posted: Posted 30+ Days Ago

### Full Stack Development - CACI
- Location: Ashburn, VA, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Ashburn-VA-US/Full-Stack-Development_315250-1
- Excerpt: Full Stack Development Ashburn, VA, US posted: Posted 30+ Days Ago

### 【Cloud & ITO】ITアウトソーシング T&Tマネージャ - DXC Technology
- Location: JPN - TOKYO (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://dxctechnology.wd1.myworkdayjobs.com/DXCJobs/job/JPN---TOKYO/XMLNAME--Cloud---ITO-IT-T-T_51544284
- Excerpt: 【Cloud & ITO】ITアウトソーシング T&Tマネージャ JPN - TOKYO posted: Posted 30+ Days Ago

### Engineer 3 - Machine Learning - Comcast Corporation
- Location: India - Chennai, Comcast India Engineering Cent (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://comcast.wd5.myworkdayjobs.com/Comcast_Careers/job/India---Chennai-Comcast-India-Engineering-Cent/Engineer-3---Machine-Learning_R431294
- Excerpt: Engineer 3 - Machine Learning India - Chennai, Comcast India Engineering Cent posted: Posted 30+ Days Ago

### Junior Network Engineer - CACI
- Location: Colorado Springs, CO, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-20
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Colorado-Springs-CO-US/Junior-Network-Engineer_324712
- Excerpt: Junior Network Engineer Colorado Springs, CO, US posted: Posted 23 Days Ago

### Device Abstraction Software Engineer - Mid Level - CACI
- Location: Austin, TX, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Austin-TX-US/Device-Abstraction-Software-Engineer---Mid-Level_323069
- Excerpt: Device Abstraction Software Engineer - Mid Level Austin, TX, US posted: Posted 30+ Days Ago

### Cryptologic Language Training Developer Level 1 - Arabic - CACI
- Location: Annapolis Junction, MD, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Annapolis-Junction-MD-US/Cryptologic-Language-Training-Developer-Level-1---Arabic_327580-1
- Excerpt: Cryptologic Language Training Developer Level 1 - Arabic Annapolis Junction, MD, US posted: Posted 2 Days Ago

### Data Governance- with Agentic AI/Gen AI - Citigroup Inc.
- Location: BANGALORE, Karnātaka, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://citi.eightfold.ai/careers/job/859035486053
- Excerpt: Data Governance- with Agentic AI/Gen AI BANGALORE, Karnātaka, India

### Actuaire Santé/Prévoyance H/F - Direction Technique - Marsh McLennan
- Location: Paris - Pyramides (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://mmc.wd1.myworkdayjobs.com/MMC/job/Paris---Pyramides/Actuaire-Sant-Prvoyance-H-F---Direction-Technique_R_340837
- Excerpt: Actuaire Santé/Prévoyance H/F - Direction Technique Paris - Pyramides posted: Posted 30+ Days Ago

### Python Developer - GenAI - Citigroup Inc.
- Location: PUNE, Mahārāshtra, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://citi.eightfold.ai/careers/job/859035149124
- Excerpt: Python Developer - GenAI PUNE, Mahārāshtra, India

### Computer Scientist 2 (C++) - Adobe Inc.
- Location: Noida (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-08
- Parental leave: 16 weeks (not source-backed)
- Non-birth-parent leave: 16 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://adobe.wd5.myworkdayjobs.com/external_experienced/job/Noida/Computer-Scientist-2--C---_R167185-1
- Excerpt: Computer Scientist 2 (C++) Noida posted: Posted 4 Days Ago

### Conseiller Client (F/H) - Télévente - Fès - Français - Concentrix
- Location: MAR Fès - 112, Avenue des FAR Champs de course, Ville Nouvelle (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://cnx.wd1.myworkdayjobs.com/external_global/job/MAR-Fs---112-Avenue-des-FAR----Champs-de-course-Ville-Nouvelle/Conseiller-Client--F-H----Tlvente---Fs---Franais_R1674283
- Excerpt: Conseiller Client (F/H) - Télévente - Fès - Français MAR Fès - 112, Avenue des FAR Champs de course, Ville Nouvelle posted: Posted 30+ Days Ago

### ASIC Design Verification Engineer - Cisco
- Location: San Jose, California, US (unspecified)
- Salary: $152K-$219K
- Posted: 2026-05-22
- 401(k) match: listed (not source-backed)
- Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/San-Jose-California-US/ASIC-Design-Verification-Engineer_2008472
- Excerpt: ASIC Design Verification Engineer San Jose, California, US The application window is expected to close on: 06/01/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms powering Cisco's core Switching, Routing, and Wireless products. We design networking hardware for enterprises, service providers, the public sector, and nonprofit organizations worldwide. As part of the team behind Cisco Silicon One (#CiscoSiliconOne) -the industry's only unified silicon architecture spanning top-of-rack switches to web-scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio . Come join us and take part in shaping Cisco's groundbreaking solutions by designing, developing, and testing some of the most advanced ASICs in the industry. Your Impact As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco's revolutionary data center solutions. You'll architect and develop DV infrastructure, create and execute comprehensive test plans, and ensure robust verification and coverage for complex chips. Your collaboration with designers, architects, and software teams will help guarantee seamless integration and optimal performance of Cisco's hardware platforms. You will: Participate in the ASIC design verification for Cisco high-end switching products. Perform end-to-end verification of design blocks and top-level Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis. Construct testbenches components like scoreboard, agents, sequencers,

### Senior Analyst, Compliance Quality Operations - Circle Internet Group
- Location: 25 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://circle.wd1.myworkdayjobs.com/circle/job/New-York-City---remote-first-in-US/Senior-Analyst--Compliance-Quality-Operations_JR100844
- Excerpt: Senior Analyst, Compliance Quality Operations 25 Locations posted: Posted 30+ Days Ago

### Sr. Semantics Computer Vision Research - Dolby Laboratories
- Location: Bangalore,India (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://dolby.eightfold.ai/careers/job/22201721
- Excerpt: Sr. Semantics Computer Vision Research Bangalore,India

### AI Lab - Machine Learning Engineer - Hewlett-Packard
- Location: Sant Cugat del Valles, Barcelona, Spain (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://hp.eightfold.ai/careers/job/28359629
- Excerpt: AI Lab - Machine Learning Engineer Sant Cugat del Valles, Barcelona, Spain

### Computer Scientist II - Adobe Inc.
- Location: Bangalore (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 16 weeks (not source-backed)
- Non-birth-parent leave: 16 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://adobe.wd5.myworkdayjobs.com/external_experienced/job/Bangalore/Computer-Scientist-II_R167612
- Excerpt: Computer Scientist II Bangalore posted: Posted 30+ Days Ago

### Staff Engineer, CPU Core Verification - TensTorrent
- Location: Bengaluru, Karnataka, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-20
- Apply: https://job-boards.greenhouse.io/tenstorrent/jobs/5140149007
- Excerpt: Staff Engineer, CPU Core Verification Bengaluru, Karnataka, India Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers.You will own CPU core‑level verification, shaping how our out‑of‑order RISC‑V CPUs behave in silicon. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are - You bring 8+ years in CPU verification or closely related digital design. - You know high‑performance out‑of‑order CPU microarchitecture in depth. - You work comfortably with RTL, waveforms, logs, and complex debug scenarios. - You communicate clearly across design, DV, emulation, and post‑silicon teams. What We Need - Plan and drive functional verification for CPU core features and complex microarchitectural scenarios. - Develop UVM, assembly, and C/C++ based stimulus,

### Oliver Wyman - Machine Learning Engineer, Generative AI & Unstructured Data - Lisbon - Marsh McLennan
- Location: Lisbon - Antonio (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- 401(k) match: listed (not source-backed)
- Apply: https://mmc.wd1.myworkdayjobs.com/MMC/job/Lisbon---Antonio/Oliver-Wyman---Machine-Learning-Engineer--Generative-AI---Unstructured-Data---Lisbon_R_355039-1
- Excerpt: Oliver Wyman - Machine Learning Engineer, Generative AI & Unstructured Data - Lisbon Lisbon - Antonio posted: Posted Yesterday

### Senior Digital Signal Processing Engineer - CACI
- Location: Sterling, VA, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-20
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Sterling-VA-US/Senior-Digital-Signal-Processing-Engineer_326822
- Excerpt: Senior Digital Signal Processing Engineer Sterling, VA, US posted: Posted 23 Days Ago

### Data-Centric Security Architect (MBSE / Sparx EA) - Leidos
- Location: Brussels, Belgium (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-28
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://leidos.wd5.myworkdayjobs.com/External/job/Brussels-Belgium/Data-Centric-Security-Architect--MBSE---Sparx-EA-_R-00184253
- Excerpt: Data-Centric Security Architect (MBSE / Sparx EA) Brussels, Belgium posted: Posted 15 Days Ago

### Principal Software Developer - Oracle
- Location: Seattle, WA, United States, US (hybrid)
- Salary: $100K-$235K
- Posted: 2026-06-03
- Parental leave: 14 weeks (not source-backed)
- Non-birth-parent leave: 14 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://careers.oracle.com/en/sites/jobsearch/job/335659/
- Excerpt: Principal Software Developer Seattle, WA, United States, US Oracle Cloud Infrastructure (OCI) delivers mission-critical applications for top tier enterprises around the world. Our cloud offers unmatched hyper-scale, multi-tenant services deployed in more than 50 regions worldwide. OCI is expanding its mission beyond the traditional boundaries of public cloud to include dedicated, hybrid and multi cloud, edge computing, and more. As are part of Technical Strategy Oversight team (TSO) within OCI, our mission is to maximize customer choice and transparency while delivering high-value cloud solutions. We are at the strategic center of OCI's most ambitious projects-architecting and delivering next-generation platforms and frameworks to empower developers and support groundbreaking cloud services. What You'll Be Building and Leading End-to-End Solutions: Provide technical leadership in designing, architecting, and delivering greenfield cloud services and platforms from inception to production at global scale. Foundational Frameworks: Spearhead the engineering of new container runtimes and distributed frameworks to power OCI's highest-availability and most demanding workloads. Performance at Scale: Direct the development of bleeding-edge, high-performance persistent storage and networking solutions, setting new benchmarks for cloud infrastructure. Strategic Innovation: Define standards and drive adoption of core data-plane components and developer tools across OCI, enabling organizational performance leaps. Why Join Us? Industry Impact: Shape the direction and standards of the global public cloud by leading initiatives with large-scale customer and organizational impact. Personal Growth: Accelerate your career at the intersection of technical and strategic leadership, with opportunities to influence OCI's top priorities and outcomes. Collaborative Leadership: Partner with and mentor diverse,

### Design Verification Lead, AI Hardware - TensTorrent
- Location: Toronto, Ontario, Canada (unspecified)
- Salary: Not disclosed
- Posted: 2025-02-24
- Apply: https://job-boards.greenhouse.io/tenstorrent/jobs/4659518007
- Excerpt: Design Verification Lead, AI Hardware Toronto, Ontario, Canada Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a Verification Lead for our next-generation AI hardware. You'll guide a top-tier team of Verification Engineers, shaping test strategies to validate functionality and performance of our AI core. This role requires expertise in AI-specific data types, common AI data-movement compute patterns, and on-chip network validation, combined with strong leadership and collaboration skills. This role is hybrid, based out Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are - A Seasoned Verification Leader: An experienced ASIC/SoC lead with proven track record of leading teams through complex tape-outs. - An AI Hardware Specialist: An expert in the nuances of high-performance compute, specifically focused on AI/ML architectures and the intricacies of tensor-based operations. - A Systems

### Principal Machine Learning Engineer - Trulia
- Location: Remote-USA (remote)
- Salary: Not disclosed
- Posted: 2026-05-15
- Apply: https://zillow.wd5.myworkdayjobs.com/Zillow_Group_External/job/Remote-USA/Principal-Machine-Learning-Engineer_P750400-1
- Excerpt: Principal Machine Learning Engineer Remote-USA posted: Posted 28 Days Ago

### Telco Consultant - Neural Magic
- Location: Tokyo (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://redhat.wd5.myworkdayjobs.com/jobs/job/Tokyo/Telco-Consultant_R-055801-1
- Excerpt: Telco Consultant Tokyo posted: Posted 30+ Days Ago

### Machine Learning Engineer - Trulia
- Location: Remote-Germany (remote)
- Salary: Not disclosed
- Posted: 2026-06-02
- Apply: https://zillow.wd5.myworkdayjobs.com/Zillow_Group_External/job/Remote-Germany/Machine-Learning-Engineer_P750556-1
- Excerpt: Machine Learning Engineer Remote-Germany posted: Posted 10 Days Ago

### Principal Machine Learning Engineer I *** Hybrid in Raleigh, NC - RELX
- Location: Raleigh, NC (hybrid)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://relx.wd3.myworkdayjobs.com/relx/job/Raleigh-NC/Principal-Machine-Learning-Engineer-I-----Hybrid-in-Raleigh--NC_R103892-1
- Excerpt: Principal Machine Learning Engineer I *** Hybrid in Raleigh, NC Raleigh, NC posted: Posted 30+ Days Ago

### Data Engineer - Amdocs
- Location: Cyprus- Limassol (Amdocs Site) (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://amdocs.eightfold.ai/careers/job/563431012612953
- Excerpt: Data Engineer Cyprus- Limassol (Amdocs Site)

### System Integration Engineer - CACI
- Location: Reston, VA, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-05
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Reston-VA-US/System-Integration-Engineer_327370
- Excerpt: System Integration Engineer Reston, VA, US posted: Posted 7 Days Ago

### Computer Scientist ( Python ) - Adobe Inc.
- Location: Bangalore (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- Parental leave: 16 weeks (not source-backed)
- Non-birth-parent leave: 16 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://adobe.wd5.myworkdayjobs.com/external_experienced/job/Bangalore/Advanced-Analytics---Reporting-Analyst_R167740-1
- Excerpt: Computer Scientist ( Python ) Bangalore posted: Posted Today

### Artificial Intelligence & Cloud Engineer - CACI
- Location: Norfolk, VA, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Norfolk-VA-US/Artificial-Intelligence---Cloud-Engineer_327238
- Excerpt: Artificial Intelligence & Cloud Engineer Norfolk, VA, US posted: Posted Yesterday

### C/C++ Hardware / Software Co-Design SDE, Machine Learning Acceleration Systems - Amazon
- Location: Austin, Texas, USA (unspecified)
- Salary: $144K-$194K
- Posted: 2026-05-05
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/10411728/c-c-hardware-software-co-design-sde-machine-learning-acceleration-systems
- Excerpt: C/C++ Hardware / Software Co-Design SDE, Machine Learning Acceleration Systems Austin, Texas, USA Annapurna Labs stands at the forefront of hardware/software co-design, leading innovation not just within Amazon Web Services (AWS) but across the entire industry. We design and build every component of our hardware and software to create best-in-class machine learning products that accelerate customer workloads through industry leading hardware using our custom silicon solutions. If you're passionate about building the highest-performing, hardware-accelerated Machine Learning systems and want to be part of the entire journey from pre- through post-silicon development, Annapurna Labs offers an exceptional career opportunity. Join us in shaping the future of AI acceleration At the heart of AWS Machine Learning servers reside our custom Amazon-designed silicon that powers next-generation machine learning capabilities for our customers. We're seeking an experienced C/C++ engineer to join our embedded software team, where you'll develop bare metal firmware that drives neural network model execution across our custom ASIC-based ML Accelerator chips. Working at the intersection of hardware and software, you'll collaborate closely with our architecture and design teams to co-develop the firmware and custom hardware that enables machine learning within our accelerator chips. Our mission is ambitious: to democratize access to industry-leading ML infrastructure and make deep learning capabilities accessible to everyday software developers. From the ground up, you'll help build the foundation that makes this vision possible. the Annapurna Labs team operates with the agility and culture of a startup, but with the full weight of Amazon behind us and

### Visiting Faculty, AI and Systems Co-design Team - Meta
- Location: Menlo Park, CA (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-07
- 401(k) match: listed (not source-backed)
- Apply: https://www.metacareers.com/jobs/1877733929852198/
- Excerpt: Visiting Faculty, AI and Systems Co-design Team Menlo Park, CA Meta Platforms, Inc. (Meta), formerly known as Facebook Inc., builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps and services like Messenger, Instagram, and WhatsApp further empowered billions around the world. Now, Meta is moving towards AI to help build the next evolution in social technology. As a researcher in AI hardware, software, and algorithms you will help shape Meta's AI strategy. Responsibilities: - Conduct research across AI hardware, software, and algorithms - Find opportunities for pathfinding research on AI hardware, software, and algorithms through working with the team, and more broadly, with Meta - Share the results within Meta and publish them externally - Bring the latest ideas to Meta, e.g., through inviting leading researchers to communicate their work at Meta, through sharing advances in the field through internal presentations and notes - Guide teammates on pathfinding Minimum qualifications: - Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience - Tenure-track/tenured faculty in CS or related fields, with a demonstrated publication record - Track record of publications reflecting expertise in theoretical and/or empirical research - Relevant research experience working on AI hardware, software, and algorithms - Must obtain work authorization in country of employment at the time of hire and maintain ongoing work authorization during employment Preferred qualifications: - Proven track record of achieving significant results as demonstrated by publications

### Machine Learning Engineer II - Toronto-Dominion Bank
- Location: 661 University Avenue, Toronto, Ontario (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://td.wd3.myworkdayjobs.com/TD_Bank_Careers/job/661-University-Avenue-Toronto-Ontario/Machine-Learning-Engineer-II_R_1476583
- Excerpt: Machine Learning Engineer II 661 University Avenue, Toronto, Ontario posted: Posted 30+ Days Ago

### Senior Machine Learning Engineer - SKY Harbour Group CORP
- Location: Milan, Monte Penice (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://sky.wd3.myworkdayjobs.com/sky_careers/job/Milan-Monte-Penice/Senior-Machine-Learning-Engineer_R0053680
- Excerpt: Senior Machine Learning Engineer Milan, Monte Penice

### CAD/IP/Infrastructure Engineer - Cisco
- Location: Armenia (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-15
- 401(k) match: listed (not source-backed)
- Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Armenia/ASIC-Engineer_2005399
- Excerpt: CAD/IP/Infrastructure Engineer Armenia Meet the Team The Common Hardware Group (CHG) delivers silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Your Impact We are seeking a highly motivated engineer to join CAD & Methodology Team. The candidate will play a critical role in ensuring that ASIC projects are fully enabled with vendor IPs, standard cells, and Process Design Kits (PDKs), working closely with both internal teams and external vendors to drive enablement and management of essential components. Key Responsibilities: Develop the platform for IP/PDK installations Develop a platform for IP quality assurance Execute custom cells characterization and model generation with quality validation. Establish and maintain efficient IP management methodologies, including version control, qualification, and distribution. Collaborate with IP vendors and foundries to facilitate IP and PDK enablement for ASIC projects. Benchmarking of different vendor/technology IPs Manage the integration, validation, and release of vendor IPs

### Network Engineer- Tier 3- Intelligence Community - CACI
- Location: Washington, DC, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Washington-DC-US/Network-Engineer--Tier-3--Intelligence-Community_321319-1
- Excerpt: Network Engineer- Tier 3- Intelligence Community Washington, DC, US posted: Posted 30+ Days Ago

### Junior Hardware Engineer - Signal & Power Integrity - Israel - ETR - Cisco
- Location: Caesarea, Israel (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Caesarea-Israel/Junior-Hardware-Engineer---Signal---Power-Integrity---Israel---ETR_2010153
- Excerpt: Junior Hardware Engineer - Signal & Power Integrity - Israel - ETR Caesarea, Israel Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. Who We Are You'll be joining our Cisco Silicon One SIPI team, which is at the center of Cisco's ASIC group. You'll be part of our group driving our game changing next generation network devices - Cisco Silicon One™. Our unique and small team works in a startup atmosphere inside a stable and leading corporate. Our design center is very unique - hosting all silicon HW and SW development disciplines inside one site. We are transforming the industry and building a new internet for AI networks, and 5G era, providing a unified, programmable silicon architecture that is the foundation of all Cisco's future routing products. Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility. Cisco Silicon One™ is a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine! What You Will Do You'll be joining our Cisco Silicon One Signal & power Integrity team, which is at the center of the silicon development at Cisco. Our

### CS26 Stage - BAC+5 - Prospection IA pour la robotique (H/F) - Renault
- Location: Location not specified (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Apply: https://alliancewd.wd3.myworkdayjobs.com/renault-group-careers/job/Guyancourt/CS26-Stage----BAC-5---Prospection-IA-pour-la-robotique--H-F-_JOBREQ_50262704
- Excerpt: CS26 Stage - BAC+5 - Prospection IA pour la robotique (H/F) Location not specified posted: Posted 2 Days Ago

### Cryptologic Language Training Developer Level 1 - Russian - CACI
- Location: Annapolis Junction, MD, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-18
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Annapolis-Junction-MD-US/Cryptologic-Language-Training-Developer-Level-1---Russian_326016
- Excerpt: Cryptologic Language Training Developer Level 1 - Russian Annapolis Junction, MD, US posted: Posted 25 Days Ago

### Full-Stack Developer - SAtellogic Inc
- Location: Barcelona, - (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Apply: https://satellogic.bamboohr.com/careers/499
- Excerpt: Full-Stack Developer Barcelona, - Full-Stack Developer

### Principal Machine Learning Engineer, Agentic AI - Trulia
- Location: Remote-USA (remote)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://zillow.wd5.myworkdayjobs.com/Zillow_Group_External/job/Remote-USA/Principal-Machine-Learning-Engineer--Agentic-AI_P748682-2
- Excerpt: Principal Machine Learning Engineer, Agentic AI Remote-USA posted: Posted 30+ Days Ago

### Infirmier (F/H) - Agadir - Français - Expérimenté - Concentrix
- Location: MAR Agadir - Avenue Hassan II (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://cnx.wd1.myworkdayjobs.com/external_global/job/MAR-Agadir---Avenue-Hassan-II/Infirmier--F-H----Agadir---Franais---Expriment_R1738713
- Excerpt: Infirmier (F/H) - Agadir - Français - Expérimenté MAR Agadir - Avenue Hassan II posted: Posted Today

### Italian Speaking OTC Analyst - Viatris
- Location: Budapest, Budapest, Hungary (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-05
- Apply: https://viatris.wd5.myworkdayjobs.com/External/job/Budapest-Budapest-Hungary/Italian-Speaking-OTC-Analyst_R5669934
- Excerpt: Italian Speaking OTC Analyst Budapest, Budapest, Hungary posted: Posted 7 Days Ago

### Reverse Engineer - CACI
- Location: Annapolis Junction, MD, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Annapolis-Junction-MD-US/Reverse-Engineer_319469
- Excerpt: Reverse Engineer Annapolis Junction, MD, US posted: Posted 30+ Days Ago

### Data Engineer - Big Data, Python, Databricks - Citigroup Inc.
- Location: CHENNAI, Tamil Nādu, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://citi.eightfold.ai/careers/job/859034703581
- Excerpt: Data Engineer - Big Data, Python, Databricks CHENNAI, Tamil Nādu, India

### Software Engineer (Real-Time Systems / C2 Integration) - CACI
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Dahlgren-VA-US/Software-Engineer--Real-Time-Systems---C2-Integration-_321936
- Excerpt: Software Engineer (Real-Time Systems / C2 Integration) 2 Locations posted: Posted 30+ Days Ago

### Business Development Executive - AI/Cloud Solutions - CACI
- Location: Remote (Any State) (remote)
- Salary: Not disclosed
- Posted: 2026-06-05
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Remote-Any-State/Business-Development-Executive---AI-Cloud-Solutions_327392
- Excerpt: Business Development Executive - AI/Cloud Solutions Remote (Any State) posted: Posted 7 Days Ago

### TECHNICIEN(NE) TACHYGRAPHE - Michelin
- Location: EUROMASTER MONTPELLIER VI (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://michelinhr.wd3.myworkdayjobs.com/Michelin/job/EUROMASTER-MONTPELLIER-VI/TECHNICIEN-NE--TACHYGRAPHE_R-2026016186-1
- Excerpt: TECHNICIEN(NE) TACHYGRAPHE EUROMASTER MONTPELLIER VI posted: Posted 30+ Days Ago

### Intern: Application Engineering - Formal Verification - Cadence Design Systems, Inc.
- Location: BELO HORIZONTE (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-09
- 401(k) match: listed (not source-backed)
- Apply: https://cadence.wd1.myworkdayjobs.com/External_Careers/job/BELO-HORIZONTE/Intern--Application-Engineering---Formal-Verification_R54887
- Excerpt: Intern: Application Engineering - Formal Verification BELO HORIZONTE posted: Posted 3 Days Ago

### Module Engineering Intern - Intel
- Location: Ireland, Leixlip (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-05
- 401(k) match: listed (not source-backed)
- Apply: https://intel.wd1.myworkdayjobs.com/External/job/Ireland-Leixlip/Module-Engineering-Intern_JR0283503
- Excerpt: Module Engineering Intern Ireland, Leixlip posted: Posted 7 Days Ago

### Principal Applied Scientist, Agentic AI - Trulia
- Location: Remote-USA (remote)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://zillow.wd5.myworkdayjobs.com/Zillow_Group_External/job/Remote-USA/Principal-Applied-Scientist--Agentic-AI_P747465
- Excerpt: Principal Applied Scientist, Agentic AI Remote-USA posted: Posted 30+ Days Ago

### SI/PI Intern - Etched
- Location: San Jose, CA, United States (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-10
- Apply: https://jobs.ashbyhq.com/etched/ce683632-421a-4ef9-8664-b253356969a3
- Excerpt: SI/PI Intern San Jose, CA, United States About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the next generation of high-performance AI systems. You will work closely with package, PCB, ASIC, and system engineers to analyze high-speed interfaces, extract channel models, and improve signal quality across our accelerator platforms. This role provides hands-on experience with industry-leading tools and real-world challenges involving PCIe, Ethernet, high-speed SerDes channels, advanced packaging, and multi-board systems. Key Responsibilities - Signal Integrity Analysis - Perform channel analysis for high-speed interfaces including PCIe, Ethernet, and other SerDes links.Extract and validate S-parameter models from package and PCB layouts.Analyze insertion loss, return loss, impedance discontinuities, and crosstalk.Generate channel compliance reports and support design reviews.Modeling & Simulation - Build and validate 3D electromagnetic models using Ansys HFSS.Develop board and package channel models from ECAD design databases.Correlate simulation results with measurements and lab data.Support mixed package-board channel simulations and optimization.Design Collaboration - Partner with PCB layout, package, hardware, and ASIC teams to improve

### SoC Integration Engineer - Intel
- Location: 4 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-05
- 401(k) match: listed (not source-backed)
- Apply: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/SoC-Integration-Engineer_JR0284554
- Excerpt: SoC Integration Engineer 4 Locations posted: Posted 7 Days Ago

### Analista de Integração Middleware (WebMethods) - DXC Technology
- Location: BRA - SP - SAO PAULO (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-08
- 401(k) match: listed (not source-backed)
- Apply: https://dxctechnology.wd1.myworkdayjobs.com/DXCJobs/job/BRA---SP---SAO-PAULO/Analista-de-Integrao-Middleware--WebMethods-_51580493
- Excerpt: Analista de Integração Middleware (WebMethods) BRA - SP - SAO PAULO posted: Posted 4 Days Ago

### Analog/mixed-signal IC Design Developer - Cisco
- Location: Kanata, Ontario, Canada (hybrid)
- Salary: $144K-$194K
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Kanata-Ontario-Canada/Analog-mixed-signal-IC-Design-Developer_2009010
- Excerpt: Analog/mixed-signal IC Design Developer Kanata, Ontario, Canada The application window is expected to close on: Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . The application window is expected to close on 6/1/26. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This is a hybrid role that can be performed three days per week from our Ottawa or Vancouver BC location. Meet the Team Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G, 800G and 1.6T+ bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design. Acacia takes pride in providing and fostering a collaborate environment in order ensure success and personal growth. Your Impact As a member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed ()25Gb/s), and high accuracy, analog designs for optical communications products. You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products. You will lead efforts for a large block on a complex chip, mentor team

### AI Research Scientist, CoreML - Monetization - Meta
- Location: Sunnyvale, CA; Bellevue, WA; Menlo Park, CA; Seattle, WA; New York, NY; San Francisco, CA (unspecified)
- Salary: $184K-$257K
- Posted: 2026-06-04
- 401(k) match: listed (not source-backed)
- Apply: https://www.metacareers.com/jobs/1865758441490305/
- Excerpt: AI Research Scientist, CoreML - Monetization Sunnyvale, CA; Bellevue, WA; Menlo Park, CA; Seattle, WA; New York, NY; San Francisco, CA Meta's Monetization pillar is at the cutting edge of delivering highly personalized ads that create maximum value for both users and advertisers. Within this pillar, the Ranking & AI (RAI) Research team drives state-of-the-art research initiatives, focusing on high-impact, high-risk projects-true moonshots-with the potential to redefine Meta's monetization strategies. By consistently pushing the boundaries of what's possible, we deliver breakthrough innovations that not only advance Meta's business objectives but also result in publications at top-tier conferences. Inspired by recent breakthroughs in large language models (LLMs), the RAI Sequence Learning team is pioneering a transformative approach to recommender systems. We are reimagining recommendation as a generative sequence modeling problem, moving beyond traditional methods that treat recommendations as classification tasks on pairs. Instead, our approach models user and ad content, as well as historical interaction data, as sequences-unlocking new possibilities for personalization and relevance. As a research scientist on this team, you will play a pivotal role in shaping the future of technology and business at Meta, especially as we enter the era of artificial general intelligence (AGI). Your contributions will directly influence the trajectory of Meta's monetization strategies and help define the next generation of recommender systems. Responsibilities: - Extracting meaningful signals from both 1st-party and 3rd-party data sources - Advancing representation learning - Scaling solutions to efficiently process hundreds of billions of data points - Driving continuous algorithmic innovation

### Momentum Technical Specialist - CACI
- Location: Remote (Any State) (remote)
- Salary: Not disclosed
- Posted: 2026-06-09
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Remote-Any-State/Momentum-Technical-Specialist_323998
- Excerpt: Momentum Technical Specialist Remote (Any State) posted: Posted 3 Days Ago

### Engineer 3 - Machine Learning - Comcast Corporation
- Location: India - Chennai, Comcast India Engineering Cent (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-15
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://comcast.wd5.myworkdayjobs.com/Comcast_Careers/job/India---Chennai-Comcast-India-Engineering-Cent/Engineer-3--Machine-Learning---N-E084660-0531-CIEC_R436537
- Excerpt: Engineer 3 - Machine Learning India - Chennai, Comcast India Engineering Cent posted: Posted 28 Days Ago

### ASIC Engineer_SoC Design Internship (Armenia) - Cisco
- Location: Armenia (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Armenia/ASIC-Engineer-SoC-Design-Internship--Armenia-_2009960
- Excerpt: ASIC Engineer_SoC Design Internship (Armenia) Armenia Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens. Meet the Team Cisco is building some of the most complex and advanced silicon in the industry, focusing on high-performance, large-scale SoCs that power next-generation networking platforms. Our team provides an end-to-end view of chip development, offering interns the rare opportunity to work on full-chip and SoC-level designs rather than being limited to a single IP. You will join a collaborative and supportive environment where industry experts with real tape-out experience provide mentorship and structured technical training. The vibe is fast-paced and innovation-driven, perfect for those eager to see how production silicon is built from spec to tape-out. It is an exciting place to gain exposure to the latest silicon technologies and methodologies used in global-scale systems. Your Impact Contribute to the development of state-of-the-art chips by working on full-chip digital design, Design for Test (DFT), and physical design tasks. Develop automation and productivity scripts using Python or Tcl to streamline the ASIC design cycle and improve engineering efficiency. Collaborate with cross-functional teams across design and implementation to ensure seamless integration of complex SoC architectures. Gain hands-on experience with synthesis, floorplanning, and routing to understand the complete RTL-to-GDS flow. This role allows you to make a tangible impact on silicon that powers infrastructure used

### Python GenAI Developer - Assistant Vice President - Citigroup Inc.
- Location: PUNE, Mahārāshtra, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://citi.eightfold.ai/careers/job/859035211335
- Excerpt: Python GenAI Developer - Assistant Vice President PUNE, Mahārāshtra, India

### Intern - HVM PIE PI (High Volume Manufacturing, Process Integration Engineering, Process Integration) - Micron Technology, Inc.
- Location: Fab 10N/X, Singapore (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://micron.wd1.myworkdayjobs.com/External/job/Fab-10NX-Singapore/Intern---HVM-PIE-PI--High-Volume-Manufacturing--Process-Integration-Engineering--Process-Integration-_JR96176
- Excerpt: Intern - HVM PIE PI (High Volume Manufacturing, Process Integration Engineering, Process Integration) Fab 10N/X, Singapore posted: Posted 30+ Days Ago

### AI Engineer - Python - Abbott Laboratories
- Location: Spain - Barcelona (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 8 weeks (not source-backed)
- Non-birth-parent leave: 8 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://abbott.wd5.myworkdayjobs.com/abbottcareers/job/Spain---Barcelona/AI-Engineer---Python_31142541
- Excerpt: AI Engineer - Python Spain - Barcelona posted: Posted 30+ Days Ago

### Senior Python Engineer - Assistant Vice President - Citigroup Inc.
- Location: NEW YORK, New York, United States of America (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://citi.eightfold.ai/careers/job/859034476226
- Excerpt: Senior Python Engineer - Assistant Vice President NEW YORK, New York, United States of America

### SOC Emulation Engineer - Hardware Emulation Infrastructure - TensTorrent
- Location: Austin, Texas, United States; Santa Clara, California, United States (unspecified)
- Salary: Not disclosed
- Posted: 2026-03-08
- Apply: https://job-boards.greenhouse.io/tenstorrent/jobs/5070207007
- Excerpt: SOC Emulation Engineer - Hardware Emulation Infrastructure Austin, Texas, United States; Santa Clara, California, United States Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a junior-to-mid level SOC Emulation Engineer to support our hardware emulation infrastructure and internal chip design teams. This role focuses on integrating vendor and custom hardware transactors, developing Python-based test frameworks, and providing technical support to emulation users across multiple chip projects. This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are - Background in Electrical/Computer Engineering or Computer Science with 1-3 years of experience in chip design, verification, or emulation. - Proficient in Python for automation and test development, with a working knowledge of C++ and the ability to navigate SystemVerilog RTL. - Skilled

### Coordinateur.trice Service Center - Exotec
- Location: Location not specified (unspecified)
- Salary: Not disclosed
- Posted: 2026-04-07
- Apply: https://apply.workable.com/j/E6090CFDB3
- Excerpt: Coordinateur.trice Service Center

### Principal Product Manager, CPN - Circle Internet Group
- Location: Bangalore - remote first in India (remote)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://circle.wd1.myworkdayjobs.com/circle/job/Bangalore---remote-first-in-India/Principal-Product-Manager--Core-Network_JR101005
- Excerpt: Principal Product Manager, CPN Bangalore - remote first in India posted: Posted 30+ Days Ago

### Conseillers Commerciaux - Télévente - Cotonou - Français - Concentrix
- Location: BEN COTONOU - Parcel F et G , Quartier Enagnon 4eme Arrondissement îlot 40002 (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://cnx.wd1.myworkdayjobs.com/external_global/job/BEN-COTONOU---Parcel-F-et-G--Quartier-Enagnon-4eme-Arrondissement-lot-40002/Conseillers-Commerciaux---Tlvente---Cotonou---Franais_R1673924
- Excerpt: Conseillers Commerciaux - Télévente - Cotonou - Français BEN COTONOU - Parcel F et G , Quartier Enagnon 4eme Arrondissement îlot 40002 posted: Posted 30+ Days Ago

### Junior 2nd Line Core Enabler Operations - Vodafone Group
- Location: Bucuresti, Romania (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://vodafone.eightfold.ai/careers/job/563018696019612
- Excerpt: Junior 2nd Line Core Enabler Operations Bucuresti, Romania

### Telemetry / RF Engineer - CACI
- Location: Portsmouth, VA, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Portsmouth-VA-US/XMLNAME-320703-Telemetry---RF-Engineer_321930
- Excerpt: Telemetry / RF Engineer Portsmouth, VA, US posted: Posted 30+ Days Ago

### Sr SOC Verification Engineer, Cloud-Scale Machine Learning Acceleration - Annapurna Labs - Amazon
- Location: Cupertino, California, USA (unspecified)
- Salary: $183K-$248K
- Posted: 2026-03-02
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Fertility benefits: yes (not source-backed)
- Adoption assistance: yes (not source-backed)
- Mental health support: yes (not source-backed)
- Childcare support: yes (not source-backed)
- Apply: https://www.amazon.jobs/en/jobs/3193440/sr-soc-verification-engineer-cloud-scale-machine-learning-acceleration-annapurna-labs
- Excerpt: Sr SOC Verification Engineer, Cloud-Scale Machine Learning Acceleration - Annapurna Labs Cupertino, California, USA Our Machine Learning Acceleration (MLA) team develops the Inferentia and Trainium SOCs that are used to power today's AI workloads in datacenters all around the world. As a member of the Cloud-Scale Machine Learning Acceleration, you'll collaborate with multiple teams to drive improvements in silicon yield & performance - it's still Day One here at Amazon! Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries. We are seeking experienced Design Verification Engineers to build the next generation of our cloud server chips. Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of custom silicon in our data centers. Key job responsibilities - Verify custom chip designs at the SOC level - Integrate 3rd party IPs and VIPs into the SOC testbench - Create comprehensive testplans, write robust random testcases, and execute coverage plans - Maintain autosmoke and regression infrastructure - Dive deep into bugs and triages - Mentor junior engineers About the team Inclusive Team Culture Here at AWS, we embrace our differences. We are committed to furthering our culture of inclusion. We have

### Analog/mixed-signal IC Design Developer (Hybrid) - Cisco
- Location: 2 Locations (hybrid)
- Salary: $142K-$182K
- Posted: 2026-05-24
- 401(k) match: listed (not source-backed)
- Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/Vancouver-British-Columbia-Canada/Analog-mixed-signal-IC-Design-Developer--Hybrid-_2010654
- Excerpt: Analog/mixed-signal IC Design Developer (Hybrid) 2 Locations The application window is expected to close on: 04/16/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . The application window is expected to close on 6/1/26. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. This is a hybrid role that can be performed three days per week from our Ottawa or Vancouver BC location. Meet the Team Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G, 800G and 1.6T+ bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks. You will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC. In addition, you will have the opportunity to interact with other Acacia groups including digital/DSP design, system design, package design, and module design. Acacia takes pride in providing and fostering a collaborate environment in order ensure success and personal growth. Your Impact As a member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed ()25Gb/s), and high accuracy, analog designs for optical communications products. You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products. You will lead efforts for a large block on a complex chip, mentor

### Business Development Executive - Vetting and Agile Solutions - CACI
- Location: Remote (Any State) (remote)
- Salary: Not disclosed
- Posted: 2026-06-05
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Remote-Any-State/Business-Development-Executive---Vetting-and-Agile-Solutions_327389
- Excerpt: Business Development Executive - Vetting and Agile Solutions Remote (Any State) posted: Posted 7 Days Ago

### Agile Practitioner - Vodafone Group
- Location: Cairo, Egypt (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://vodafone.eightfold.ai/careers/job/563018696202792
- Excerpt: Agile Practitioner Cairo, Egypt

### Shipboard Network Engineering Implementation Support - CACI
- Location: 2 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Washington-DC-US/Shipboard-Network-Engineering-Implementation-Support_316283
- Excerpt: Shipboard Network Engineering Implementation Support 2 Locations posted: Posted 30+ Days Ago

### Forward Deployed Engineer - Circle Internet Group
- Location: San Francisco - remote first in US (remote)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://circle.wd1.myworkdayjobs.com/circle/job/San-Francisco---remote-first-in-US/Forward-Deployed-Engineer_JR100940
- Excerpt: Forward Deployed Engineer San Francisco - remote first in US posted: Posted 30+ Days Ago

### Conseiller Client (F/H) - Service Client - Abidjan - Bilingue (FR/EN) - Concentrix
- Location: CIV Abidjan - Plateau, Immeuble Marina View - Boulevard de l’indénié A23 Indénié (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://cnx.wd1.myworkdayjobs.com/external_global/job/CIV-Abidjan---Plateau-Immeuble-Marina-View---Boulevard-de-lindni-A23--Indni/Conseiller-Client-Bilingue--F-H----Service-Client---Abidjan---Franais-Anglais_R1674350
- Excerpt: Conseiller Client (F/H) - Service Client - Abidjan - Bilingue (FR/EN) CIV Abidjan - Plateau, Immeuble Marina View - Boulevard de l’indénié A23 Indénié posted: Posted 30+ Days Ago

### Sr. Engineer, SoC Design Verification - TensTorrent
- Location: Boston, Massachusetts, United States; Santa Clara, California, United States; Toronto, Ontario, Canada (unspecified)
- Salary: $100K-$500K
- Posted: 2025-09-02
- Apply: https://job-boards.greenhouse.io/tenstorrent/jobs/4819642007
- Excerpt: Sr. Engineer, SoC Design Verification Boston, Massachusetts, United States; Santa Clara, California, United States; Toronto, Ontario, Canada Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an engineer who will focus on pre-silicon verification of DFD logic in advanced AI SoCs, driving coverage of debug, test, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA; Toronto, Ottawa; or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are - Deeply curious about silicon debug/test infrastructure and its verification. - Expert in UVM and verification of DFT/DFD features, scan, and on-chip trace logic. - Comfortable working with Siemens Tessent flows, iJTAG, and advanced verification automation. - Proactive, detail-oriented, and thrives in cross-functional technical discussions. - Ideally familiar with tools similar to CocoTB What We

### Engineer 3 - Machine Learning - Comcast Corporation
- Location: India - Chennai, Comcast India Engineering Cent (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-02
- Parental leave: 4 weeks (not source-backed)
- Non-birth-parent leave: 4 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://comcast.wd5.myworkdayjobs.com/Comcast_Careers/job/India---Chennai-Comcast-India-Engineering-Cent/Machine-Learning-Engineer-3_R427458
- Excerpt: Engineer 3 - Machine Learning India - Chennai, Comcast India Engineering Cent posted: Posted 10 Days Ago

### Senior Math Libraries Engineer – AI and HPC - NVIDIA Corporation
- Location: 5 Locations (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Math-Libraries-Engineer---AI-and-HPC_JR1998721
- Excerpt: Senior Math Libraries Engineer – AI and HPC 5 Locations posted: Posted 30+ Days Ago

### Innovation AI Engineer - Vodafone Group
- Location: Madrid, Spain (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://vodafone.eightfold.ai/careers/job/563018696691908
- Excerpt: Innovation AI Engineer Madrid, Spain

### Stage / Alternant Consultant Junior en Transformation Numérique - DXC Technology
- Location: FRA - IDF - PARIS LA DÉFENSE CEDEX (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://dxctechnology.wd1.myworkdayjobs.com/DXCJobs/job/FRA---IDF---PARIS-LA-DFENSE-CEDEX/Stage---Alternant-Consultant-Junior-en-Transformation-Numrique_51496480
- Excerpt: Stage / Alternant Consultant Junior en Transformation Numérique FRA - IDF - PARIS LA DÉFENSE CEDEX posted: Posted 30+ Days Ago

### Engineer, Software Infrastructure - Analog Devices
- Location: Romania, Cluj-Napoca (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Romania-Cluj-Napoca/Engineer--Software-Infrastructure_R262331
- Excerpt: Engineer, Software Infrastructure Romania, Cluj-Napoca posted: Posted 30+ Days Ago

### Full Stack Developer - CACI
- Location: Ashburn, VA, US (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://caci.wd1.myworkdayjobs.com/External/job/Ashburn-VA-US/Full-Stack-Developer_324845
- Excerpt: Full Stack Developer Ashburn, VA, US posted: Posted 30+ Days Ago

### Circle Lead Engineer (CLE) - Personal Insurance - The Travelers Companies, Inc.
- Location: CT - Hartford (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://travelers.wd5.myworkdayjobs.com/External/job/CT---Hartford/Circle-Lead-Engineer--CLE----Personal-Insurance_R-50797
- Excerpt: Circle Lead Engineer (CLE) - Personal Insurance CT - Hartford posted: Posted Today

### STAGE - Développeur Full Stack Python - GE Vernova
- Location: Aix-les-Bains (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- Parental leave: 10 weeks (not source-backed)
- Non-birth-parent leave: 10 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Aix-les-Bains/Dveloppeur-Full-Stack-Python_R5002053-2
- Excerpt: STAGE - Développeur Full Stack Python Aix-les-Bains posted: Posted 30+ Days Ago

### Applied AI Engineer - Bandwidth Inc
- Location: Raleigh, NC (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-11
- 401(k) match: listed (not source-backed)
- Apply: https://job-boards.greenhouse.io/bandwidth/jobs/8001620
- Excerpt: Applied AI Engineer Raleigh, NC Who We Are: Bandwidth , a prior “Best of EC” award winner, is a global software company that helps enterprises deliver exceptional experiences through voice, messaging, and emergency services. Reaching 65+ countries and over 90 percent of the global economy, we're the only provider offering an owned communications cloud that delivers advanced automation, AI integrations, global reach, and premium human support. Bandwidth is trusted for mission-critical communications by the Global 2000, hyperscalers, and SaaS builders! At Bandwidth, your music matters when you are part of the BAND. We celebrate differences and encourage BANDmates to be their authentic selves. #jointheband What We Are Looking For: As an Applied AI Engineer on the Corporate IT Engineering team, you'll identify where AI can create real leverage across our internal systems and operations, and build it. You'll work inside a team that owns a broad and complex infrastructure footprint, embedding AI into the platforms and workflows that keep Bandwidth running. This is an infrastructure and systems role with a deep AI focus. What You'll Do: - Own and extend existing AI platforms and tooling, improving reliability, expanding capabilities, and integrating them more deeply with internal systems. - Architect and build internal API layers and shared services that allow AI workflows and internal applications to publish, version, and retrieve outputs across the engineering ecosystem. - Identify and build AI-powered tooling that creates leverage across the Corporate IT Engineering stack, including infrastructure, identity, monitoring, and automation platforms. - Develop and iterate

### Machine Learning Engineer, Agentic AI - Trulia
- Location: Remote-USA (remote)
- Salary: Not disclosed
- Posted: 2026-05-12
- Apply: https://zillow.wd5.myworkdayjobs.com/Zillow_Group_External/job/Remote-USA/Machine-Learning-Engineer--Agentic-AI_P749437-2
- Excerpt: Machine Learning Engineer, Agentic AI Remote-USA posted: Posted 30+ Days Ago

### Conseiller Client (F/H) - Télévente B2B- Rabat - Français - Concentrix
- Location: MAR Rabat - Av Ibn Sina, 25 rue Oued Al Makhazine (unspecified)
- Salary: Not disclosed
- Posted: 2026-05-12
- 401(k) match: listed (not source-backed)
- Apply: https://cnx.wd1.myworkdayjobs.com/external_global/job/MAR-Rabat---Av-Ibn-Sina-25-rue-Oued-Al-Makhazine/Conseiller-Client--F-H----Tlvente-B2B--Rabat---Franais_R1674351
- Excerpt: Conseiller Client (F/H) - Télévente B2B- Rabat - Français MAR Rabat - Av Ibn Sina, 25 rue Oued Al Makhazine posted: Posted 30+ Days Ago

### KYC Data Metrics Analyst - Citigroup Inc.
- Location: MUMBAI, Mahārāshtra, India (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-12
- 401(k) match: listed (not source-backed)
- Apply: https://citi.eightfold.ai/careers/job/859035137609
- Excerpt: KYC Data Metrics Analyst MUMBAI, Mahārāshtra, India

### Principal Engineer, Embedded Software - Analog Devices
- Location: Romania, Cluj-Napoca (unspecified)
- Salary: Not disclosed
- Posted: 2026-06-08
- Parental leave: 6 weeks (not source-backed)
- Non-birth-parent leave: 6 weeks (not source-backed)
- 401(k) match: listed (not source-backed)
- Apply: https://analogdevices.wd1.myworkdayjobs.com/External/job/Romania-Cluj-Napoca/Principal-Engineer--Embedded-Software_R262716
- Excerpt: Principal Engineer, Embedded Software Romania, Cluj-Napoca posted: Posted 4 Days Ago

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Source-backed benefit claims include source links; other benefit values are labeled separately.