# FewerJobs export - 100 curated jobs Generated: 2026-11-12T18:54:32.904Z Source: https://fewerjobs.com ## Filters applied - **q**: ON Semiconductor - **quality_floor**: default - **match_401k_strict**: true - **parental_strict**: true - **non_birth_strict**: true - **pto_strict**: true - **include_older**: false - **apply_url_verified**: false - **page**: 4 - **per_page**: 100 - **sort**: relevance ## Jobs ### Senior Technical Recruiter - Renesas Electronics - Location: Taipei, , Taiwan (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000126900129-senior-technical-recruiter - Excerpt: Senior Technical Recruiter Taipei, , Taiwan Company Description: Job Description: Job Summary We are seeking a Senior Technical Recruiter with strong semiconductor industry expertise, particularly within Integrated Device Manufacturer (IDM) environments. The role leads the full end-to-end recruitment lifecycle while ensuring an exceptional experience for candidates and hiring managers, supported by high standards of data accuracy and process excellence. The ideal candidate is a hands-on technical recruiter with deep experience managing complex semiconductor requisitions and operating effectively in a fast-paced, global environment. Key Responsibilities End-to-End Technical Recruitment Lead the full recruitment cycle from requisition intake to offer acceptance. Develop tailored sourcing strategies for hard-to-fill semiconductor roles across design, manufacturing, test, packaging, and operations. Sourcing & Screening Leverage multiple sourcing channels, semiconductor talent communities, niche platforms, referrals, and proactive market mapping. Build longlists and shortlists of qualified semiconductor professionals by applying role-specific technical filters across semiconductor HW & SW R&D IC design, fabrication, equipment engineering, process engineering, test development, and related fields. Candidate & Stakeholder Management Provide high-quality CV presentations and candidate summaries to hiring managers. Advise hiring teams on market conditions, candidate availability, competitive intelligence, and recruitment timelines. Ensure consistent communication and outstanding experiences for candidates throughout the process. Operation & System Excellence Manage all recruitment status updates in ATS, ensuring transparency and accuracy. Partner closely with cross-functional teams including HRBPs, HR Operations, and Business Leaders for compliance and smooth Process flows. Qualifications: 5+ years of technical recruiting experience, with at least 3 years in semiconductor talent acquisition. Proven success ### Senior Chip Design Engineer - NVIDIA Corporation - Location: Israel, Tel Aviv (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Tel-Aviv/Senior-Chip-Design-Engineer_JR2009516 - Excerpt: Senior Chip Design Engineer Israel, Tel Aviv posted: Posted 30+ Days Ago ### Construction Superintendent - Fujifilm Holdings Corp. - Location: Mesa, AZ, US (onsite) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://uscareershub-fujifilm.icims.com/jobs/36739/construction-superintendent/job - Excerpt: Construction Superintendent Mesa, AZ, US Position Overview Who We Are FUJIFILM Electronic Materials, U.S.A., Inc., is a global leader in chemical solutions which enable the semiconductor industry and the digital universe. We have an exciting opportunity at our Mesa, Arizona facility for a Construction Superintendent! With state-of-the-art manufacturing facilities in the U.S., Europe, Taiwan, China, Korea and Japan, local sales offices throughout the world and on-site applications support, FUJIFILM Electronic Materials supplies the world's top tier semiconductor manufacturers with a broad array of products and services used throughout the semiconductor manufacturing process. The Role The Construction Superintendent will monitor projects from planning, scheduling, and commissioning to close of project. They will be directly responsible for the safe execution of construction projects in accordance with regulatory and internal site requirements, policies, and procedures. Company Overview FUJIFILM Electronic Materials, U.S.A. fuels innovation in the semiconductor industry-where chemistry meets technology. Our advanced materials and formulations enable manufacturers to build the microchips that power Artificial Intelligence, computers, electric vehicles, smartphones, and more. We're a global business-to-business supplier of chemical formulations and advanced materials used for manufacturing and packaging semiconductors. Our chemical formulations allow top manufacturers to produce microchips that both power and connect our ### Senior Principal SoC Design Engineer - NXP Semiconductors - Location: Pune (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-Principal-SoC-Design-Engineer_R-10062451 - Excerpt: Senior Principal SoC Design Engineer Pune posted: Posted 30+ Days Ago ### Electrical Engineering Embedded Hardware Specialist - Eaton Corporation - Location: Moon Township, Pennsylvania, USA, 15108 (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://eaton.eightfold.ai/careers/job/687237089687 - Excerpt: Electrical Engineering Embedded Hardware Specialist Moon Township, Pennsylvania, USA, 15108 ### Account Manager III (Service Sales, Semiconductor – North America) - Thermo Fisher Scientific - Location: Remote, Texas, United States of America (remote) - Salary: Not disclosed - Posted: 2026-04-30 - 401(k) match: listed (not source-backed) - Apply: https://thermofisher.wd5.myworkdayjobs.com/ThermoFisherCareers/job/Remote-Texas-USA/Account-Manager-III--Semiconductor--Central-Western-US---REMOTE-_R-01349226/apply - Excerpt: Account Manager III (Service Sales, Semiconductor – North America) Remote, Texas, United States of America Embrace the opportunity to become an Account Manager III supporting semiconductor innovation across Central and Western US. Drive service sales, build strong customer relationships, and deliver tailored solutions for advanced instrumentation. Collaborate with cross-functional teams and mentor peers while making a real impact in technology and sustainability. Grow your career with Thermo Fisher Scientific. ### Pre-Silicon Validation Engineer - Intel - Location: 2 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-05-24 - 401(k) match: listed (not source-backed) - Apply: https://intel.wd1.myworkdayjobs.com/External/job/Israel-Petah-Tikva/Pre-Silicon-Validation-Engineer_JR0283725 - Excerpt: Pre-Silicon Validation Engineer 2 Locations posted: Posted 19 Days Ago ### Diffusion Engineer - ON Semiconductor - Location: Hopewell Junction, NY, United States (unspecified) - Salary: Not disclosed - Posted: 2026-05-26 - Apply: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505563 - Excerpt: Diffusion Engineer Hopewell Junction, NY, United States Diffusion Engineer ### Senior Wet Etch Equipment Engineer, Raxium - Google - Location: Fremont, CA, USA (unspecified) - Salary: $144K-$209K - Posted: 2026-06-05 - Parental leave: 18 weeks (not source-backed) - Non-birth-parent leave: 18 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckcooGbS6K6Xp3QclKMmcQg6IQ2zEa6i_KRHwZDProXg3EjsACxwdTBzoMGryBawcP7ITZT1KIIOvVTzHn0An9SjgnmXxoFxTMi0Bn7Snc9TSvOft-ByKcOpi8GxdSw%3D%3D_V2&loc=US&title=Senior+Wet+Etch+Equipment+Engineer - Excerpt: Senior Wet Etch Equipment Engineer, Raxium Fremont, CA, USA The Raxium Facility and Equipment team maintains a broad range of semiconductor and facility equipment and cleanroom infrastructure. Our expertise lies in understanding the relationship between semiconductor processing and its support equipment, enabling us to troubleshoot problems, execute tasks and collaborate on installing, modifying, maintaining and repairing cleanroom and facility support equipment. As a Senior Equipment Engineer, you will support our microLED and AR development. You will focus on expert-level maintenance, support and optimization of our semiconductor wet processing equipment. Supporting advanced wet processing equipment, you will assist with other critical tool sets if needed, including but not limited to automated wet benches, chemical handling, ECP, CMP, SRDs and CDUs. You will support installations, troubleshoot complex issues and perform preventive maintenance to maximize the reliability and performance of our toolsets.Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $144000 - $209000 (USD) + 15% bonus target + bonus + equity + benefits Learn more about benefits at Google . Support semiconductor equipment ### Field Applications Engineer - Microprocessors - NXP Semiconductors - Location: 4 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-06-09 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Field-Applications-Engineer---Microprocessors_R-10063910-1 - Excerpt: Field Applications Engineer - Microprocessors 4 Locations posted: Posted 3 Days Ago ### Global Demand Planner - Axcelis Technologies INC - Location: Beverly, MA (onsite) - Salary: $92K-$137K - Posted: 2026-06-04 - 401(k) match: listed (not source-backed) - Childcare support: no (not source-backed) - Apply: https://axcelis.wd1.myworkdayjobs.com/axcelis/job/Beverly-MA/Global-Demand-Planner_11609 - Excerpt: Global Demand Planner Beverly, MA JOB DESCRIPTION Global Demand Planner *Local candidates within a driving distance to the Beverly, MA area are encouraged to apply* On-site | Semiconductor Industry Want to discover just how far your intellectual curiosity can take you? You're in the right place. For more than four decades, Axcelis Technologies has been at the forefront of innovation in semiconductor manufacturing technology. Chipmakers around the globe rely on our tools and process expertise to deliver the semiconductors that power modern life from smartphones and computers to cameras and cars. We have become a technology leader by providing the innovation necessary for business to thrive, quality of life to advance, and the environment to flourish-enabling a truly sustainable future. Our influence is global, with more than 30 offices worldwide, an installed base of thousands worldwide and a customer list that includes the world's largest semiconductor manufacturers. Our team is expanding, and we are seeking a highly experienced Global Demand Planner with deep expertise in Servigistics Parts Planning and Kinaxis Maestro to manage and optimize global service parts demand and supply planning. This role supports mission-critical semiconductor equipment uptime by ensuring service parts availability while effectively managing inventory investment, engineering changes, and product life-cycle complexity. Overview We are seeking a Global Demand Planner to provide planning leadership at the intersection of Service, Factory Operations, and Engineering. This role owns service parts and customer upgrade planning for high-value semiconductor programs, ensuring strong factory alignment, material readiness, and on-time customer execution. What ### Product Engineer - Lattice Semiconductor - Location: Alabang Muntinlupa City, UNAVAILABLE, PH (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://careers-latticesemi.icims.com/jobs/3600/product-eng-3/job - Excerpt: Product Engineer Alabang Muntinlupa City, UNAVAILABLE, PH Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for. Responsibilities & Skills Responsibilities Develop ATE test and characterization programs. Develop characterization test plans using established methodologies targeted on chip IP functions and features. Execute characterization of target chip IP features using wafer-level ATE, package-level ATE, and package-level bench platforms across process, temperature, and voltage conditions. Apply statistical analysis on collected characterization data to define key product datasheet parameters and report out results. Identify and analyze to root cause product marginalities, com ### 半導体エンジニア（2026・2027年卒／既卒歓迎）｜Semiconductor Engineer – Class of 2026/2027 & Recent Graduates - Micron Technology, Inc. - Location: Hiroshima - Fab 15, Japan (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://micron.wd1.myworkdayjobs.com/External/job/Hiroshima---Fab-15-Japan/XMLNAME--26-27----Semiconductor-Engineer--Class-of-2026-27-and-Recent-Graduates-_JR87266 - Excerpt: 半導体エンジニア（2026・2027年卒／既卒歓迎）｜Semiconductor Engineer – Class of 2026/2027 & Recent Graduates Hiroshima - Fab 15, Japan posted: Posted 30+ Days Ago ### Technician Area 2 - NXP Semiconductors - Location: Nijmegen (unspecified) - Salary: Not disclosed - Posted: 2026-06-06 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Nijmegen/Technician-Area-2_R-10063172-1 - Excerpt: Technician Area 2 Nijmegen posted: Posted 6 Days Ago ### DRAM Product Engineer - Module/ATE DFT - Micron Technology, Inc. - Location: Taichung - Fab 16, Taiwan (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://micron.wd1.myworkdayjobs.com/External/job/Taichung---Fab-16-Taiwan/DRAM-Product-Engineer---Module-ATE-DFT_JR93991 - Excerpt: DRAM Product Engineer - Module/ATE DFT Taichung - Fab 16, Taiwan posted: Posted 30+ Days Ago ### Wet Lab Technician - Fujifilm Holdings Corp. - Location: Mesa, AZ, US (onsite) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://uscareershub-fujifilm.icims.com/jobs/36993/wet-lab-technician/job - Excerpt: Wet Lab Technician Mesa, AZ, US Position Overview FUJIFILM Electronic Materials, U.S.A., Inc., is a global leader in chemical solutions which enable the semiconductor industry and the digital universe. We have an exciting opportunity at our Mesa, AZ facility for a Wet Lab Technician! With state-of-the-art manufacturing facilities in the U.S., Europe, Taiwan, China, Korea and Japan, local sales offices throughout the world and on-site applications support, FUJIFILM Electronic Materials supplies the world's top tier semiconductor manufacturers with a broad array of products and services used throughout the semiconductor manufacturing process. The Role The Wet Lab Technician will be responsible for mixing and testing CMP slurries, operating wet lab characterization tools; executing test plans, generating test data, and maintaining CMP equipment Company Overview FUJIFILM Electronic Materials, U.S.A. fuels innovation in the semiconductor industry-where chemistry meets technology. Our advanced materials and formulations enable manufacturers to build the microchips that power Artificial Intelligence, computers, electric vehicles, smartphones, and more. We're a global business-to-business supplier of chemical formulations and advanced materials used for manufacturing and packaging semiconductors. Our chemical formulations allow top manufacturers to produce microchips that both power and connect our digital world. Think you've got what it takes to build a more connected world? Then connect with us today and challeng ### Senior AI SoC Design Engineer - Intel - Location: 2 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-05-28 - 401(k) match: listed (not source-backed) - Apply: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/Senior-AI-SoC-Design-Engineer_JR0283668 - Excerpt: Senior AI SoC Design Engineer 2 Locations posted: Posted 15 Days Ago ### Sr. Surface Chemist - Fujifilm Holdings Corp. - Location: Mesa, AZ, US (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://uscareershub-fujifilm.icims.com/jobs/37823/sr.-surface-chemist/job - Excerpt: Sr. Surface Chemist Mesa, AZ, US Position Overview FUJIFILM Electronic Materials, U.S.A., Inc., is a global leader in chemical solutions which enable the semiconductor industry and the digital universe. We have an exciting opportunity at our Mesa, AZ facility for a Sr. Surface Chemist! The Role The Sr. Surface Chemist will advance our CMP slurries through fundamental studies of formulation chemistry, material surface characterization, and their interactions with semiconductor materials. This role drives innovation in next-generation CMP slurries and pCMP cleans. It collaborates with cross-functional teams to address complex technical challenges for advanced semiconductor technologies. Company Overview FUJIFILM Electronic Materials, U.S.A. fuels innovation in the semiconductor industry-where chemistry meets technology. Our advanced materials and formulations enable manufacturers to build the microchips that power Artificial Intelligence, computers, electric vehicles, smartphones, and more. We're a global business-to-business supplier of chemical formulations and advanced materials used for manufacturing and packaging semiconductors. Our chemical formulations allow top manufacturers to produce microchips that both power and connect our digital world. Think you've got what it takes to build a more connected world? Then connect with us today and challenge the boundaries of what's possible-for the world and your future. We have six U.S. manufacturing and Research & Development facilities, located in: Mesa, Arizon ### Production Planner - Fujifilm Holdings Corp. - Location: Mesa, AZ, US (onsite) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://uscareershub-fujifilm.icims.com/jobs/37588/production-planner/job - Excerpt: Production Planner Mesa, AZ, US Position Overview FUJIFILM Electronic Materials, U.S.A., Inc., is a global leader in chemical solutions which enable the semiconductor industry and the digital universe. We have an exciting opportunity at our Mesa, AZ facility for a Production Planner! With state-of-the-art manufacturing facilities in the U.S., Europe, Taiwan, China, Korea and Japan, local sales offices throughout the world and on-site applications support, FUJIFILM Electronic Materials supplies the world's top tier semiconductor manufacturers with a broad array of products and services used throughout the semiconductor manufacturing process. The Role The Production Planner is responsible for planning, scheduling, and managing inventories to support domestic and international sales requirements, ensuring optimal resource utilization and timely fulfillment. They will oversee accurate planning data and collaborate with cross-functional teams to maintain an efficient and responsive supply chain. Company Overview FUJIFILM Electronic Materials, U.S.A. fuels innovation in the semiconductor industry-where chemistry meets technology. Our advanced materials and formulations enable manufacturers to build the microchips that power Artificial Intelligence, computers, electric vehicles, smartphones, and more. We're a global business-to-business supplier of chemical formulations and advanced materials used for manufacturing and packaging semiconductors. Our chemical formulations allow top manufacturers to produce microchip ### Warehouse Technician - Fujifilm Holdings Corp. - Location: Mesa, AZ, US (onsite) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://uscareershub-fujifilm.icims.com/jobs/37585/warehouse-technician/job - Excerpt: Warehouse Technician Mesa, AZ, US Position Overview FUJIFILM Electronic Materials, U.S.A., Inc., is a global leader in chemical solutions which enable the semiconductor industry and the digital universe. We have an exciting opportunity at our Mesa, Arizona facility for a Warehouse Technician! With state-of-the-art manufacturing facilities in the U.S., Europe, Taiwan, China, Korea and Japan, local sales offices throughout the world and on-site applications support, FUJIFILM Electronic Materials supplies the world's top tier semiconductor manufacturers with a broad array of products and services used throughout the semiconductor manufacturing process. The Role Our Warehouse Technician positions fill a critical need in FUJIFILM's chemical plant operations. They are responsible for shipping and receiving of hazardous chemicals according to all Quality and ISO 45001 standards. They must also follow all D.O.T and CFR 49 requirements. Company Overview FUJIFILM Electronic Materials, U.S.A. fuels innovation in the semiconductor industry-where chemistry meets technology. Our advanced materials and formulations enable manufacturers to build the microchips that power Artificial Intelligence, computers, electric vehicles, smartphones, and more. We're a global business-to-business supplier of chemical formulations and advanced materials used for manufacturing and packaging semiconductors. Our chemical formulations allow top manufacturers to produce microchips that both power and connect our digital world. Think you've got ### Warehouse Technician I - Fujifilm Holdings Corp. - Location: Pueblo, CO, US (onsite) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://uscareershub-fujifilm.icims.com/jobs/37736/warehouse-technician-i/job - Excerpt: Warehouse Technician I Pueblo, CO, US Position Overview Who We Are FUJIFILM Electronic Materials, U.S.A., Inc., is a global leader in chemical solutions which enable the semiconductor industry and the digital universe. We have an exciting opportunity at our Pueblo, CO facility for a Warehouse Technician! With state-of-the-art manufacturing facilities in the U.S., Europe, Taiwan, China, Korea and Japan, local sales offices throughout the world and on-site applications support, FUJIFILM Electronic Materials supplies the world's top tier semiconductor manufacturers with a broad array of products and services used throughout the semiconductor manufacturing process. The Role The Warehouse Technician will ship and receive hazardous chemicals according to all quality and ISO 45001, 9001 standards, and by following all DOT and CFR49 requirements. Company Overview FUJIFILM Electronic Materials, U.S.A. fuels innovation in the semiconductor industry-where chemistry meets technology. Our advanced materials and formulations enable manufacturers to build the microchips that power Artificial Intelligence, computers, electric vehicles, smartphones, and more. We're a global business-to-business supplier of chemical formulations and advanced materials used for manufacturing and packaging semiconductors. Our chemical formulations allow top manufacturers to produce microchips that both power and connect our digital world. Think you've got what it takes to build a more connected world? Then connect with us today and challenge the bou ### Filed Application Engineer - ON Semiconductor - Location: Bangalore, Karnataka, India (unspecified) - Salary: Not disclosed - Posted: 2026-05-20 - Apply: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505504 - Excerpt: Filed Application Engineer Bangalore, Karnataka, India Filed Application Engineer ### Electronics Engineer - Ulysses - Location: San Francisco, CA (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://app.dover.com/apply/Ulysses%20Inc./b20d2495-757f-42f3-82d2-b447f31828df - Excerpt: Electronics Engineer San Francisco, CA Electronics Engineer ### Semiconductor Equipment Engineer - 3rd Shift - Raytheon Technologies - Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-06-09 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---3rd-Shift_01851618 - Excerpt: Semiconductor Equipment Engineer - 3rd Shift US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 3 Days Ago ### Post-silicon Validation and Debug Engineer - Intel - Location: 2 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-06-05 - 401(k) match: listed (not source-backed) - Apply: https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Post-silicon-Validation-and-Debug-Engineer_JR0282304 - Excerpt: Post-silicon Validation and Debug Engineer 2 Locations posted: Posted 7 Days Ago ### Section Lead - Semiconductor Fab, Test and Inspection - Raytheon Technologies - Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-29 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Section-Lead---Semiconductor-Fab--Test-and-Inspection_01848054 - Excerpt: Section Lead - Semiconductor Fab, Test and Inspection US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 14 Days Ago ### SoC Front End Design Engr - NXP Semiconductors - Location: Noida (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Noida/SoC-Front-End-Design-Engr_R-10060587 - Excerpt: SoC Front End Design Engr Noida posted: Posted 30+ Days Ago ### Principal Engineer SiC Epitaxy (f/m/div) - Infineon Technologies - Location: Villach (Austria) (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://infineon.eightfold.ai/careers/job/563808960167581 - Excerpt: Principal Engineer SiC Epitaxy (f/m/div) Villach (Austria) ### Semiconductor Equipment Engineer - 4th shift - Raytheon Technologies - Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---4th-shift_01851612 - Excerpt: Semiconductor Equipment Engineer - 4th shift US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 2 Days Ago ### Semiconductor Equipment Engineer - Dielectrics Lead - Raytheon Technologies - Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---Dielectrics-Lead_01837532 - Excerpt: Semiconductor Equipment Engineer - Dielectrics Lead US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago ### 4th Shift Technical Lead – Semiconductor Fab - Raytheon Technologies - Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-29 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/XMLNAME-4th-Shift-Technical-Lead---Semiconductor-Fab_01848717 - Excerpt: 4th Shift Technical Lead – Semiconductor Fab US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 14 Days Ago ### Senior SoC Architect - MCU - NXP Semiconductors - Location: Yokneam Ilit (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Yokneam-Ilit/Senior-SoC-Architect---MCU_R-10062776 - Excerpt: Senior SoC Architect - MCU Yokneam Ilit posted: Posted 30+ Days Ago ### Senior Applications Engineer - RF & Silicon Photonics - STMicroelectronics - Location: Santa Clara, United States (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://stmicroelectronics.eightfold.ai/careers/job/563637172465420 - Excerpt: Senior Applications Engineer - RF & Silicon Photonics Santa Clara, United States ### Senior Principal Semiconductor Tech Lead Engineer - Raytheon Technologies - Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Principal-Semiconductor-Tech-Lead-Engineer_01829265 - Excerpt: Senior Principal Semiconductor Tech Lead Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago ### Senior Section Lead - Semiconductor Fab Test and Inspection - Raytheon Technologies - Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-29 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Senior-Section-Lead---Semiconductor-Fab-Test-and-Inspection_01848055 - Excerpt: Senior Section Lead - Semiconductor Fab Test and Inspection US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 14 Days Ago ### Principal Engineer, Quality and Reliability - ON Semiconductor - Location: Allen, TX, United States (unspecified) - Salary: Not disclosed - Posted: 2026-06-11 - Apply: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505319 - Excerpt: Principal Engineer, Quality and Reliability Allen, TX, United States Principal Engineer, Quality and Reliability ### Sr Procurement Specialist - Renesas Electronics - Location: Bayan Lepas, , Malaysia (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000128245600-sr-procurement-specialist - Excerpt: Sr Procurement Specialist Bayan Lepas, , Malaysia Company Description: Job Description: We are looking for a Procurement Specialist to support new product introduction (NPI) programs for advanced semiconductor solutions. Working closely with Engineering, Manufacturing, and Quality teams, this role will drive sourcing and supplier management for direct, secondary, and packing materials. The position plays a key role in ensuring cost-effective, reliable supply to support next-generation AI-powered products. Key Responsibilities Source materials to support semiconductor development and production needs Manage RFQ/RFP processes and evaluate supplier quotations Negotiate pricing, commercial terms, and supplier agreements Engage suppliers early to support new product builds (NPI) Issue purchase orders and ensure on-time delivery, resolving supply issues as needed Support supplier audits and performance evaluation Qualifications: Must Have: Bachelor's degree in business, Supply Chain, Industrial Studies, or related field. 3-5 years of experience in semiconductor operations or manufacturing. Proven experience in sourcing, negotiation, and supplier management. Strong analytical skills to evaluate cost, supplier performance, and commercial terms. Good communication skills and proactive, solution-oriented mindset. Good to Have: Experience supporting NPI programs or advanced packaging. Familiarity with semiconductor materials (direct, indirect, packing). Exposure to supplier audits and quality systems. Additional Information: Renesas is an embedded semiconductor solution provider driven by its Purpose ' To Make Our Lives Easier .' As the industry's leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including ### Component Engineer - Semiconductor Devices - Cisco - Location: San Jose, California, US (unspecified) - Salary: $136K-$193K - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://cisco.wd5.myworkdayjobs.com/Cisco_Careers/job/San-Jose-California-US/Component-Engineer---Semiconductor-Devices_2011402 - Excerpt: Component Engineer - Semiconductor Devices San Jose, California, US The application window is expected to close on: 05/31/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received . Meet the Team The Cisco Component Quality and Technology team provides outstanding customer value through technical innovation and quality solutions. We are seeking a driven and experienced technical expert in semiconductor components and their applications in high-speed systems. Devices we work with include ASICs, NPUs, CPUs, Ethernet switches, FPGAs, PHYs, retimers, etc. You will work directly with Cisco design, manufacturing, operations and quality engineering teams, as well as component vendors. Your Impact Conduct semiconductor component selection, testing, and qualification to meet product specifications. Lead investigations and end-to-end failure analysis for component and system issues, working with vendors to define, implement, and verify corrective and preventive actions (8D, RCCA, etc.) Collaborate with cross-functional teams on component selection, risk assessment, design reviews, and proactively drive risk mitigation. Analyze and influence vendor technology roadmaps in support of Cisco product development requirements. Minimum Qualifications Bachelor's degree in Electrical Engineering, Computer Engineering, or related fields 2+ years of experience in the semiconductor/networking/server/computer/embedded industry Preferred Qualifications 4+ years of experience in the semiconductor/networking/server/computer/embedded industry. Experience with semiconductor components including ASICs, XPUs, FPGAs, PHYs, SerDes retimers. Strong understanding of semiconductor design, fabrication, characterization, qualification, testing, quality, reliability, failure analysis Experience collaborating with stakeholders including hardware and software engineering, operations and manufacturing. Excellent problem-solving, communication, and collaboration skills. Ability ### Process Integration Device Engineer - NXP Semiconductors - Location: Shanghai (JingAn) (unspecified) - Salary: Not disclosed - Posted: 2026-05-19 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Shanghai-JingAn/Process-Integration-Device-Engineer_R-10063267 - Excerpt: Process Integration Device Engineer Shanghai (JingAn) posted: Posted 24 Days Ago ### Semiconductor Assembly Process Development Engineer - Renesas Electronics - Location: Yonezawa, Yamagata, Japan (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000131399509-semiconductor-assembly-process-development-engineer - Excerpt: Semiconductor Assembly Process Development Engineer Yonezawa, Yamagata, Japan Company Description: Job Description: Our company actively drives technological innovation in semiconductor back-end processes, with a strong focus on next-generation packaging technologies such as Flip Chip and System-in-Package (SiP). In rapidly growing fields-including AI, high-performance computing (HPC), automotive, and IoT-there is increasing demand for packaging solutions with higher density, enhanced reliability, and superior thermal performance. In response, we are accelerating the development of advanced technologies such as FCCSP (Flip Chip Chip Scale Package) and FCBGA (Flip Chip Ball Grid Array). As device architectures become more complex and multifunctional, expanding our technological capabilities and strengthening our development organization are essential. To support this growth, we are seeking engineers with expertise in semiconductor back-end processes. This role offers the opportunity to work at the forefront of innovation-developing high-density, high-heat-dissipation packages for AI/HPC, as well as high-reliability solutions for automotive and IoT applications-and to contribute to technologies that underpin transformative advancements such as AI and autonomous driving. You will be responsible for technology development in semiconductor back-end processes, including assembly, packaging, and testing: Development and evaluation of advanced packaging technologies, including FCCSP and FCBGA Material and process development, as well as improvement of assembly processes (e.g., molding, strip grinding, ball mounting, marking, and package sawing) Support for production line setup and transition to mass production Driving process quality improvements and yield enhancement activities Qualifications: [MUST] Minimum of 5 years of experience in technology development for semiconductor back-end processes (assembly and packaging) At least 5 years ### Senior Chip Design Engineer - NVIDIA Corporation - Location: Israel, Tel Aviv (unspecified) - Salary: Not disclosed - Posted: 2026-06-03 - 401(k) match: listed (not source-backed) - Apply: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Tel-Aviv/Senior-Chip-Design-Engineer_JR2018140 - Excerpt: Senior Chip Design Engineer Israel, Tel Aviv posted: Posted 9 Days Ago ### Senior ASIC Design Engineer - NXP Semiconductors - Location: Pune (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Pune/Senior-ASIC-Design-Engineer_R-10061321-1 - Excerpt: Senior ASIC Design Engineer Pune posted: Posted 30+ Days Ago ### Semiconductor Reverse Engineering Specialist, AI Domain Expert - PatSnap - Location: Singapore (unspecified) - Salary: Not disclosed - Posted: 2026-05-27 - Apply: https://jobs.lever.co/patsnap/5edb10a2-12ff-44db-b1c8-9488e8e8c361 - Excerpt: Semiconductor Reverse Engineering Specialist, AI Domain Expert Singapore About the Role We are seeking an experienced Semiconductor Reverse Engineering Specialist to serve as the core domain anchor for our Eureka Materials AI Agent product. You will collaborate closely with Product Managers and AI Engineers to translate deep semiconductor industry expertise into structured knowledge systems, standardized analytical workflows, and domain-specific AI capabilities. This is a high-leverage individual contributor role. You will spend approximately 70% of your time architecting domain knowledge systems, packaging professional workflows into reusable AI Skills, and defining industry-grade standards for AI retrieval and reasoning. The remaining 30% focuses on high-value reverse engineering analysis and technical validation to ensure authoritative, industry-aligned AI outputs. No team management or hands-on lab equipment operation (TEM/SEM/EDA) is required. About the Role We are seeking an experienced Semiconductor Reverse Engineering Specialist to serve as the core domain anchor for our Eureka Materials AI Agent product. You will collaborate closely with Product Managers and AI Engineers to translate deep semiconductor industry expertise into structured knowledge systems, standardized analytical workflows, and domain-specific AI capabilities. This is a high-leverage individual contributor role. You will spend approximately 70% of your time architecting domain knowledge systems, packaging professional workflows into reusable AI Skills, and defining industry-grade standards for AI retrieval and reasoning. The remaining 30% focuses on high-value reverse engineering analysis and technical validation to ensure authoritative, industry-aligned AI outputs. No team management or hands-on lab equipment operation (TEM/SEM/EDA) is required. Key Responsibilities - Domain Authority: Serve as the ### Semiconductor Process Engineering – Diffusion, Wet Etch & CMP - Vishay Precision Group INC - Location: Newport, UK (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://vishay.wd3.myworkdayjobs.com/VishayCareers/job/Newport-UK/Semiconductor-Process-Engineering-Manager---Diffusion--Wet-Etch---CMP_JR-14244-1 - Excerpt: Semiconductor Process Engineering – Diffusion, Wet Etch & CMP Newport, UK Role Overview We are seeking a Wet Etch & Chemical Mechanical Planarisation (CMP) Process Engineer to support and develop advanced semiconductor manufacturing processes within a high‑volume wafer fabrication environment. All experience levels will be considered however strong preference is given to candidates with significant experience and seniority, capable of operating with minimal supervision and providing technical leadership. Experience with wet/CMP techniques is a prerequisite for this role. The role will suit candidates from a wafer fab or semiconductor equipment vendor background, particularly those with experience in power semiconductor technologies. Experience with SiC and GaN technologies is desirable but not essential. Key Responsibilities Develop and own wet etch and CMP processes in production Drive process stability, yield improvement, defectivity reduction, capability enhancement and cost down projects of varying scope and complexity, both as team lead or as part of a larger team Investigate and resolve process excursions, particle issues and reliability concerns using structured root cause analysis techniques (8D, FMEA etc) Lead process qualification and change management activities Provide technical input to new product introductions (NPI) and technology transfers Define and maintain process specifications, control plans, SPC methodologies and documentation Engage with tool vendors to progress drive tool installs and performance improvements Mentor and technically support junior engineers where appropriate Required Qualifications & Experience Degree (or equivalent experience) in Materials Science, Chemical Engineering, Physics or related discipline Practical experience as a process engineer in a semiconductor wafer fab or comparable ### Senior SoC Integration Engineer - Micron Technology, Inc. - Location: Taipei - MTT office, Taiwan (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://micron.wd1.myworkdayjobs.com/External/job/Taipei---MTT-office-Taiwan/Senior-SoC-Integration-Engineer_JR89682-1 - Excerpt: Senior SoC Integration Engineer Taipei - MTT office, Taiwan posted: Posted 30+ Days Ago ### Senior Principal Semiconductor Equipment & Process Integration Engineer - Raytheon Technologies - Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-29 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Principal-Semiconductor-Equipment---Process-Integration-Engineer_01848723-1 - Excerpt: Senior Principal Semiconductor Equipment & Process Integration Engineer US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 14 Days Ago ### USB & USB PD System and Application Engineer - NXP Semiconductors - Location: 3 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chandler-Office/USB---USB-PD-System-and-Application-Engineer_R-10063205 - Excerpt: USB & USB PD System and Application Engineer 3 Locations posted: Posted 30+ Days Ago ### Senior Semiconductor Facilities Engineer (Onsite - Andover MA) - Raytheon Technologies - Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (onsite) - Salary: Not disclosed - Posted: 2026-06-08 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Senior-Semiconductor-Facilities-Engineer--Onsite---Andover-MA-_01847675 - Excerpt: Senior Semiconductor Facilities Engineer (Onsite - Andover MA) US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 4 Days Ago ### SI/PI Engineer - Etched - Location: San Jose, CA, United States (unspecified) - Salary: Not disclosed - Posted: 2026-04-30 - Mental health support: yes (not source-backed) - Apply: https://jobs.ashbyhq.com/etched/d02d77c6-5e99-4184-9e3b-a2180152f95d - Excerpt: SI/PI Engineer San Jose, CA, United States About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary We are looking for a Signal Integrity and Power Integrity (SI/PI) Engineer to join our platform electrical engineering team. In this role, you will own the SI/PI methodology for high-speed PCB and system designs - from early architecture through final release - ensuring electrical margins are met across interfaces running at multi-gigabit data rates. Key Responsibilities - Perform pre- and post-layout SI simulations for high-speed serial interfaces including PCIe Gen5/Gen6, 112G/224G Ethernet. - Conduct channel analysis and link budget calculations; define topology constraints, trace geometry, stack-up requirements, and via optimization guidelines for PCB designers. - Develop and maintain COM, IBIS, S-parameter, and SPICE models; correlate simulation results against lab measurements. - Execute power delivery network (PDN) design and analysis: target impedance profiling, decoupling capacitor selection, AC/DC power analysis, and IR-drop simulation. - Drive DFI and design rule checks for SI/PI compliance; work with layout teams in Cadence Allegro / Sigrity or Ansys SIwave. - Collaborate with PCB design and layout ### Senior Silicon Photonics TD Reliability Engineer - Intel - Location: 3 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-06-05 - 401(k) match: listed (not source-backed) - Apply: https://intel.wd1.myworkdayjobs.com/External/job/US-New-Mexico-Albuquerque/Senior-Silicon-Photonics-TD-Reliability-Engineer_JR0284419 - Excerpt: Senior Silicon Photonics TD Reliability Engineer 3 Locations posted: Posted 7 Days Ago ### Raytheon Fulltime 2026 - Semiconductor Foundry Engineer II - Raytheon Technologies - Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Raytheon-Fulltime-2026---Semiconductor-Foundry-Engineer-II_01837192 - Excerpt: Raytheon Fulltime 2026 - Semiconductor Foundry Engineer II US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 30+ Days Ago ### Embedded HW/FW engineer - Infineon Technologies - Location: Taipei (Taiwan) (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://infineon.eightfold.ai/careers/job/563808970407705 - Excerpt: Embedded HW/FW engineer Taipei (Taiwan) ### Raytheon Full Time 2026 - Semiconductor Foundry Engineer I - Raytheon Technologies - Location: US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-14 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR1--358-Lowell-St--AR1-DUKES-BLDG/Raytheon-Full-Time-2026---Semiconductor-Foundry-Engineer-I_01837187 - Excerpt: Raytheon Full Time 2026 - Semiconductor Foundry Engineer I US-MA-ANDOVER-AR1 ~ 358 Lowell St ~ AR1 DUKES BLDG posted: Posted 29 Days Ago ### Hardware Engineer(eInfochips Inc) - Arrow Electronics - Location: Benton Harbor, Michigan, United States of America (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://arrow.wd1.myworkdayjobs.com/AC/job/Benton-Harbor-Michigan/Hardware-Engineer-eInfochips-Inc-_R242806/apply - Excerpt: Hardware Engineer(eInfochips Inc) Benton Harbor, Michigan, United States of America Join our team as a Senior Hardware Engineer and drive the next-gen HMI module architecture for leading-edge semiconductor designs. Collaborate with top-tier teams, design high-speed PCBs, and ensure robust hardware integration. Shape innovative solutions in a dynamic, growth-focused environment. Ready to make an impact? Apply now to advance your engineering career! ### Global Sourcing Manager, Semiconductor Components - Anduril - Location: Costa Mesa, California, United States (unspecified) - Salary: $146K-$194K - Posted: 2026-04-02 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/5098468007?gh_jid=5098468007 - Excerpt: Global Sourcing Manager, Semiconductor Components Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB The Global Sourcing Manager, Semiconductor is the domain expert for the semiconductor component commodities for Anduril Industries. This is a proactive, high-impact role in securing critical components, materials, and services that power our products. This role will be responsible for developing new supplier and new sourcing partnerships that can be incorporated into new products, as well as existing products to improve their technologies, cost, and quality. There is broad internal cross functional partnership to evaluate supplier opportunities, while ensuring commercial agreements, intellectual property, and statement of works are accurate and well established prior to pipelining. WHAT YOU'LL DO - Develop and execute commodity strategies for semiconductor components, focusing on cost reduction, quality improvement, and supply chain resilience - End-to-end responsibility for delivering quality parts, when needed, at the right ### Intership: System On Chip FE Designer - STMicroelectronics - Location: Agrate Brianza, Italy (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://stmicroelectronics.eightfold.ai/careers/job/563637170372948 - Excerpt: Intership: System On Chip FE Designer Agrate Brianza, Italy ### Sr. Global Supply Manager, Semiconductor Intellectual Property - SpaceX - Location: Bastrop, TX (unspecified) - Salary: Not disclosed - Posted: 2026-05-13 - Apply: https://boards.greenhouse.io/spacex/jobs/8539210002?gh_jid=8539210002 - Excerpt: Sr. Global Supply Manager, Semiconductor Intellectual Property Bastrop, TX SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. GLOBAL SUPPLY MANAGER , SEMICONDUCTOR INTELLECTUAL PROPERTY (IP) RESPONSIBILITIES: - Responsible for development and management of SpaceX's intellectual property (IP) portfolio (patents, trademarks, trade secrets around business products and technologies in support of the business strategy) as it pertains to semiconductor manufacturing - Work closely with engineering teams to identify and assess competitive patent, trademark and trade secret assets, and impact on desired business outcomes - Work closely with SpaceX legal counsel to ensure proper IP rights are acquired for specific manufacturing processes - Assess cost and risk of IP for various manufacturing strategies and advise leadership on the strategies that should be pursued and avoided - Prepare and maintain applicable IP contract forms and/or clauses - Create playbooks and training materials for IP strategy development on future manufacturing processes - Engage and negotiate directly with vendors for purchase or license of IP - Develop and negotiate complex technical transactions, including development and supply agreements for equipment and joint development BASIC QUALIFICATIONS: - 7+ years of procurement experience - 5+ years of experience in Intellectual Property (IP) negotiations - 5+ years of experience in manufacturing - 5+ years of experience in semiconductor industry ### Product Support Chemist - Fujifilm Holdings Corp. - Location: Mesa, AZ, US (onsite) - Salary: Not disclosed - Posted: 2026-06-10 - Apply: https://uscareershub-fujifilm.icims.com/jobs/37425/product-support-chemist/job - Excerpt: Product Support Chemist Mesa, AZ, US Position Overview FUJIFILM Electronic Materials, U.S.A., Inc., is a global leader in chemical solutions which enable the semiconductor industry and the digital universe. We have an exciting opportunity at our Mesa, AZ facility for a Product Support Chemist to support our CMP Wet Lab! With state-of-the-art manufacturing facilities in the U.S., Europe, Taiwan, China, Korea and Japan, local sales offices throughout the world and on-site applications support, FUJIFILM Electronic Materials supplies the world's top tier semiconductor manufacturers with a broad array of products and services used throughout the semiconductor manufacturing process. The Role The Chemist will be responsible to support advanced metrology equipment (HPLC, XPS surface Analysis, ToF SIMS Surface Analysis, in addition to Rigaku SAXS particle Sizing and Thermo Pharos SEM Analysis). They will also support Chemical Approval/Hazard Communication and Inventory Management in addition to Method Development and writing SOP's. Company Overview FUJIFILM Electronic Materials, U.S.A. fuels innovation in the semiconductor industry-where chemistry meets technology. Our advanced materials and formulations enable manufacturers to build the microchips that power Artificial Intelligence, computers, electric vehicles, smartphones, and more. We're a global business-to-business supplier of chemical formulations and advanced materials used for manufacturing and packaging semiconductors. Our chemical formulations allow top manufa ### ENGR II, PROCESS; MFG - ON Semiconductor - Location: Seremban, Negeri Sembilan, Malaysia (unspecified) - Salary: Not disclosed - Posted: 2026-05-21 - Apply: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2504820 - Excerpt: ENGR II, PROCESS; MFG Seremban, Negeri Sembilan, Malaysia ENGR II, PROCESS; MFG ### Senior Analog Layout Engineer - Infineon Technologies - Location: Penang (Malaysia) (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://infineon.eightfold.ai/careers/job/563808970664563 - Excerpt: Senior Analog Layout Engineer Penang (Malaysia) ### Principal/Sr Principal Engineer Microelectronic Semiconductors - Northrop Grumman - Location: United States-California-Manhattan Beach (unspecified) - Salary: $114K-$171K - Posted: 2026-06-05 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Relocation assistance: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://ngc.wd1.myworkdayjobs.com/Northrop_Grumman_External_Site/job/United-States-California-Manhattan-Beach/Principal-Sr-Principal-Engineer-Microelectronic-Semiconductors_R10231255 - Excerpt: Principal/Sr Principal Engineer Microelectronic Semiconductors United States-California-Manhattan Beach RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. The Northrop Grumman Microelectronics Center (NGMC) has an opening for a Microelectronics Device Engineer to join our team of qualified, diverse individuals at our Space Park Foundry (SPF) location in Redondo Beach, CA. In the NGMC we design, manufacture, and test semiconductor products for internal and commercial production customers as well as emerging technology programs. The SPF semiconductor foundry has unique capabilities supporting a range of production microelectronics technologies (Gallium Arsenide, Indium Phosphide, and Gallium Nitride). SPF provides leading edge technology development in semiconductor materials, processes, devices, and 3D ### Post-silicon Validation and Debug Engineer - Intel - Location: 2 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-06-01 - 401(k) match: listed (not source-backed) - Apply: https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Post-silicon-Validation-and-Debug-Engineer_JR0282307 - Excerpt: Post-silicon Validation and Debug Engineer 2 Locations posted: Posted 11 Days Ago ### ASIC Design Engineer, Clocks - NVIDIA Corporation - Location: China, Shanghai (unspecified) - Salary: Not disclosed - Posted: 2026-05-27 - 401(k) match: listed (not source-backed) - Apply: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/China-Shanghai/ASIC-Design-Engineer--Clocks_JR2018444 - Excerpt: ASIC Design Engineer, Clocks China, Shanghai posted: Posted 16 Days Ago ### Senior Semiconductor Foundry Engineer – Actively Growing Our Engineering Team! - Raytheon Technologies - Location: US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Senior-Semiconductor-Foundry-Engineer---Actively-Growing-Our-Engineering-Team-_01837604 - Excerpt: Senior Semiconductor Foundry Engineer – Actively Growing Our Engineering Team! US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDG posted: Posted 30+ Days Ago ### Electronics Engineer Specialist - Eaton Corporation - Location: Peachtree City, Georgia, USA, 30269 (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://eaton.eightfold.ai/careers/job/687237091116 - Excerpt: Electronics Engineer Specialist Peachtree City, Georgia, USA, 30269 ### Senior Accountant - Cohu Inc - Location: San Diego, CA, United States (unspecified) - Salary: Not disclosed - Posted: 2026-05-20 - 401(k) match: listed (not source-backed) - Apply: https://hcbo.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/requisitions/job/302371 - Excerpt: Senior Accountant San Diego, CA, United States Cohu is a global technology leader supplying test, automation, inspection and metrology products and services to the semiconductor industry. As a leading supplier of semiconductor test handlers, Cohu has a portfolio of equipment used to automate the movement of semiconductor devices, control temperature during test and provide vision inspection; ensures quality and optimizes yield in volume production. We are seeking a Senior Accountant who will perform complex financial and general accounting duties related to the preparation, analysis and maintenance of monthly financial reporting. This role reports to the Accounting Manager and requires a strong understanding of US-GAAP and internal controls, with the ability to work independently and handle accounting issues with limited supervision. ### Senior Electronic Hardware Engineer - GE Vernova - Location: Stafford (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 10 weeks (not source-backed) - Non-birth-parent leave: 10 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://gevernova.wd5.myworkdayjobs.com/Vernova_ExternalSite/job/Stafford/Senior-Electronic-Hardware-Engineer_R5039517-2 - Excerpt: Senior Electronic Hardware Engineer Stafford posted: Posted 30+ Days Ago ### Senior STA Engineer, Sub-chip - NVIDIA Corporation - Location: 3 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-06-11 - 401(k) match: listed (not source-backed) - Apply: https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/Israel-Yokneam/Senior-STA-Engineer--Sub-chip_JR2015231 - Excerpt: Senior STA Engineer, Sub-chip 3 Locations posted: Posted Yesterday ### Semiconductor Equipment Engineer - Pratt & Whitney - Location: andover, Massachusetts, United States of America (onsite) - Salary: Not disclosed - Posted: 2026-05-05 - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer_01835317/apply - Excerpt: Semiconductor Equipment Engineer andover, Massachusetts, United States of America Date Posted. 2026-05-05Country. United States of AmericaLocation. US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDGPosition Role Type. Onsite. U.S. Citizen, U.S. Person, or Immigration Status Requ... ### AME - Lithography - STMicroelectronics - Location: Singapore (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://stmicroelectronics.eightfold.ai/careers/job/563637172113296 - Excerpt: AME - Lithography Singapore ### Semiconductor Equipment Engineer - Pratt & Whitney - Location: andover, Massachusetts, United States of America (onsite) - Salary: Not disclosed - Posted: 2026-06-09 - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer_01851347/apply - Excerpt: Semiconductor Equipment Engineer andover, Massachusetts, United States of America Date Posted. 2026-06-09Country. United States of AmericaLocation. US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDGPosition Role Type. Onsite. U.S. Citizen, U.S. Person, or Immigration Status Requ... ### Senior Electrical Engineer – DSP ASIC/FPGA (Onsite) - Raytheon Technologies - Location: US-IA-CEDAR RAPIDS-166 ~ 855 35Th St NE ~ BLDG 166 (onsite) - Salary: Not disclosed - Posted: 2026-05-29 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-IA-CEDAR-RAPIDS-166--855-35Th-St-NE--BLDG-166/Senior-Electrical-Engineer---DSP-ASIC-FPGA--Onsite-_01849069 - Excerpt: Senior Electrical Engineer – DSP ASIC/FPGA (Onsite) US-IA-CEDAR RAPIDS-166 ~ 855 35Th St NE ~ BLDG 166 posted: Posted 14 Days Ago ### Sr. HiTech/Semiconductor Partner Solutions Architect, AMER Partner Industry & Solutions - Amazon - Location: Seattle, Washington, USA (unspecified) - Salary: $154K-$208K - Posted: 2026-05-15 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Fertility benefits: yes (not source-backed) - Adoption assistance: yes (not source-backed) - Mental health support: yes (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://www.amazon.jobs/en/jobs/10421102/sr-hitech-semiconductor-partner-solutions-architect-amer-partner-industry-solutions - Excerpt: Sr. HiTech/Semiconductor Partner Solutions Architect, AMER Partner Industry & Solutions Seattle, Washington, USA Amazon Web Services (AWS) is looking for a Senior Partner Solutions Architect (PSA) with domain expertise in the Semiconductor and High-Tech Electronics industry. As a HiTech PSA, you will have the opportunity to deliver on our strategy of accelerating adoption of AWS cloud computing services through our consulting and technology partners and their semiconductor and electronics customers. AWS partners include the largest systems integrators, EDA tool providers, foundries, and innovative technology companies who are using AWS as their cloud platform of choice. This role will focus on working with multiple strategic consulting and technology partners to define and build technical solutions that drive top-of-funnel pipeline creation and deal progression. The ideal candidate will possess deep technical skill in semiconductor design workflows, EDA tool architectures, high-performance computing, storage architectures, and cloud computing, as well as customer-facing and technical sales skills at all levels of a sales organization. The ideal candidate should also have a demonstrated ability to think strategically about business, product, and technical challenges in the semiconductor industry. The ideal candidate is an influencer by nature and must be seen as someone partners and customers are eager to engage with and have a strong hands-on approach. They will be the subject matter expert for the Semiconductor/HiTech industry to become a trusted advisor to sales teams and customers, driving customer outcomes through partners. They will be responsible for accelerating customers' cloud adoption in the semiconductor industry, including chip ### Senior IP Project Engineer - NXP Semiconductors - Location: Austin (Oakhill, Office) (unspecified) - Salary: Not disclosed - Posted: 2026-06-09 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Austin-Oakhill-Office/Senior-IP-Project-Engineer_R-10063876 - Excerpt: Senior IP Project Engineer Austin (Oakhill, Office) posted: Posted 3 Days Ago ### Applications Engineer 4 - Lattice Semiconductor - Location: Bayan Lepas, Penang, UNAVAILABLE, MY (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://careers-latticesemi.icims.com/jobs/3601/applications-eng-4/job - Excerpt: Applications Engineer 4 Bayan Lepas, Penang, UNAVAILABLE, MY Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for. Responsibilities & Skills Specific job skill requirements•Experience in FPGA architecture & foundational blocks such as PLL, Embedded Memory blocks, DSP blocks, Input/Output blocks, etc is required.•Experience in a wide variety of physical interface standards, including SSTL, HSTL, LVSTL, HSUL is highly desirable.•Experience in timing closure, PLL/DLLs, physical interface strategies and signal integrity is highly desirable.•Hands-on FPGA development experience, including RTL development and verification is highly desirable. General requirements:•BS/MS in EE with 10+ y ### Senior Semiconductor Laser Device Engineer - Lawrence Livermore National Laboratory - Location: Livermore, CA, United States (unspecified) - Salary: $211K-$267K - Posted: 2026-06-10 - Apply: https://jobs.smartrecruiters.com/LLNL/3743990011303466-senior-semiconductor-laser-device-engineer - Excerpt: Senior Semiconductor Laser Device Engineer Livermore, CA, United States Company Description: Join us and make YOUR mark on the World! Lawrence Livermore National Laboratory (LLNL) has turned bold ideas into world-changing impact advancing science and technology to strengthen U.S. security and promote global stability. Our mission spans four critical national security areas nuclear deterrence, threat preparedness, energy security, and multi-domain defense empowering teams to take on the toughest challenges of today and tomorrow. With a culture built on innovation and operational excellence, LLNL is a place where your expertise can make a real impact. Job Description: We have an opening for a Senior Semiconductor Laser Device Engineer with expertise in semiconductor laser diodes. You will define, develop, and deploy high power laser diodes and diode arrays. You will have an advanced understanding of semiconductor optoelectronics, micro-optics, and thermal management to specify, design, and oversee deployment of high-power laser diode arrays and work to determine requirements, set specifications and address array technology options including thermal management and electronic drivers. You will work with LLNL team members to expand the vision for continued development of diode laser technology. This position is in the Laser Systems Engineering & Operations (LSEO) Division of the Engineering Directorate. You will Operate under consultative direction with substantial authority, using in-depth analysis and subject matter expertise in highly advanced concepts, to resolve a diverse range of highly complex problems, independently determine strategies, modify approaches, and pursue actions that impact organizational operations or directions and achieve long-term goals. Provide ### Senior Equipment Engineer, Raxium (Night Shift) - Google - Location: Fremont, CA, USA (unspecified) - Salary: $144K-$209K - Posted: 2026-06-05 - Parental leave: 18 weeks (not source-backed) - Non-birth-parent leave: 18 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://www.google.com/about/careers/applications/signin?jobId=CiUAL2FckfZfN3CJbqjRr6sDaF4wQWA7zsCi4n9fNxLz35hzS5DuEjsACxwdTC1eWDloxfD3UW1in8gl0dwdhtJ1kdONKHqxz6DDzDXuDNmZype_tSuX3ge_gAD7tdc5dI59mw%3D%3D_V2&loc=US&title=Senior+Equipment+Engineer - Excerpt: Senior Equipment Engineer, Raxium (Night Shift) Fremont, CA, USA The Raxium Facility and Equipment team maintains a broad range of semiconductor/facility equipment and clean room infrastructure. Our expertise lies in understanding the relationship between semiconductor processing and its support equipment, enabling us to troubleshoot problems, execute tasks, and collaborate on installing, modifying, maintaining, and repairing clean room and facility support equipment. In this role, you will focus on expert-level maintenance, support, and optimization of semiconductor processing equipment, with a specific emphasis on advanced vacuum systems used in Chemical Vapor Deposition (CVD), Inductively Coupled Plasma (ICP), and Reactive Ion Etching (RIE). You will bring a broad understanding of semiconductor manufacturing to support other critical tool sets as needed, including Electrochemical Plating (ECP), Chemical Mechanical Polishing (CMP), lithography, and wet etch. You will leverage your experience to lead installations, troubleshoot complex issues, and execute preventative maintenance programs that maximize the reliability and performance of our tool sets.Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $144000 - $209000 (USD) + 15% bonus target ### EDA Tools Hardware Engineer - Intel - Location: 4 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://intel.wd1.myworkdayjobs.com/External/job/US-California-Santa-Clara/EDA-Tools-Hardware-Engineer_JR0284646 - Excerpt: EDA Tools Hardware Engineer 4 Locations posted: Posted Today ### Semiconductor Design Engineer (Teradyne, Costa Rica) - Teradyne - Location: Semiconductor Design Engineer (Teradyne, Costa Rica) (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - Parental leave: 4 weeks (not source-backed) - Non-birth-parent leave: 4 weeks (not source-backed) - Childcare support: yes (not source-backed) - Apply: https://jobs.teradyne.com/Teradyne/job/Alajuela-Semiconductor-Design-Engineer-%28Teradyne%2C-Costa-Rica%29/1397296700/ - Excerpt: Semiconductor Design Engineer (Teradyne, Costa Rica) Semiconductor Design Engineer (Teradyne, Costa Rica) We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world! We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive. Opportunity Overview We're looking for a highly experienced Senior Analog Layout Engineer to join our semiconductor design team. In this role, you will lead the physical layout and verification of complex analog and mixed-signal ASICs in advanced FinFET technologies, helping deliver the next generation of Teradyne's test and automation platforms. You'll collaborate closely with circuit designers, physical design engineers, and cross-functional partners to create high-quality, manufacturable layouts that meet demanding performance, reliability, and schedule targets. Key Responsibilities Lead the layout design and integration of complex analog and mixed-signal ASIC blocks using Cadence Virtuoso. Develop floorplans, placement, routing, and top-le ### Intern - Lattice Semiconductor - Location: Bayan Lepas, Penang, UNAVAILABLE, MY (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://careers-latticesemi.icims.com/jobs/3621/intern/job - Excerpt: Intern Bayan Lepas, Penang, UNAVAILABLE, MY Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for. Responsibilities & Skills Job Description We are seeking a Design Verification (DV) Intern who is passionate about shaping their career path in the FPGA design and verification industry.• Collaborate with design team to understand design implementation and define verification requirement.• Work with senior DV engineers on functional verification tasks, including test planning, test creation, and coverage closure.• Implement functional coverage, assertion, tests and sequence libraries following UVM methodology. Requirements:• Good understanding of verification process ### Concept Development Engineer (m/f/d) - NXP Semiconductors - Location: Gratkorn (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Gratkorn/Concept-Development-Engineer--m-f-d-_R-10062415-1 - Excerpt: Concept Development Engineer (m/f/d) Gratkorn posted: Posted 30+ Days Ago ### Senior Global Sourcing Manager, Semiconductor (Chips) - Anduril - Location: Costa Mesa, California, United States (unspecified) - Salary: $166K-$220K - Posted: 2026-05-19 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/5140942007?gh_jid=5140942007 - Excerpt: Senior Global Sourcing Manager, Semiconductor (Chips) Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB The Senior Global Sourcing Manager, Semiconductor (Chips) is the domain expert for the semiconductor chip commodities and supplier partnership for Anduril Industries. This is a proactive, high-impact role in securing critical chip components, materials, and services that power our products. This role will be responsible for developing new supplier and new sourcing partnerships that can be incorporated into new products, as well as existing products to improve their technologies, cost, and quality. There is broad internal cross functional partnership to evaluate supplier opportunities, while ensuring commercial agreements, intellectual property, and statement of works are accurate and well established prior to pipelining. WHAT YOU'LL DO - Develop and execute commodity strategies for semiconductor components, focusing on cost reduction, quality improvement, and supply chain resilience - End-to-end responsibility for delivering ### Global Technology Liaison – Semiconductor R&D and Academic Collaboration - Renesas Electronics - Location: Athens, , Greece (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000131395039-global-technology-liaison-semiconductor-r-d-and-academic-collaboration - Excerpt: Global Technology Liaison – Semiconductor R&D and Academic Collaboration Athens, , Greece Company Description: Job Description: This role is responsible for leading global technology liaison activities with research institutes and academia, with a focus on identifying, shaping, and nurturing mid‑ to long‑term semiconductor technology opportunities aligned with Renesas' strategic direction. The position requires both strong technical credibility and the ability to build trust‑based, long‑term relationships, which are highly valued in Japanese organizations. Key Responsibilities - Working closely with CTO office - Lead technology liaison activities with leading global research institutes and universities across Europian countries. - Identify emerging semiconductor technologies and research trends with a mid‑ to long‑term perspective - Initiate, structure, and support joint research programs and technical collaborations Act as a technical interface between external partners and internal stakeholders (R&D, business units, IP, legal, and strategy teams) - Provide clear technical insights and recommendations to internal teams and management - Support the definition of research themes aligned with Renesas' long‑term technology roadmap - Represent Renesas at international conferences, workshops, and technical forums - Build and maintain a trusted global technology network over time Qualifications: - Solid technical background in semiconductor technologies (e.g., devices, process, circuits, materials, packaging, or systems) - Professional experience in R&D, technology planning, technology strategy, or technical partnership roles - Ability to communicate and collaborate effectively with engineers and researchers at a technical level - Business‑level English proficiency for meetings, discussions, and written communication - Strong coordination skills and the ability to work across organizational ### System Architect - ON Semiconductor - Location: San Jose, CA, United States (unspecified) - Salary: Not disclosed - Posted: 2026-05-20 - Apply: https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/requisitions/job/2505551 - Excerpt: System Architect San Jose, CA, United States System Architect ### Senior Global Sourcing Manager, Semiconductor Components - Anduril - Location: Costa Mesa, California, United States (unspecified) - Salary: $166K-$220K - Posted: 2026-05-14 - Apply: https://boards.greenhouse.io/andurilindustries/jobs/5138191007?gh_jid=5138191007 - Excerpt: Senior Global Sourcing Manager, Semiconductor Components Costa Mesa, California, United States Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century's most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril's family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE JOB The Senior Global Sourcing Manager, Semiconductor Tactical is the domain expert for the semiconductor component commodities for Anduril Industries. This is a proactive, high-impact role in securing critical components, materials, and services that power our products. This role will be responsible for developing new supplier and new sourcing partnerships that can be incorporated into new products, as well as existing products to improve their technologies, cost, and quality. There is broad internal cross functional partnership to evaluate supplier opportunities, while ensuring commercial agreements, intellectual property, and statement of works are accurate and well established prior to pipelining. WHAT YOU'LL DO - Develop and execute commodity strategies for semiconductor components, focusing on cost reduction, quality improvement, and supply chain resilience - End-to-end responsibility for delivering quality parts, when needed, ### PCB Layout Engineer - Etched - Location: San Jose, CA, United States (unspecified) - Salary: Not disclosed - Posted: 2025-06-11 - Mental health support: yes (not source-backed) - Apply: https://jobs.ashbyhq.com/etched/ed7a1d2e-df45-4d35-8965-e989fbbc2ce9 - Excerpt: PCB Layout Engineer San Jose, CA, United States About Etched Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary We're seeking a skilled PCB Layout Engineer to join our dynamic team and contribute to our high-performance data center products. As a PCB Layout Engineer at Etched, you will play a crucial role in designing and optimizing printed circuit boards (PCBs) using Cadence Allegro PCB design tools. Your primary focus will be on high-speed signaling, including 100G applications, power distribution, large BGA ball-map breakouts and complex HDI PCB stack-ups for high-performance data center products. Your expertise will ensure that our products meet the highest standards of performance, reliability, and efficiency. Key Responsibilities - Lead the design and optimization of high-speed PCB layouts using Cadence Allegro, tailored for 100G signaling. Implement strategies for impedance matching, trace routing, and crosstalk mitigation, resulting in robust designs that meet the stringent performance demands of modern data centers. - Develop and implement power distribution networks for cutting-edge data center hardware. Design power planes, decoupling strategies, and thermal management solutions to support high-performance systems, ensuring ### Senior Machine Control Software Systems Engineer - Axcelis Technologies INC - Location: Beverly, MA (unspecified) - Salary: $125K-$187K - Posted: 2026-05-24 - 401(k) match: listed (not source-backed) - Childcare support: no (not source-backed) - Apply: https://axcelis.wd1.myworkdayjobs.com/axcelis/job/Beverly-MA/Sr-Software-Development-Engineer_11454 - Excerpt: Senior Machine Control Software Systems Engineer Beverly, MA JOB DESCRIPTION Senior Machine Control Software Systems Engineer Want to discover just how far your intellectual curiosity can take you? You're in the right place. For more than four decades, Axcelis Technologies has been at the forefront of innovation in semiconductor manufacturing technology. Chipmakers around the globe rely on our tools and process expertise to deliver the semiconductors that power modern life from smartphones and computers to cameras and cars. We have become a technology leader by providing the innovation necessary for business to thrive, quality of life to advance, and the environment to flourish-enabling a truly sustainable future. Our influence is global, with more than 30 offices worldwide, an installed base of thousands worldwide and a customer list that includes the world's largest semiconductor manufacturers. Our team is expanding, and we are currently hiring a Senior Machine Control Software Systems Engineer for our corporate office in Beverly, MA. Position Background: This machine control software engineer will write software to control wafer handling functions for Axcelis ion implanter systems. Ion implanter systems are large complex capital equipment systems used by semiconductor manufacturers. These fully automated systems run 24/7 and are used in the manufacture of semiconductor integrated circuits. These systems implant ions into silicon wafers by directing an ion beam onto the wafers. Wafer processing rates exceed 500 wafers per hour and must be exceedingly reliable with maximum uptime and an absolute minimum of failures. All wafer handling and processing is done ### Principal Digital IP Verification Engineer (f/m/d) - NXP Semiconductors - Location: Munich (unspecified) - Salary: Not disclosed - Posted: 2026-06-11 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Munich/Principal-Digital-IP-Verification-Engineer--f-m-d-_R-10063818 - Excerpt: Principal Digital IP Verification Engineer (f/m/d) Munich posted: Posted Yesterday ### CMT / AP - Semi Conductor - Infosys Consulting - Location: Location not specified (unspecified) - Salary: $280K-$407K - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://sjobs.brassring.com/TGnewUI/Search/home/HomeWithPreLoad?partnerid=25633&siteid=5439&PageType=JobDetails&jobid=2244275 - Excerpt: CMT / AP - Semi Conductor Infosys Consulting is seeking an experienced Associate Partner candidate to join the leadership team of our North American Semiconductor practice. About the Role: You will join the North American CMT leadership team, partnering with consulting leadership and sales to drive growth and delivery strategy, and helping to recruit and build high-performing teams. You will lead or participate in client teams responsible for problem definition, solution design, development and deployment for major transformation initiatives. As a thought leader in the CMT industry, you will lead major programs and serve as a key customer-facing advisor. You will contribute to the development of solutions to solve business problems and increase adoption of Infosys-driven solutions. This position is responsible for delivering measurable outcomes across the semiconductor value chain. You will operate with autonomy and sound judgment in complex, ambiguous environments. This job requires skills and experience in one or more of the following areas: Client Engagement & Business Development: - Core focus areas: Supply Chain transformation and ERP-led operating model change in semiconductor. - Build and manage senior-level client relationships across semiconductor IDMs, fabless companies, foundries, OSATs, and equipment manufacturers. - Executive advisory for COO/CIO/CFO on value case, roadmap, and operating model. - Identify and pursue new consulting opportunities, contributing to revenue growth and account expansion. - Lead proposal development, solution design, and deal shaping for strategic transformation programs. Consulting Delivery & Thought Leadership: Lead cross-functional teams delivering transformation engagements with deep functional expertise in 2+ semiconductor business ### ASIC Engineer 4 - Micron Technology, Inc. - Location: Minneapolis, MN (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - 401(k) match: listed (not source-backed) - Apply: https://micron.wd1.myworkdayjobs.com/External/job/Minneapolis-MN/ASIC-Engineer-4_JR91069 - Excerpt: ASIC Engineer 4 Minneapolis, MN posted: Posted 30+ Days Ago ### Senior Application Engineer - NXP Semiconductors - Location: 2 Locations (unspecified) - Salary: Not disclosed - Posted: 2026-05-12 - Parental leave: 6 weeks (not source-backed) - Non-birth-parent leave: 6 weeks (not source-backed) - 401(k) match: listed (not source-backed) - Apply: https://nxp.wd3.myworkdayjobs.com/Careers/job/Chongqing/Senior-Application-Engineer_R-10062831 - Excerpt: Senior Application Engineer 2 Locations posted: Posted 30+ Days Ago ### Mechanical Engineering Manager - Cohu Inc - Location: Poway, CA, United States (unspecified) - Salary: Not disclosed - Posted: 2026-04-16 - 401(k) match: listed (not source-backed) - Apply: https://hcbo.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1/requisitions/job/302306 - Excerpt: Mechanical Engineering Manager Poway, CA, United States Cohu is a global technology leader supplying test, automation, inspection and metrology products and services to the semiconductor industry. As a leading supplier of semiconductor test handlers. This position is based in San Diego, CA (Rancho Bernardo) and will oversee the Mechanical Engineering (ME) team responsible for the development of semiconductor test handling equipment. Drive ME processes, mentor MEs, provide leadership and innovative direction for ME designs, and provide staffing for projects. Work in concert with functional engineering leader (product, systems, software, vision, thermal, SQA, kits and electrical engineering), operations, quality, sales, technical support, and field service to resolve issues and ensure products meet specifications, quality requirements, and are delivered on time and within budget. ### Semiconductor Equipment Engineer - 3rd Shift - Pratt & Whitney - Location: andover, Massachusetts, United States of America (onsite) - Salary: Not disclosed - Posted: 2026-06-09 - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---3rd-Shift_01851618/apply - Excerpt: Semiconductor Equipment Engineer - 3rd Shift andover, Massachusetts, United States of America Date Posted. 2026-06-09Country. United States of AmericaLocation. US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDGPosition Role Type. Onsite. U.S. Citizen, U.S. Person, or Immigration Status Requ... ### Hardware Engineer - Adtran Holdings Inc - Location: Ra’anana, Israel (unspecified) - Salary: Not disclosed - Posted: 2026-05-13 - Apply: https://adtran.wd3.myworkdayjobs.com/adtran/job/Raanana-Israel/Hardware-Engineer_R005555-1 - Excerpt: Hardware Engineer Ra’anana, Israel posted: Posted 30 Days Ago ### Engineer Electronics - Northrop Grumman Corporation - Location: United States-Illinois-Rolling Meadows (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://ngc.eightfold.ai/careers/job/1340072122230 - Excerpt: Engineer Electronics United States-Illinois-Rolling Meadows ### Semiconductor Equipment Engineer - Dielectrics Lead - Pratt & Whitney - Location: andover, Massachusetts, United States of America (onsite) - Salary: Not disclosed - Posted: 2026-04-13 - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/Semiconductor-Equipment-Engineer---Dielectrics-Lead_01837532/apply - Excerpt: Semiconductor Equipment Engineer - Dielectrics Lead andover, Massachusetts, United States of America Date Posted. 2026-04-13Country. United States of AmericaLocation. US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDGPosition Role Type. Onsite. U.S. Citizen, U.S. Person, or Immigration Status Requ... ### Director, Semiconductor IC Packaging & Assembly Engineering - Renesas Electronics - Location: Shah Alam, , Malaysia (unspecified) - Salary: Not disclosed - Posted: 2026-06-10 - 401(k) match: listed (not source-backed) - Apply: https://jobs.smartrecruiters.com/RenesasElectronics/744000129941335-director-semiconductor-ic-packaging-assembly-engineering - Excerpt: Director, Semiconductor IC Packaging & Assembly Engineering Shah Alam, , Malaysia Company Description: Job Description: We are seeking an experienced and strategic Director of Semiconductor IC Packaging Assembly Engineering to lead assembly sustaining engineering and high-volume manufacturing operations for advanced semiconductor packaging technologies. This role supports AI/data center infrastructure power packaging applications, especially Smart Power Stages, Vertical Power Stages, Power Modules, and Discrete FET packages, with additional scope spanning wide-bandgap (WBG) technologies including SiC and GaN, DBC and AMB substrates, and advanced interconnect technologies. This leader will oversee yield performance, process stability, quality control, process change management, and manufacturing readiness while partnering closely with Package Engineering, R&D, Product Engineering, Quality, Supply Chain, and external OSAT partners to successfully transition New Product Introduction (NPI) programs into scalable high-volume manufacturing (HVM). The ideal candidate combines deep semiconductor packaging assembly expertise with strong operational leadership, data-driven decision-making, and cross-functional collaboration skills to drive manufacturing excellence, product quality, and continuous improvement across global operations. This role also serves as a critical interface to Director, Package Engineering by ensuring package development intent, qualification requirements, process windows, and ramp readiness are translated effectively into stable, cost-competitive, high-volume manufacturing execution. Key Responsibilities Manufacturing & Sustaining Engineering Leadership Lead sustaining engineering across semiconductor package assembly technologies and product lines. Drive high-volume manufacturing performance in yield, cycle time, quality, throughput, and cost. Establish strong engineering systems for process control, defect reduction, and continuous improvement. Align assembly engineering roadmaps with business growth and package technology strategies. Partner with Package Engineering ### Electronics Design Engineer - Moog Inc. - Location: Blacksburg, VA (unspecified) - Salary: Not disclosed - Posted: 2026-05-21 - 401(k) match: listed (not source-backed) - Apply: https://moog.wd5.myworkdayjobs.com/MOOG_External_Career_Site/job/Blacksburg-VA/Electronics-Design-Engineer_R-25-14904 - Excerpt: Electronics Design Engineer Blacksburg, VA posted: Posted 22 Days Ago ### Graduate - Senior Engineer Digital IC Design - Infineon Technologies - Location: San Jose | CA (United States) (unspecified) - Salary: Not disclosed - Posted: 2026-06-12 - 401(k) match: listed (not source-backed) - Apply: https://infineon.eightfold.ai/careers/job/563808961449922 - Excerpt: Graduate - Senior Engineer Digital IC Design San Jose | CA (United States) ### 4th Shift Technical Lead – Semiconductor Fab - Pratt & Whitney - Location: andover, Massachusetts, United States of America (onsite) - Salary: Not disclosed - Posted: 2026-05-29 - Apply: https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-MA-ANDOVER-AR2--362-Lowell-St--AR2-PLYMOUTH-BLDG/XMLNAME-4th-Shift-Technical-Lead---Semiconductor-Fab_01848717/apply - Excerpt: 4th Shift Technical Lead – Semiconductor Fab andover, Massachusetts, United States of America Date Posted. 2026-05-29Country. United States of AmericaLocation. US-MA-ANDOVER-AR2 ~ 362 Lowell St ~ AR2 PLYMOUTH BLDGPosition Role Type. Onsite. U.S. Citizen, U.S. Person, or Immigration Status Requ... --- Source-backed benefit claims include source links; other benefit values are labeled separately.